FPGA development board suitable for teaching experiment

Abstract

The utility model provides a kind of FPGA development board suitable for teaching experiment, including FPGA development board motherboard and detachably installed in the middle part of FPGA development board motherboard FPGA development board core board, SMA interface, CAM interface and dial switch are also provided in the middle part of FPGA development board motherboard;FPGA development board motherboard is provided with HDMI interface, USB interface, audio interface, power interface, JTAG interface, SD card slot, PCIe interface, Ethernet interface, optical module interface, micromotor, VGA interface, GPIO interface, LCD display screen, MCU subsystem, key input area and nixie tube in outer region, the utility model motherboard middle part installs core board, outer edge is provided with multiple function interfaces, solve the problem of interface resource dispersion, and simple structure, it is convenient to maintain, function is comprehensive, can widely support the teaching and experiment of electronic information and computer engineering technical field.

Description

Technical Field

[0001] This utility model relates to the field of electronic information and computer engineering technology, specifically to an FPGA development board suitable for teaching experiments. Background Technology

[0002] With the development of integrated circuits and electronic information technology, FPGAs (Field-Programmable Gate Arrays) have been widely used in many fields such as digital system design, embedded system development, signal processing, and artificial intelligence due to their programmable logic, abundant resources, and strong processing capabilities. To improve students' understanding and development skills in digital logic and hardware systems, universities have generally introduced FPGA development boards as teaching experimental platforms in digital circuit courses.

[0003] Existing FPGA development boards for teaching experiments are mainly general-purpose experimental platforms, typically possessing basic circuits, programmable logic functions, and some commonly used peripheral interfaces. However, they still have certain shortcomings in terms of teaching adaptability, expandability, and ease of use. For example, some development boards have scattered interface resources, and the experimental content is not closely integrated with the curriculum, requiring students to configure additional circuits during experiments, increasing their learning burden. Other development boards are more focused on scientific research or engineering applications, with complex structures that are difficult for beginners to use. Still others lack intuitive demonstration methods to accompany teaching experiments, limiting the improvement of teaching effectiveness.

[0004] Patent document CN207503507U discloses an FPGA-based development board, including: an FPGA processor, a JTAG interface circuit, a clock circuit, a power supply filter circuit, a power supply circuit, an I / O voltage conversion circuit, and I / O connectors. This invention achieves the replacement of multiple digital plug-in boards with a single development board, featuring simple structure, reasonable design, stable function, low implementation cost, and flexible and convenient use. However, the interface resources of this FPGA development board are scattered, requiring additional circuit configuration when used in teaching experiments.

[0005] Therefore, how to design an FPGA development board that can be deeply integrated with the teaching courses of electronic information and integrated circuit majors has become an urgent problem to be solved in the current research and development of electronic engineering teaching platforms. Utility Model Content

[0006] In view of the shortcomings of the existing technology, the purpose of this utility model is to provide an FPGA development board suitable for teaching experiments.

[0007] According to the present invention, an FPGA development board suitable for teaching experiments includes an independent FPGA development board motherboard and an FPGA development board core board. The FPGA development board core board is detachably installed in the core board mounting area in the middle of the FPGA development board motherboard. The central area of ​​the FPGA development board motherboard is also equipped with an SMA interface, a CAM interface, and a DIP switch. The FPGA development board motherboard has an HDMI interface, USB interface, audio interface, power interface, JTAG interface, SD card slot, PCIe interface, Ethernet interface, optical module interface, micro motor, VGA interface, GPIO interface, LCD display, MCU subsystem, key input area and digital tube on the outer edge area; The HDMI interface, USB interface, audio interface, power interface, JTAG interface, SD card slot, PCIe interface, Ethernet interface, optical module interface, micro motor, VGA interface, GPIO interface, LCD display, MCU subsystem, key input area, digital tube, SMA interface, CAM interface, and DIP switches are all electrically connected to the FPGA chip on the FPGA development board core board.

[0008] Preferably, the core board mounting area is provided with multiple core board slots, and the multiple plugs of the FPGA development board core board are correspondingly inserted into the multiple core board slots.

[0009] Preferably, the FPGA development board motherboard is rectangular, and the rectangular FPGA development board motherboard includes a central region, an upper region, a lower region, a left region, and a right region; The HDMI interface, USB interface, audio interface, and power interface are all located on the right side of the FPGA development board motherboard, while the JTAG interface, SD card slot, PCIe interface, key input area, and digital tube are all located on the lower side of the FPGA development board motherboard. The Ethernet interface, optical module interface, and micro motor are all located on the left side of the FPGA development board motherboard, while the VGA interface, GPIO interface, LCD display, and MCU subsystem are all located on the upper side of the FPGA development board motherboard.

[0010] Preferably, the VGA interface is connected to the FPGA chip via a data transmission and isolation chip, and the GPIO interface is connected to the FPGA chip via a switching chip.

[0011] Preferably, the LCD display screen includes a TFT-LCD display screen; The TFT-LCD display screen is connected to the signal output terminal of the FPGA chip and the output terminal of the MCU subsystem, respectively.

[0012] Preferably, the USB interface includes a Type-A interface and a Type-C interface.

[0013] Preferably, the USB interface includes multiple ports, one of which is connected to the FPGA chip in sequence through a protocol conversion chip and a gating chip, and the JTAG interface is connected to the FPGA chip through the gating chip.

[0014] Preferably, the FPGA development board motherboard is provided with two Ethernet interfaces; The FPGA development board motherboard is equipped with two optical module interfaces; The FPGA development board motherboard is equipped with 8 SMA interfaces, which are used to form 4 pairs of differential SMA interfaces. The FPGA development board motherboard is equipped with two CAM interfaces.

[0015] Preferably, the FPGA development board motherboard is equipped with an 8-channel DIP switch; The FPGA development board motherboard is equipped with four 7-segment digital tubes.

[0016] Preferably, the FPGA development board core board further includes a DDR memory chip and a Nor Flash memory chip, both of which are electrically connected to the FPGA chip.

[0017] Compared with the prior art, the present invention has the following beneficial effects: This invention, by designing the motherboard and core board independently, facilitates reuse and reduces maintenance costs. The motherboard is designed with the core board mounted in the middle and multiple functional interfaces set on the outer edge, which solves the problem of scattered interface resources in existing FPGA development boards. The entire development board has a simple structure and can be widely used in teaching digital circuit design and embedded development, supporting teaching in fields such as artificial intelligence. Furthermore, it can achieve intuitive display effects through an LCD screen. Attached Figure Description

[0018] Other features, objects, and advantages of this invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a schematic diagram of the overall structure of this utility model; Figure 2 This is a schematic diagram showing the connection between the FPGA development board motherboard and the FPGA development board coreboard in this utility model. Figure 3 This is a schematic diagram of the JTAG debugging system in this utility model; Figure 4 This is a schematic diagram of the core board of the FPGA development board in this utility model.

[0019] The diagram shows: Detailed Implementation

[0020] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the present invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0021] This utility model discloses an FPGA development board suitable for teaching experiments, belonging to the technical fields of digital circuit design, embedded systems, and hardware teaching experimental platforms. By designing the motherboard and core board independently, it facilitates reuse and reduces maintenance costs. The motherboard is designed with the core board mounted in the middle and multiple functional interfaces set on the outer edge, which solves the problem of scattered interface resources in existing FPGA development boards. The entire development board has a simple structure and can be widely used in teaching digital circuit design and embedded development, supporting teaching in fields such as artificial intelligence. Furthermore, the LCD display screen can achieve an intuitive display effect for teaching experiments.

[0022] According to the FPGA development board suitable for teaching experiments provided by this utility model, such as Figure 1 As shown, it includes an independent FPGA development board motherboard 1 and an FPGA development board core board 2. The FPGA development board core board 2 is detachably installed in the core board mounting area 121 in the middle of the FPGA development board motherboard 1. Specifically, as shown... Figure 2 As shown, the core board mounting area 121 is provided with multiple core board slots 122. The multiple plugs of the FPGA development board core board 2 are correspondingly inserted into the multiple core board slots 122. Through independent design and detachable connection through slots, it is conducive to reuse, reduces maintenance costs in teaching experiments, and can replace different FPGA development board core boards 2 according to different needs.

[0023] The FPGA development board motherboard 1 is also equipped with an SMA interface 117, a CAM interface 118, a DIP switch 120, an HDMI interface 101, a USB interface 102, an audio interface 103, a power interface 104, a JTAG interface 105, an SD card slot 106, a PCIe interface 107, an Ethernet interface 108, an optical module interface 109, a micro motor 110, a VGA interface 111, a GPIO interface 112, an LCD display 113, an MCU subsystem 114, a key input area 115, and a digital tube 116; the HDMI interface... Interfaces 101, 102, 103, 104, 105, 106, 107, 108, 109, 100, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, and 120 are all electrically connected to the FPGA chip 201 on the core board 2 of the FPGA development board. This invention offers rich functionality and interfaces, and the entire development board can be widely used in teaching digital circuit design and embedded development, supporting teaching in fields such as artificial intelligence.

[0024] In this embodiment of the utility model, the FPGA chip 201 is selected from the FMP-100 series FPGA of Fudan Microelectronics. The FMP-100 series products provide programmable logic units, digital signal processing units, memory units, and high-speed transceivers, which can meet the teaching of digital circuit design of the substrate, and can also meet the teaching applications in the fields of communication, video image processing, industrial control, and artificial intelligence.

[0025] In a preferred embodiment, the FPGA development board motherboard 1 is rectangular, comprising a central region, an upper region, a lower region, a left region, and a right region. The SMA interface 117, CAM interface 118, and DIP switch 120 are located in the central region of the FPGA development board motherboard 1. The HDMI interface 101, USB interface 102, audio interface 103, and power interface 104 are located in the right region of the FPGA development board motherboard 1. The JTAG interface 105, SD card slot 106, PCIe interface 107, key input area 115, and digital tube 116 are located in the lower region of the FPGA development board motherboard 1. The Ethernet interface 108, optical module interface 109, and micro-motor 110 are located in the left region of the FPGA development board motherboard 1. The VGA interface 111, GPIO interface 112, LCD display 113, and MCU subsystem 114 are located in the upper region of the FPGA development board motherboard 1.

[0026] The VGA interface 111 is connected to the FPGA chip 201 via a data transmission and isolation chip, enabling the output of FPGA signals to the VGA display; for example... Figure 1 As shown, the VGA interface 111 is located on top of the FPGA development board. In this embodiment of the present invention, the VGA interface 111 is connected to the core board 2 of the FPGA development board through the data transmission and isolation chip SN74HC245 of Texas Instruments, and outputs the FPGA signal to the VGA device after converting the FPGA signal into a 5V signal.

[0027] The GPIO interface 112 is connected to the FPGA chip 201 via a switching chip, and is used to realize data interaction between external signals and the FPGA; such as Figure 1 As shown, the GPIO interface 112 is located on top of the FPGA development board. In this embodiment of the present invention, the GPIO interface 112 is first connected to the Texas Instruments TS3A4751 analog switch and then connected to the FPGA development board core board 2. This chip has bidirectional transmission function, realizing bidirectional data interaction between external signals and the FPGA.

[0028] The LCD display 113 includes a TFT-LCD display, which is connected to the signal output terminal of the FPGA chip 201 and the output terminal of the MCU subsystem 114, respectively, to realize the FPGA signal output to the LCD on the board, and can also realize the output display of the MCU subsystem; in this embodiment of the present invention, a 1.8-inch TFT-LCD display is selected and directly connected to the FPGA to realize the basic display requirements of general experiments on the development board.

[0029] The MCU subsystem 114 is used for FPGA-to-MCU expansion, enabling heterogeneous processing between the FPGA and the MCU subsystem, and also fulfilling the teaching needs for embedded development on the MCU. Preferably, the MCU subsystem 114 can output to a TFT-LCD. In this embodiment, the MCU controller uses a Raspberry Pi Pico control board, which has an embedded dual-core ARM Cortex-M0 processor, 30 GPIO interfaces, and 8 PIO state machines. It can meet the teaching needs of application scenarios such as IoT sensor node construction (temperature and humidity monitoring, etc.), smart home controllers (lighting / motor control), and embedded system teaching (supporting drag-and-drop UF2 programming).

[0030] The HDMI interface 101 is used to enable communication between the FPGA and external HDMI interface devices, such as... Figure 1As shown, the HDMI interface 101 is located on the right side of the FPGA development board, enabling communication between the FPGA and external HDMI interface devices. In this embodiment, one HDMI input is used, passing through ADI's ADV7611 chip before being input to the FPGA. The other HDMI output is used for output from the development board to the outside, with the FPGA outputting via Lattice's SII9022ACNU. The USB interface 102 enables communication between the FPGA and external USB bus interface devices. Preferably, the USB interface 102 includes a Type-A interface and a Type-C interface to ensure compatibility with applications using different interfaces. Figure 1 As shown, the USB interface 102 is located on the right side of the FPGA development board, enabling communication between the FPGA and external USB bus interface devices. In this embodiment, a total of four USB interfaces 102 are included: two Type-A interfaces and two Type-C interfaces, for compatibility with applications using different interfaces. The two Type-A interfaces are connected to the FPGA chip via Microchip's USB3300 chip. The two Type-C interfaces implement USB-UART functionality, using a CH442E chip to implement UART-to-UART conversion, and are connected to the FPGA chip 201.

[0031] In a preferred example, such as Figure 3 As shown, the USB interface 102 includes multiple ports. Among these multiple USB interfaces 102, one USB interface can be used for FPGA debugging. This USB interface 102 is connected to the FPGA chip 201 sequentially through a protocol conversion chip and a gating chip. The JTAG interface 105 is connected to the FPGA chip 201 through a gating chip and is used to provide a debugging interface for the FPGA development board. The development board provides two JTAG debugging interfaces, one based on a USB Type-C interface and the other based on a standard JTAG interface. The two JTAG debugging interfaces can be selected for use. This invention eliminates the need for a dedicated JTAG downloader, reducing the cost of the development board. The debugging interface can use USB, making it convenient to use.

[0032] The audio interface 103 is used to enable communication between the FPGA and external audio devices. Preferably, one channel is used for audio signal input, and the other channel is used for audio signal output. Figure 1 As shown, the audio interface 103 is located on the right side of the FPGA development board, enabling communication between the FPGA and external audio devices. In this embodiment, the CIRRUS LOGIC CS4270 chip is used for encoding and decoding, and then connected to the FPGA chip. One channel is used for audio signal input, and the other channel is used for audio signal output.

[0033] The power interface 104 is used to provide power to the FPGA development board, such as... Figure 1 As shown, the power interface 104 is located on the right side of the development board, providing power to the FPGA development board. Preferably, the input is a 12V DC power supply.

[0034] The SD card interface 106 is connected to the FPGA to enable communication between the FPGA and the SD device.

[0035] The PCIe interface 107 is connected to the FPGA to enable communication between the FPGA and PCIe devices. The FMP100 series FPGA contains 8 SerDes Channels. Every 4 channels form a Quad, for a total of 2 Quads. In this embodiment, the PCIe interface 107 supports a maximum of 4 interconnections, occupying one Quad of the FPGA.

[0036] The Ethernet interface 108 is connected to the FPGA to enable communication between the FPGA and Ethernet devices, such as... Figure 1 As shown, the Ethernet interface 108 is located on the left side of the development board and is connected to the FPGA via a physical layer chip to enable communication between the FPGA and Ethernet devices. In this embodiment, the physical layer chip for Ethernet is Realtek's RTL8211, and this invention supports two Ethernet interfaces 108.

[0037] The optical module interface 109 is connected to the FPGA to realize communication between the FPGA and the optical interface device. Preferably, the development board supports two optical module interconnections, with each channel occupying two SerDes Channels.

[0038] The SMA interface 117 is connected to the FPGA, such as Figure 1 As shown, the SMA interface 117 is located in the middle of the development board and is directly connected to the FPGA to realize communication between the FPGA and the SMA port device. This embodiment of the invention supports 8 SMA interfaces 117, which can form 4 pairs of differential SMA interfaces 117. The SMA interface 117 is directly connected to the FPGA chip 201.

[0039] The CAM interface 118 is connected to the FPGA to enable communication between the FPGA and the Camera interface device. Preferably, the development board supports the connection of two Camera interface devices.

[0040] The DIP switch 120 is connected to the FPGA to control the FPGA inputs. Preferably, the development board supports 8 DIP switch 120 inputs.

[0041] The digital tube 116 is connected to the FPGA to display the digital signals output by the FPGA. Preferably, the development board supports four 7-segment digital tubes 116, and the digital tubes 116 adopt a common cathode design.

[0042] The micro motor 110 is connected to the FPGA, enabling FPGA-based motor control experiments.

[0043] like Figure 4 As shown, the FPGA development board core board 2 includes an FPGA chip 201, a DDR memory chip 202, and a NorFlash memory chip 203. The DDR memory chip 202 and the NorFlash memory chip 203 are directly connected to the FPGA chip 201, providing commonly used data storage and supporting various circuit and application experiments. In this embodiment, the DDR3 memory chip SCB15H1G160 from Unisplendour Corporation is used to achieve a storage capacity of 1Gb, and a 128Mb NorFlash chip from Sansion is used.

[0044] In the description of this application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0045] The specific embodiments of this utility model have been described above. It should be understood that this utility model is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the substantive content of this utility model. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. An FPGA development board suitable for teaching experiments, characterized in that, It includes an independent FPGA development board motherboard (1) and an FPGA development board core board (2), wherein the FPGA development board core board (2) is detachably installed in the core board mounting area (121) in the middle of the FPGA development board motherboard (1); The central area of ​​the FPGA development board motherboard (1) is also provided with an SMA interface (117), a CAM interface (118), and a DIP switch (120). The FPGA development board motherboard (1) has an HDMI interface (101), a USB interface (102), an audio interface (103), a power interface (104), a JTAG interface (105), an SD card slot (106), a PCIe interface (107), an Ethernet interface (108), an optical module interface (109), a micro motor (110), a VGA interface (111), a GPIO interface (112), an LCD display (113), an MCU subsystem (114), a key input area (115), and a digital tube (116) on its outer edge area. The HDMI interface (101), USB interface (102), audio interface (103), power interface (104), JTAG interface (105), SD card slot (106), PCIe interface (107), Ethernet interface (108), optical module interface (109), micro motor (110), VGA interface (111), GPIO interface (112), LCD display (113), MCU subsystem (114), key input area (115), digital tube (116), SMA interface (117), CAM interface (118), and DIP switch (120) are all electrically connected to the FPGA chip (201) of the FPGA development board core board (2). The core board mounting area (121) is provided with multiple core board slots (122), and the multiple plugs of the FPGA development board core board (2) are correspondingly inserted into the multiple core board slots (122); The FPGA development board motherboard (1) is rectangular, and the rectangular FPGA development board motherboard (1) includes a middle area, an upper area, a lower area, a left area and a right area; The HDMI interface (101), USB interface (102), audio interface (103) and power interface (104) are all located on the right side of the FPGA development board motherboard (1), and the JTAG interface (105), SD card slot (106), PCIe interface (107), key input area (115) and digital tube (116) are all located on the lower side of the FPGA development board motherboard (1). The Ethernet interface (108), optical module interface (109) and micro motor (110) are all located on the left side of the FPGA development board motherboard (1), while the VGA interface (111), GPIO interface (112), LCD display (113) and MCU subsystem (114) are all located on the upper side of the FPGA development board motherboard (1).

2. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The VGA interface (111) is connected to the FPGA chip (201) through a data transmission and isolation chip, and the GPIO interface (112) is connected to the FPGA chip (201) through a switch chip.

3. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The LCD display (113) includes a TFT-LCD display; The TFT-LCD display screen is connected to the signal output terminal of the FPGA chip (201) and the output terminal of the MCU subsystem (114), respectively.

4. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The USB interface (102) includes a Type-A interface and a Type-C interface.

5. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The USB interface (102) includes multiple ports. Among the multiple USB interfaces (102), one USB interface (102) is connected to the FPGA chip (201) in sequence through a protocol conversion chip and a gating chip. The JTAG interface (105) is connected to the FPGA chip (201) through a gating chip.

6. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The FPGA development board motherboard (1) is equipped with two Ethernet interfaces (108). The FPGA development board motherboard (1) is equipped with two optical module interfaces (109). The FPGA development board motherboard (1) is provided with 8 SMA interfaces (117) to form 4 pairs of differential SMA interfaces; The FPGA development board motherboard (1) is equipped with two CAM interfaces (118).

7. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The FPGA development board motherboard (1) is equipped with an 8-way DIP switch (120). The FPGA development board motherboard (1) is equipped with four 7-segment digital tubes (116).

8. The FPGA development board suitable for teaching experiments according to claim 1, characterized in that, The FPGA development board core board (2) also includes a DDR memory chip (202) and a Nor Flash memory chip (203), both of which are electrically connected to the FPGA chip (201).

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