Atomized ion generating device

CN224862627UActive Publication Date: 2026-10-16SHENGDONG MICRO TECHNOLOGY (CHANGZHOU) CO LTD
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Patent Information

Application Number
CN202521617240.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-07-31
Publication Date
2026-10-16
Estimated Expiration
2035-07-31

AI Technical Summary

Technical Problem

例如,高压放电方式需要较高的工作电压,存在安全隐患,且能量消耗较大;超声波雾化方式设备体积较大,不利于小型化和集成化应用,同时其雾化效率和离子发生效率也有待提高

Benefits of technology

[0005] This invention adopts an integrated structure, which achieves device miniaturization by sharing a liquid channel through a micropore array; the smooth sidewalls of the micropores reduce siltation and are easy to clean, ensuring process stability; the medium barrier layer reduces harmful byproducts, increases ion concentration, and improves atomization and ionization efficiency.

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Abstract

The utility model provides a kind of atomization ion generating device, can reduce device volume, and reduce energy consumption and improve atomization efficiency.A kind of atomization ion generating device, comprising: substrate;The atomization generator of substrate surface and the dielectric barrier discharge ion generator of atomization generator surface;Further comprising the micropore array that is passed through the atomization generator and ion generator, the micropore array is used for the liquid channel that atomization generator and ion generator share.The utility model adopts integrated structure, through micropore array shared liquid channel, realize device miniaturization;Micropore side wall is smooth, reduces siltation and is easy to clean, guarantees process stability;Dielectric barrier reduces harmful by-product, improves ion concentration, improves atomization and ionization efficiency.
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Description

Technical Field

[0001] This utility model relates to the field of MEMS technology, and in particular to an atomizing ion generator. Background Technology

[0002] Negative ion and water ion generators are widely used in air purification, personal care, and healthcare. Traditional negative ion generators primarily employ corona discharge and ion exchange methods to produce negative ions, but these methods have drawbacks. Corona discharge easily generates harmful gases such as ozone, and its ion concentration is low with high energy consumption; ion exchange also produces limited negative ion concentrations and requires frequent replacement of ion exchange materials, resulting in high maintenance costs. Traditional water ion generators typically employ large-volume structures, utilizing high-voltage discharge and ultrasound to atomize and ionize water. These traditional technologies also have several shortcomings. For example, high-voltage discharge requires high operating voltages, posing safety hazards and consuming significant energy; ultrasonic atomization devices are bulky, hindering miniaturization and integrated applications, and their atomization and ion generation efficiency needs improvement. Furthermore, traditional devices perform poorly in terms of the uniformity and stability of water ion generation, making it difficult to meet the demands of applications requiring high-quality water ions. As demands for miniaturization, efficiency, and intelligence in products continue to increase, there is an urgent need for a small, low-energy-consumption, highly efficient, and stable water ion generating chip. Summary of the Invention

[0003] The technical problem to be solved by this utility model is to provide an atomizing ion generator that can reduce device size, reduce energy consumption and improve atomization efficiency.

[0004] To address the aforementioned problems, this invention provides an atomizing ion generator, comprising: a substrate; an atomizing generator on the surface of the substrate and a dielectric barrier layer discharge ion generator on the surface of the atomizing generator; and a micropore array penetrating the atomizing generator and the ion generator, the micropore array serving as a liquid channel shared by the atomizing generator and the ion generator.

[0005] This invention adopts an integrated structure, which achieves device miniaturization by sharing a liquid channel through a micropore array; the smooth sidewalls of the micropores reduce siltation and are easy to clean, ensuring process stability; the medium barrier layer reduces harmful byproducts, increases ion concentration, and improves atomization and ionization efficiency. Attached Figure Description

[0006] Appendix Figure 1 The diagram shows the implementation steps of the formation method used to prepare the atomized ion generator in a specific embodiment of this utility model.

[0007] AppendixFigure 2A To be continued Figure 2E The diagram shown is a process flow chart of the formation method used to prepare the atomized ion generating device in a specific embodiment of this utility model.

[0008] Appendix Figure 3 The diagram shown is a structural schematic of the atomizing ion generator according to a specific embodiment of this utility model.

[0009] Appendix Figure 4 The diagram shows the implementation steps of the formation method used to prepare the atomized ion generator in a specific embodiment of this utility model.

[0010] Appendix Figure 5A To be continued Figure 5E The diagram shown is a process flow chart of the formation method used to prepare the atomized ion generating device in a specific embodiment of this utility model. Detailed Implementation

[0011] The specific embodiments of the atomizing ion generator provided by this utility model will be described in detail below with reference to the accompanying drawings.

[0012] To more clearly illustrate the structure described in the specific embodiments of this utility model, the structure described in the specific embodiments of this utility model is described below in conjunction with the method.

[0013] Appendix Figure 1 The diagram shown illustrates the implementation steps of the method for preparing the atomized ion generator according to a specific embodiment of this invention. (See attached diagram.) Figure 1 The method includes the following steps: Step S10, providing a substrate; Step S11, sequentially forming an insulating isolation layer, a piezoelectric actuator lower electrode layer, a piezoelectric layer, a piezoelectric actuator upper electrode layer, a dielectric barrier layer, and an ion discharge electrode layer on the surface of the substrate; Step S12, patterning the ion discharge electrode layer, and forming positive and negative electrodes for ion discharge on the surface of the dielectric barrier layer; Step S13, etching to form a micro-hole array penetrating the piezoelectric actuator lower electrode layer, the piezoelectric layer, the piezoelectric actuator upper electrode layer, and the dielectric barrier layer to form a liquid channel; Step S14, etching the back side of the substrate to the bottom of the micro-hole array to release the liquid channel structure.

[0014] In this specific embodiment, the liquid atomized by the atomizing ion generator is water.

[0015] Appendix Figure 2A To be continued Figure 2E The diagram shown is a process flow chart of the above method.

[0016] Appendix Figure 2AAs shown, referring to step S10, a substrate 20 is provided. In this specific embodiment, the substrate 20 is a silicon substrate. Silicon material has excellent mechanical strength and stability, which can provide reliable physical support for the entire atomizing ion generator, ensuring that the device maintains structural integrity during operation.

[0017] Appendix Figure 2B As shown, referring to step S11, an insulating isolation layer 21, a piezoelectric actuator lower electrode layer 22, a piezoelectric layer 23, a piezoelectric actuator upper electrode layer 24, a dielectric barrier layer 25, and an ion discharge electrode layer 26 are sequentially formed on the surface of the substrate 20.

[0018] The dielectric barrier layer 25 is made of silicon nitride, and the insulating isolation layer 21 is made of silicon oxide. The insulating isolation layer 21 serves as a transition layer between the substrate and the electrode layer, preventing direct electrical contact between the substrate 20 and the lower electrode layer 22 of the piezoelectric actuator, thus avoiding leakage current affecting the piezoelectric drive efficiency. It can be deposited using thermal oxidation or ion-enhanced chemical vapor deposition, and its thickness can be, for example, 0.5-2 μm.

[0019] The materials for the lower electrode layer 22 and the upper electrode layer 24 of the piezoelectric actuator are preferably aluminum (Al), copper (Cu), platinum (Pt), titanium (Ti), gold (Au), or doped polycrystalline silicon. Metallic materials have excellent electrical conductivity (resistivity ~10). -7 It has high Ω·m and strong chemical stability, making it suitable for forming good interfacial contact with piezoelectric layers (such as PZT). The lower electrode layer 22 and the upper electrode layer 24 of the piezoelectric actuator together provide a uniform electric field to excite the piezoelectric effect, and at the same time serve as a structural support layer for vibration. It can be formed by deposition or magnetron sputtering.

[0020] The piezoelectric layer 23 is made of aluminum nitride or PZT and is formed by a deposition process with a thickness of 0.5-50 μm.

[0021] The dielectric barrier layer 25 is preferably made of silicon nitride. The dielectric properties of silicon nitride can induce the formation of uniform micro-discharge channels, avoiding the local arcing generated by traditional corona discharge, thereby reducing the generation of harmful byproducts such as ozone (O3). The dense surface of silicon nitride provides excellent corrosion resistance to water, acids, and alkalis (such as liquids with pH 2-12), allowing for long-term contact with atomized aqueous solutions and preventing performance degradation caused by electrode corrosion.

[0022] Appendix Figure 2C As shown, referring to step S12, the ion discharge electrode layer 26 is patterned, and positive and negative electrodes 261 and 262 for ion discharge are formed on the surface of the dielectric barrier layer. Aluminum (Al), copper (Cu), platinum (Pt), titanium (Ti), gold (Au), or doped polycrystalline silicon are used. (See attached diagram.) Figure 3The diagram shown is a planar schematic of the above structure, where the ion discharge electrode is a planar interdigitated electrode. The interdigitation distance is 5-50 μm; the smaller the distance, the higher the discharge electric field strength. The planar interdigitated electrode, combined with the silicon nitride dielectric layer, can form a dense electric field in the discharge region, causing rapid ionization of water atomized particles and generating high concentrations of hydrated ions (such as OH-). - H3O + The ion concentration is higher than that of the traditional corona discharge method.

[0023] Appendix Figure 2D As shown, referring to step S13, an array of micropores 27 is formed by etching, penetrating the lower electrode layer 22, piezoelectric layer 23, upper electrode layer 24, and dielectric barrier layer 25 of the piezoelectric actuator, to form liquid channels. The pore size of the micropore array is 1-200 μm. This size range can balance liquid flow rate and atomization efficiency, ensuring sufficient liquid supply while facilitating efficient atomization and ionization through subsequent electric field action. Different dry or wet etching methods can be used to etch different layers step by step, using the same photoresist or hard mask pattern to form a multi-layered micropore array. Because it is formed in the same step, the sidewalls of the micropores are smooth and without dead corners, preventing liquid accumulation on the sidewalls and facilitating cleaning. Therefore, it is beneficial for the continuous and stable implementation of the atomization and ionization process.

[0024] Appendix Figure 2E As shown, referring to step S14, the back side of the substrate 20 is etched to the bottom of the microvia array 27 to release the liquid channel structure. Dry etching and wet etching can be used. Wet etching, such as using KOH or TMAH solutions, is preferred due to its high selectivity for silicon oxide (SiO2) and silicon nitride (Si3N4). By controlling the etching time, etching can be performed from the back side of the substrate to the bottom of the microvia array, releasing the suspended liquid channel structure without the need for complex dry etching equipment.

[0025] Further etching processes can be performed to expose the lower piezoelectric actuator layer 22 and the upper piezoelectric actuator layer 24 on the surface of the substrate 20, thereby obtaining the attached... Figure 3 The structure shown.

[0026] Reference Appendix Figure 2E and appendix Figure 3The diagram shows a structural schematic of a specific embodiment of the atomizing ion generator of this invention obtained after the above process is completed. The device includes: a substrate 20; a piezoelectric ceramic atomizer with a piezoelectric actuator lower electrode layer 22, a piezoelectric layer 23, and an upper electrode layer 24 on the surface of the substrate 20; an ion generator with a dielectric barrier layer 25, a positive electrode 261 for ion discharge, and a negative electrode 262 on the surface of the atomizer; and a micropore array 27 penetrating the atomizer and the ion generator, which serves as a liquid channel shared by the atomizer and the ion generator. The sidewalls of the micropore array 27 are smooth and without dead corners, preventing liquid accumulation on the sidewalls and facilitating cleaning, thus promoting the continuous and stable implementation of the atomization and ionization processes. The micropore array, used as a liquid channel shared by the atomizer and the ion generator, is an integrated structure that facilitates the miniaturization of the overall device.

[0027] In this specific embodiment, the atomizer is a piezoelectric ceramic atomizer. The piezoelectric ceramic atomizer includes a piezoelectric layer, the material of which is aluminum nitride or PZT, and the thickness is 0.5-50 μm.

[0028] In one specific embodiment, the liquid is water.

[0029] In one specific embodiment, the pore size of the micropore array is 1-200 μm.

[0030] In one specific embodiment, the dielectric barrier layer is made of silicon nitride.

[0031] In one specific embodiment, the ion discharge electrode of the ion generator is a planar interdigitated electrode.

[0032] Appendix Figure 4 The diagram shown illustrates the implementation steps of the method for preparing the atomized ion generator according to a specific embodiment of this invention. (See attached diagram.) Figure 4 The method includes the following steps: Step S20, providing a substrate; Step S21, sequentially forming an insulating isolation layer, a capacitor upper electrode layer, and a dielectric barrier layer on the surface of the substrate; Step S22, using etching to form a micropore array penetrating the insulating isolation layer, the capacitor upper electrode layer, and the dielectric barrier layer to form liquid channels; Step S23, forming positive and negative electrodes for ion discharge on the surface of the dielectric barrier layer, and simultaneously forming a capacitor lower electrode layer electrically in contact with the substrate on the substrate surface; Step S24, removing part of the insulating isolation layer below the capacitor upper electrode layer through deep-hole lateral etching to release a cavity and form an electrostatic capacitive atomizer.

[0033] Appendix Figure 5A To be continued Figure 5EThe diagram shown is a process flow chart of the above method.

[0034] Appendix Figure 5A As shown, referring to step S20, a substrate 30 is provided. In this specific embodiment, the substrate 30 is a silicon substrate. Silicon material has excellent mechanical strength and stability, which can provide reliable physical support for the entire atomizing ion generator, ensuring that the device maintains structural integrity during operation.

[0035] Appendix Figure 5B As shown, referring to step S21, an insulating isolation layer 41, a capacitor upper electrode layer 44, and a dielectric barrier layer 45 are sequentially formed on the surface of the substrate 30.

[0036] The dielectric barrier layer 45 is made of silicon nitride, and the insulating isolation layer 41 is made of silicon oxide. The insulating isolation layer 41 serves as the dielectric layer for the subsequent capacitor structure and can be deposited using thermal oxidation or ion-enhanced chemical vapor deposition, with a thickness of, for example, 0.5-2 μm.

[0037] The preferred material for the upper electrode layer 44 of the capacitor is aluminum (Al), copper (Cu), platinum (Pt), titanium (Ti), gold (Au), or doped polycrystalline silicon. Metallic materials offer excellent conductivity (resistivity ~10). -7 It has high Ω·m and strong chemical stability, making it suitable for forming a good interface contact with the insulating isolation layer 41. The upper electrode layer 44 of the capacitor and the substrate 30 together provide a uniform electric field to excite electrostatic vibration excitation effect, and at the same time serve as a support structure. It can be formed by deposition or magnetron sputtering. In this specific embodiment, the substrate is preferably a highly doped low-resistivity substrate, which is directly used as the lower electrode of the capacitor. Alternatively, a low-resistivity layer can be formed by doping the substrate surface before the process, or a metal layer or doped polycrystalline silicon can be directly formed on the substrate surface as the lower electrode of the capacitor.

[0038] The dielectric barrier layer 45 is preferably made of silicon nitride. The dielectric properties of silicon nitride can induce the formation of uniform micro-discharge channels, avoiding the local arcing generated by traditional corona discharge, thereby reducing the generation of harmful byproducts such as ozone (O3). The dense surface of silicon nitride provides excellent corrosion resistance to water, acids, and alkalis (such as liquids with pH 2-12), allowing for long-term contact with atomized aqueous solutions and preventing performance degradation caused by electrode corrosion.

[0039] Appendix Figure 5CAs shown, referring to step S22, an array of micropores 47 is formed by etching, penetrating the insulating isolation layer 41, the capacitor upper electrode layer 44, and the dielectric barrier layer 45, to form liquid channels. The pore size of the micropore array is 1-200 μm. This size range can balance liquid flow rate and atomization efficiency, ensuring sufficient liquid supply while facilitating efficient atomization and ionization through subsequent electric field action. Different dry or wet etching methods can be used for different layers to gradually etch them, using the same photoresist or hard mask pattern to form a multi-layered micropore array. Because it is formed in the same step, the sidewalls of the micropores are smooth and without dead corners, preventing liquid accumulation on the sidewalls and facilitating cleaning. Therefore, it is beneficial for the continuous and stable implementation of the atomization and ionization process.

[0040] Appendix Figure 5D As shown, referring to step S23, positive electrode 461 and negative electrode 462 for ion discharge are formed on the surface of dielectric barrier layer 45, and simultaneously, a lower electrode layer 43 for capacitor, which is electrically in contact with substrate 30, is formed on the surface of substrate 30. Materials such as aluminum (Al), copper (Cu), platinum (Pt), titanium (Ti), and gold (Au) can be used as the positive electrode 461 and negative electrode 462 for ion discharge and the lower electrode layer 43 for capacitor. A continuous metal layer can be formed by deposition or magnetron sputtering, and then the positive electrode 461 and negative electrode 462 for ion discharge and the lower electrode layer 43 for capacitor can be patterned in one step using photolithography or other methods.

[0041] Appendix Figure 5E As shown, referring to step S24, a portion of the insulating isolation layer 41 below the upper electrode layer 44 of the capacitor is removed by lateral etching using the deep hole array 47, releasing the cavity 48 and forming an electrostatic capacitive atomizing generator. In this specific embodiment, the insulating isolation layer 41 is made of silicon oxide and can be removed by wet etching using a selective etching solution such as hydrofluoric acid. To avoid damage to the dielectric barrier layer 45, other structures that do not need to be removed can be protected and covered in advance using photoresist or the like. For insulating isolation layers 41 made of other materials, a highly selective wet lateral etching solution is required.

[0042] Reference Appendix Figure 5EThe diagram shows a structural schematic of a specific embodiment of the atomizing ion generator of this utility model obtained after the above process is completed. The device includes: a substrate 30; the surface of the substrate 30 includes an insulating isolation layer 41 and a capacitor upper electrode layer 44. The substrate 30 itself serves as the capacitor lower electrode layer, and a capacitor structure is formed through the capacitor lower electrode layer 43 electrically contacting it on the side, constituting an electrostatic capacitive atomizing generator. The electrostatic capacitive atomizing generator induces vibration through an alternating electric field to atomize the liquid in the cavity 38 between the upper and lower electrodes. The surface of the atomizing generator includes a dielectric barrier layer 45, a positive electrode 461 for ion discharge, and a negative electrode 462. A micropore array 47 penetrating the atomizing generator and the ion generator serves as a shared liquid channel for both. The sidewalls of the micropore array 47 are smooth and free of dead corners, preventing liquid accumulation on the sidewalls and facilitating cleaning, thus promoting the continuous and stable implementation of the atomization and ionization processes. The micropore array is used as a liquid channel shared by the atomizer and ionizer, and is an integrated structure that facilitates the miniaturization of the overall device.

[0043] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. An atomizing ion generator, characterized in that, include: Substrate; The atomizing generator on the substrate surface and the dielectric barrier layer discharge ion generator on the surface of the atomizing generator; It also includes a micropore array that runs through the atomizer and the ionizer, the micropore array serving as a liquid channel shared by the atomizer and the ionizer.

2. The atomizing ion generator according to claim 1, characterized in that, The atomizer is selected from either a piezoelectric ceramic atomizer or an electrostatic capacitive atomizer.

3. The atomizing ion generator according to claim 2, characterized in that, The piezoelectric ceramic atomizer includes a piezoelectric layer made of aluminum nitride or PZT with a thickness of 0.5-50 μm.

4. The atomizing ion generator according to claim 1, characterized in that, The liquid is water.

5. The atomizing ion generator according to claim 1, characterized in that, The pore size of the micropore array is 1-200 μm.

6. The atomizing ion generator according to claim 1, characterized in that, The dielectric barrier layer is made of silicon nitride.

7. The atomizing ion generator according to claim 1, characterized in that, The ion discharge electrode of the ion generator is a planar interdigitated electrode.