Switching power supply and control chip used in switching power supply

Abstract

Provided are a switching power supply and a control chip used in the switching power supply. The switching power supply comprises a transformer and a voltage-withstanding power switch tube. The control chip comprises: a power switch tube connected between the gate of the voltage-withstanding power switch tube and the ground, when the voltage-withstanding power switch tube and the power switch tube are both in the on state, the primary inductor of the transformer is grounded via the voltage-withstanding power switch tube and the power switch tube; a self-powered switch, a first end of which is connected to a chip power supply capacitor used for supplying power to the control chip, and a second end of which is connected to the source of the voltage-withstanding power switch tube; a high-voltage starting switch, a first end of which is connected to the chip power supply capacitor via a current setting unit, and a second end of which is connected to the source of the voltage-withstanding power switch tube, and the default state of the high-voltage starting switch when the control chip is powered on is the on state; and the current setting unit is configured to generate a fixed-size charging current for charging the chip power supply capacitor based on the primary inductor current of the transformer when the high-voltage starting switch is in the on state.

Description

Technical Field

[0001] This utility model relates to the field of circuits, and in particular to a switching power supply and a control chip used in the switching power supply. Background Technology

[0002] A switching power supply, also known as a switching converter or switching power supply, is a type of power supply. The function of a switching power supply is to convert a DC or AC voltage into the voltage or current required by the user through different architectures (such as flyback, forward, buck, or boost architectures). Utility Model Content

[0003] According to an embodiment of the present invention, a control chip for use in a switching power supply is provided, wherein the switching power supply includes a transformer and a high-voltage power switching transistor. The control chip includes: a power switching transistor connected between the gate of the high-voltage power switching transistor and ground; when both the high-voltage power switching transistor and the power switching transistor are in the ON state, the primary inductance of the transformer is grounded through the high-voltage power switching transistor and the power switching transistor; and a self-powered switch, the first terminal of which is connected to a chip power supply capacitor for powering the control chip, and the second terminal of which is connected to the source of the high-voltage power switching transistor, for controlling the transformer when the switching power supply is in normal operating condition. The primary inductor current charges the chip's power supply capacitor via a voltage-rated power switch; a high-voltage start switch, whose first terminal is connected to the chip's power supply capacitor via a current setting unit and whose second terminal is connected to the source of the voltage-rated power switch, is in a conducting state by default when the control chip is first powered on, and is used to control the primary inductor current of the transformer to charge the chip's power supply capacitor via the voltage-rated power switch during the control chip's startup process; and a current setting unit, configured to generate a fixed-magnitude charging current for charging the chip's power supply capacitor based on the primary inductor current of the transformer when the high-voltage start switch is in the conducting state.

[0004] In some embodiments, the control chip further includes a chip power supply diode, the anode of which is connected to the source of the voltage-resistant power switch and the cathode is connected to the second terminal of the self-powered switch, for preventing reverse current from the chip power supply capacitor to the power switch.

[0005] In some embodiments, the control chip further includes a chip power supply diode, the anode of which is connected to the first terminal of the self-powered switch and the cathode of which is connected to the chip power supply capacitor, for preventing current backflow from the chip power supply capacitor to the power switch.

[0006] In some embodiments, the control chip further includes a power supply voltage detection unit, which is configured to generate a switch control signal for controlling the high-voltage start switch to change from an on state to an off state when the chip power supply voltage on the chip power supply capacitor reaches the undervoltage protection threshold of the control chip.

[0007] In some embodiments, the control chip further includes a light-load power supply switch. The first end of the light-load power supply switch is connected to the chip power supply capacitor via a current setting unit, and the second end is connected to the source of a voltage-resistant power switch. The switch is used to control the primary inductance current of the transformer to charge the chip power supply capacitor via the voltage-resistant power switch when the switching power supply is in a light-load operating state. The current setting unit is also configured to generate a fixed charging current for charging the chip power supply capacitor based on the primary inductance current of the transformer when the light-load power supply switch is in the on state.

[0008] In some embodiments, the control chip further includes a self-powered control unit configured to generate a switching control signal for controlling the on and off of the self-powered switch based on the chip supply voltage on the chip supply capacitor and a pulse width modulation control signal for controlling the system operating frequency of the switching power supply.

[0009] In some embodiments, the control chip further includes a self-powered control unit configured to generate a switching control signal for controlling the on and off of a light-load power supply switch based on the chip supply voltage on the chip supply capacitor and a pulse width modulation control signal for controlling the system operating frequency of the switching power supply.

[0010] In some embodiments, the self-powered control unit includes a first voltage divider resistor, a second voltage divider resistor, a hysteresis comparator, a first two-input AND gate, a second two-input AND gate, and a two-input NOR gate. The first and second voltage divider resistors are connected in series between the chip power supply voltage and ground. The non-inverting input of the hysteresis comparator is connected to the connection point between the first and second voltage divider resistors, and the inverting input is used to receive a preset power supply voltage threshold. The first input of the first two-input AND gate is connected to the output of the hysteresis comparator, and the second input is used to receive a minimum charging time indication signal. The first input of the two-input NOR gate is connected to the output of the first two-input AND gate, and the second input is used to receive a maximum charging ratio indication signal. The first input of the second two-input AND gate is connected to the output of the two-input NOR gate, and the second input is used to receive a pulse width modulation control signal. The output outputs a switching control signal for the self-powered switch. The minimum charging time indication signal indicates that the charging time of the chip power supply capacitor reaches a preset minimum charging time. The maximum charging ratio indication signal indicates that the ratio of the charging time of the chip power supply capacitor to the duration of the pulse width modulation control signal being high reaches a preset maximum ratio.

[0011] In some embodiments, the self-powered control unit includes a first voltage divider resistor, a second voltage divider resistor, a hysteresis comparator, a two-input AND gate, a first inverter, and a second inverter, wherein: the first voltage divider resistor and the second voltage divider resistor are connected in series between the chip power supply voltage and ground; the non-inverting input of the hysteresis comparator is connected to the connection point between the first voltage divider resistor and the second voltage divider resistor, and the inverting input is used to receive a preset light-load power supply threshold; the input of the first inverter is connected to the output of the hysteresis comparator; the input of the second inverter is used to receive a pulse width modulation control signal; the first terminal of the two-input AND gate is connected to the output of the first inverter, the second terminal is connected to the output of the second inverter, and the output terminal outputs a switching control signal for the light-load power supply switch.

[0012] In some embodiments, the control chip further includes a gate discharge diode, a bleed resistor, and a charging resistor, wherein the gate discharge diode and the bleed resistor are connected in series between the gate of the voltage-rated power switch and ground, and the charging resistor is connected between the gate of the voltage-rated power switch and ground and in parallel with the gate discharge diode and the bleed resistor.

[0013] In some embodiments, the voltage-resistant power switch is implemented using a D-GaN device. Attached Figure Description

[0014] The present invention can be better understood from the following description of specific embodiments in conjunction with the accompanying drawings, wherein: Figure 1 A schematic diagram of a typical flyback switching power supply system architecture is shown.

[0015] Figure 2 A schematic diagram of the system architecture of a flyback switching power supply according to an embodiment of the present invention is shown.

[0016] Figure 3 It shows Figure 2 The diagram shows the timing and waveform of the control signals in the control chip when the flyback switching power supply is in a non-light load operating state.

[0017] Figure 4 It shows Figure 2 The diagram shows a schematic of the logic structure of an example implementation of a self-powered control unit.

[0018] Figure 5 It shows Figure 2 The diagram shows the timing and waveform of the control signals in the control chip U3 when the flyback switching power supply is in a light-load operating state.

[0019] Figure 6 A schematic diagram of another system architecture for a flyback switching power supply according to an embodiment of the present invention is shown. Detailed Implementation

[0020] The features and exemplary embodiments of various aspects of this utility model will now be described in detail. In the following detailed description, numerous specific details are set forth in order to provide a comprehensive understanding of this utility model. However, it will be apparent to those skilled in the art that this utility model can be practiced without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this utility model by illustrating examples of it. This utility model is by no means limited to any specific configuration set forth below, but covers any modifications, substitutions, and improvements to elements and components without departing from the spirit of this utility model. In the accompanying drawings and the following description, well-known structures and techniques are not shown in order to avoid causing unnecessary obscurity to this utility model. Furthermore, it should be noted that the term "connected to B" as used herein can mean "directly connected to B" or "indirectly connected to B via one or more other elements."

[0021] In a flyback switching power supply, a control chip controls the on / off state of the power switching transistors, thereby controlling energy transfer. Since the control chip itself consumes electrical energy, it requires a power supply. Figure 1 A schematic diagram of a typical flyback switching power supply system architecture is shown. Figure 1As shown, the flyback switching power supply 100 includes a full-wave rectifier BD1, an input capacitor C1, a transformer T1 with an auxiliary winding L2, a synchronous rectifier diode D1, an output capacitor C2, a control chip U1, a chip power supply capacitor C3, a chip power supply diode D2, a high-voltage startup unit U2, and a high-voltage power switching transistor M1. During system operation, the AC input voltage is rectified by the full-wave rectifier BD1, generating a rectified input voltage VIN across the input capacitor C1. The high-voltage power switching transistor M1 withstands the high voltage from the rectified input voltage VIN to ground, implemented by a depletion-mode device, such as a laterally conducting GaN (D-GaN) device or a junction field-effect transistor (JFET). Currently, the control chip U1 includes a pulse width modulation (PWM) control unit U11, a switching transistor drive unit U12, and a power switching transistor M2. It drives the switching of the voltage-rated power switching transistor M1 by controlling the on / off state of the power switching transistor M2. During the startup phase of the control chip U1, the high-voltage startup unit U2 (usually implemented by a high-voltage resistor) and the chip power supply capacitor C3 form the chip power supply path. At this time, the chip power supply voltage VCC is provided by the chip power supply capacitor C3. When the chip power supply voltage VCC reaches the undervoltage protection threshold of the control chip U1, the control chip U1 starts working. At this time, the chip power supply voltage VCC is provided by the auxiliary winding L2 via the chip power supply diode D2. This chip power supply method results in significant power loss, thus reducing the system's power conversion efficiency. Simultaneously, the high-voltage startup unit U2 and the chip power supply diode D2 increase the number of peripheral devices for the control chip U1, increasing the system size and cost. Furthermore, if a JFET is used as the power switching transistor M1, integrating the JFET into the control chip U1 would require additional processing steps, increasing system cost. Additionally, the significant heat generated by the JFET would reduce the lifespan and reliability of the control chip U1. Moreover, depletion-type devices like D-GaN and JFETs are not easily controlled directly, as their gates are directly grounded, leading to substantial electromagnetic interference issues in low-power power supplies.

[0022] In view of the above, a switching power supply and a control chip used in the switching power supply according to an embodiment of the present invention are proposed. The primary inductance of the transformer can be used as part of the chip power supply path to power the control chip, thereby improving the system integration of the switching power supply and reducing the system cost.

[0023] Figure 2 A schematic diagram of the system architecture of a flyback switching power supply according to an embodiment of the present invention is shown. Figure 1 and Figure 2As shown, the main difference between the flyback switching power supply 200 and the flyback switching power supply 100 is that the peripheral devices of the control chip U3 omit the chip power supply diode D2 and the high-voltage start-up unit U2. The control chip U3 includes a self-powered switch S1, a high-voltage start-up switch S3, a PWM control unit U31, a power supply voltage detection unit U32, a self-powered control unit U33, a current setting unit U34, a constant voltage drive control unit U35, and a switching transistor drive unit U36. Specifically, the first terminal of the self-powered switch S1 is connected to the chip power supply capacitor C3, and the second terminal is connected to the source of the withstand voltage power switching transistor M1. This is used to control the primary inductance current of the transformer T1 during normal system operation. The high-voltage power switch M1 charges the chip power supply capacitor C3; the first terminal of the high-voltage start switch S3 is connected to the chip power supply capacitor C3 via the current setting unit U34, and the second terminal is connected to the source of the high-voltage power switch M1. The default state when the control chip U3 is powered on is the on state, used to control the primary inductance current of the transformer T1 to charge the chip power supply capacitor C3 via the high-voltage power switch M1 during the start-up process of the control chip U3; the PWM control unit U31 is configured to generate a PWM control signal for controlling the operating frequency of the system; the power supply voltage detection unit U32 is configured to detect when the chip power supply voltage VCC on the chip power supply capacitor C3 reaches the undervoltage protection threshold V of the control chip U3. UVLO_OFF At the same time, a switch control signal S3_off is generated to control the high-voltage start switch S3 from the on state to the off state; the self-powered control unit U33 is configured to generate a switch control signal EN_S1 to control the on and off of the self-powered switch S1 based on the chip power supply voltage VCC and the PWM control signal; the current setting unit U34 is configured to generate a fixed-size start-up state charging current I for charging the chip power supply capacitor C3 based on the primary inductance current of the transformer T1 when the high-voltage start switch S3 is in the on state. startup The constant voltage drive control unit U35 is configured to generate a constant voltage drive control signal based on the PWM control signal to keep the output voltage of the control system constant; the switching transistor drive unit U36 is configured to generate a switching transistor drive signal EN_M2 based on the constant voltage drive control signal to drive the power switching transistor M2 to turn on and off. The power switching transistor M2 is connected between the withstand voltage power switching transistor M1 and ground. When both the withstand voltage power switching transistor M1 and the power switching transistor M2 are in the on state, the primary inductance of the transformer T1 is grounded through the withstand voltage power switching transistor M1 and the power switching transistor M2.

[0024] exist Figure 2In the flyback switching power supply 200 shown, when the withstand voltage power switch M1 is in the on state, if the self-powered switch S1 and the power switch M2 are both in the on state, the primary inductance current of the transformer T1 flows to ground through the power switch M2 and does not charge the chip power supply capacitor C3 through the self-powered switch S1. It should be noted that the self-powered switch S1, the high-voltage start switch S3, and the current setting unit U34 constitute the self-powered control system of the control chip U3, which can improve the power conversion efficiency of the flyback switching power supply 200.

[0025] like Figure 2 As shown, in some embodiments, the control chip U3 further includes a light-load power supply switch S2. The first terminal of the light-load power supply switch S2 is connected to the chip power supply capacitor C3 via a current setting unit U34, and the second terminal is connected to the source of a high-voltage power switch M1. This is used to control the primary inductance current of the transformer T1 to charge the chip power supply capacitor C3 via the high-voltage power switch M1 when the system is in a light-load operating state. Correspondingly, the self-powered control unit U33 is also configured to generate a switch control signal EN_S2 based on the chip power supply voltage VCC and the PWM control signal to control the on and off of the light-load power supply switch S2. The current setting unit U34 is also configured to generate a fixed-size light-load charging current I for charging the chip power supply capacitor C3 based on the primary inductance current of the transformer T1 when the light-load power supply switch S2 is in the on state. charge .

[0026] like Figure 2 As shown, in some embodiments, the control chip U3 also includes a chip power supply diode D2. The anode of the chip power supply diode D2 is connected to the source of the withstand voltage power switch M1, and the cathode is connected to the second terminal of the self-powered switch S1. This is used to prevent the current from flowing back from the chip power supply capacitor C3 to the power switch M2, which would cause the chip power supply capacitor C3 to have insufficient power supply capability to the control chip U3.

[0027] like Figure 2As shown, in some embodiments, the high-voltage power switch M1 is implemented using a D-GaN device. The control chip U3 also includes a gate discharge diode D3, a bleed resistor R1, and a charging resistor R2. The gate discharge diode D3 and the bleed resistor R1 are connected in series between the gate of the high-voltage power switch M1 and ground. The charging resistor R2 is connected between the gate of the high-voltage power switch M1 and ground and is connected in parallel with the gate discharge diode D3 and the bleed resistor R1. Here, after the power switch M2 changes from the on state to the off state, when the high-voltage power switch M1 changes from the on state to the off state, the capacitively coupled charge between the gate and drain of the high-voltage power switch M1 is discharged through the gate discharge diode D3, the bleed resistor R1, and the charging resistor R2 connected in parallel, thus limiting the rapid change of the gate voltage of the high-voltage power switch M1. When the power supply switch S1 or the power switch M2 changes from the off state to the on state, the voltage-rated power switch M1 quickly changes from the off state to the on state. The drain voltage of the voltage-rated power switch M1 is rapidly pulled down from the rectified input voltage, and the gate voltage of the voltage-rated power switch M1 is coupled from 0 to a negative voltage and then charged to 0V through the charging resistor R2. This limits the rapid change in the gate voltage of the voltage-rated power switch M1. In other words, the gate discharge diode D3, the discharge resistor R1, and the charging resistor R2 are used to limit the rapid change in the gate voltage of the voltage-rated power switch M1, thus providing good electromagnetic interference performance.

[0028] like Figure 2 As shown, in some embodiments, the power-on time of the control chip U3 (i.e., the startup state charging current I) is... startup The duration t of charging the chip's power supply capacitor C3 startup =C3*V UVLO_OFF / I startup When the control chip U3 is powered on and in normal working condition, the high-voltage start switch S3 remains in the off state.

[0029] Figure 3 It shows Figure 2 The diagram shows the timing and waveform of the control signals in the control chip U3 when the flyback switching power supply is in a non-light load operating state. In this diagram, VCC represents the chip supply voltage used to control chip U3, PWM represents the PWM control signal generated by the PWM control unit U31, IL represents the primary inductance current of transformer T1, EN_S1 represents the switching control signal used to power the self-powered switch S1, I_charge represents the charging current used to power the chip supply capacitor C3, and EN_M2 represents the switching drive signal used to power the switching transistor M2.

[0030] like Figure 3As shown, when the PWM control signal from the PWM control unit U31 changes from low level to high level, that is, at time t1, the switching control signal for the self-powered switch S1 changes from low level to high level, the self-powered switch S1 changes from the off state to the on state, the source voltage of the withstand voltage power switch M1 decreases, and the gate-source voltage reaches below the conduction threshold voltage of the withstand voltage power switch M1. The withstand voltage power switch M1 changes from the off state to the on state, the primary inductance current of the transformer T1 begins to gradually increase and charges the chip power supply capacitor C3. At this time, the switching drive signal for the power switch M2 is low level, and the power switch M2 is in the off state. During the time interval t2-t3, the switching control signal for the self-powered switch S1 is low, and the self-powered switch S1 is in the off state. The switching drive signal for the power switch M2 is high, and the power switch M2 is in the on state. The withstand voltage power switch M1 is also in the on state. The primary current of the transformer T1 continues to increase and flows to ground through the power switch M2 (note that the power switch M2 and the self-powered switch S1 can be in the on state simultaneously for a very short time). During the time interval t3-t4, the switching drive signal for the power switch M2 is low, and the power switch M2 is in the off state. At this time, the withstand voltage power switch M1 has no path to ground and is in the off state. The primary inductance current of the transformer T1 drops to zero. During the t4-t5 period, after the PWM control signal changes from low level to high level, due to the high chip supply voltage VCC, the power consumed by the control chip U3 in one working cycle does not reach the hysteresis of the supply voltage threshold VCC_charge. Therefore, when the charging time of the chip supply capacitor C3 (i.e., the time when the self-powered switch S1 is in the on state) reaches the preset minimum charging time, the self-powered switch S1 changes from the on state to the off state, and the chip supply capacitor C3 stops charging.

[0031] Figure 4 It shows Figure 2 The diagram shows a schematic of the logic structure of an example implementation of the self-powered control unit U34. Figure 4As shown, the self-powered control unit U34 includes voltage divider resistors R4 and R5, hysteresis comparators CMP1 and CMP2, two-input AND gates I1, I3, and I5, a two-input NOR gate I2, and inverters I4 and I6. Vref_char is a voltage divider threshold proportional to the supply voltage threshold VCC_charge when the control chip U3 is in normal operating state (e.g., Vref_char = 1 / 4 * VCC_charge). Dchar_max is a maximum charging ratio indicator signal indicating that the ratio between the charging time of the chip power supply capacitor C3 and the duration of the PWM control signal being high in each working cycle reaches a preset maximum ratio. tchar_min is a minimum charging time indicator signal indicating that the charging time of the chip power supply capacitor C3 reaches a preset minimum charging time in each working cycle.

[0032] like Figure 4 As shown, in some embodiments, voltage divider resistors R4 and R5 are connected in series between the chip supply voltage VCC and ground. The non-inverting input of hysteresis comparator CMP1 is connected to the connection point between voltage divider resistors R4 and R5, and the inverting input is used to receive the supply voltage divider threshold Vref_char. The first input of the two-input AND gate I1 is connected to the output of hysteresis comparator CMP1, and the second input is used to receive the minimum charging time indication signal tchar_min. The first input of the two-input NOR gate I2 is connected to the output of two-input AND gate I1, and the second input is used to receive the maximum charging ratio indication signal Dchar_max. The first input terminal of I3 is connected to the output terminal of the two-input NOR gate I2, the second input terminal is used to receive the PWM control signal, and the output terminal outputs the switching control signal EN_S1 for the self-powered switch S1. The non-inverting input terminal of the hysteresis comparator CMP2 is connected to the connection point between the voltage divider resistors R4 and R5. The input terminal of the inverter I4 is connected to the output terminal of the hysteresis comparator CMP2. The input terminal of the inverter I6 is used to receive the PWM control signal. The first input terminal of the two-input AND gate I5 is connected to the output terminal of the inverter I4, the second input terminal is connected to the output terminal of the inverter I6, and the output terminal outputs the switching control signal EN_S2 for the light-load power supply switch S2.

[0033] like Figure 4As shown, in some embodiments, when the chip supply voltage VCC is low, the output signal of the hysteresis comparator CMP1 is low, and the output signal of the two-input NOR gate I2 is high. When the PWM control signal changes from low to high, the switching control signal EN_S1 for the self-powered switch S1 changes from low to high, the self-powered switch S1 changes from the off state to the on state, and the primary inductance current of the transformer T1 begins to charge the chip supply capacitor C3 through the withstand voltage power switch M1 and the self-powered switch S1. When the chip supply voltage VCC reaches the supply voltage threshold VCC_charge (that is, the chip supply voltage VCC_div generated by the voltage divider resistors R4 and R5 dividing the chip supply voltage VCC reaches the supply voltage threshold Vref_char), the output signal of the hysteresis comparator CMP1 changes from low level to high level, the output signal of the two-input NOR gate I2 changes from high level to low level, the switch control signal EN_S1 for the self-powered switch S1 changes from high level to low level, the self-powered switch S1 changes from the on state to the off state, and the chip supply capacitor C3 stops charging. If the control chip U3 consumes relatively little power in one working cycle, and the output signal of the hysteresis comparator CMP1 does not change from high to low, then when the minimum charging time indicator signal tchar_min changes from low to high, the output signal of the two-input AND gate I1 changes from low to high, the output signal of the two-input NOR gate I2 changes from high to low, and the switching control signal EN_S1 for the self-powered switch S1 changes from high to low. The self-powered switch S1 changes from the on state to the off state, and the chip power supply capacitor C3 stops charging. Using the minimum charging time indicator signal tchar_min to control the off of the self-powered switch S1 can ensure the smooth and continuous charging of the chip power supply capacitor C3 in case of abnormal conditions.

[0034] like Figure 4As shown, when the flyback switching power supply 200 is in a non-light load operating state, the output signal of the hysteresis comparator CMP2 is always high, the switching control signal EN_S2 for the light load power supply switch S2 is always low, and the light load power supply switch S2 is always in the off state. When the flyback switching power supply 200 is in a light-load operating state, the chip supply voltage VCC is low, the charging time of the chip supply capacitor C3 is long, and the output signal of the hysteresis comparator CMP1 remains low without changing to high. When the ratio between the charging time of the chip supply capacitor C3 and the duration of the PWM control signal being high reaches its maximum value, the maximum charging ratio indicator signal Dchar_max changes from low to high, and the switching control signal EN_S1 for the self-powered switch S1 changes from high to low, stopping the charging of the chip supply capacitor C3. When the chip supply voltage divider VCC_div decreases to the light-load supply threshold Vref_low, the output signal of the hysteresis comparator CMP2 changes from high to low. When the PWM control signal changes from high to low, the switching control signal EN_S2 for the light-load supply switch S2 changes from low to high, and the light-load supply switch S2 changes from off to on. The primary inductor current of the transformer T1 begins to charge the chip supply capacitor C3 through the withstand voltage power switch M1 and the light-load supply switch S2. It should be understood that the self-powered switch S1 and the light-load power supply switch S2 will not be in the on state at the same time.

[0035] like Figure 3 As shown, when the chip power supply capacitor C3 stops charging, the power switch M2 changes from the off state to the on state, and the primary inductance current of transformer T1 flows to ground through the withstand voltage power switch M1 and the power switch M2. In other words, the control chip U3 is powered by the primary inductance current of transformer T1, avoiding power supply from the auxiliary winding of transformer T1 or other circuits, thus improving the system's power conversion efficiency. When the flyback switching power supply 200 is in normal operation, the power supply current for the chip power supply capacitor C3 is controlled by turning the self-powered switch S1 on and off, maintaining a stable charging current and charge regardless of changes in the rectified input voltage.

[0036] Figure 5 It shows Figure 2The diagram shows the timing and waveform of the control signals in the control chip U3 when the flyback switching power supply is in a light-load operating state. In this diagram, VCC represents the chip supply voltage used to control chip U3, PWM represents the PWM control signal generated by the PWM control unit U31, IL represents the primary inductance current of transformer T1, EN_S1 represents the switching control signal used for the self-powered switch S1, I_charge represents the charging current used for the chip power supply capacitor C3, and EN_S2 represents the switching transistor drive signal used for the light-load power supply switch S2.

[0037] like Figure 5 As shown, when the flyback switching power supply 200 is in a light-load operating state, due to the small primary inductance current of transformer T1, the charging time of the chip power supply capacitor C3 is too long, which will affect the time it takes for the subsequent power switch M2 to change from the off state to the on state, thus affecting the stability of the loop control. Therefore, when the ratio between the charging time of the chip power supply capacitor C3 and the duration of the PWM control signal being high reaches the preset maximum ratio (i.e., the maximum charging ratio indicator signal Dchar_max changes from low to high), the self-powered switch S1 changes from the on state to the off state, and the chip power supply capacitor C3 stops charging. If the power supply in a single working cycle is insufficient to meet the consumption after the ratio between the charging time of the chip power supply capacitor C3 and the duration of the PWM control signal being high reaches its maximum value, i.e., the power supply is insufficient when the self-powered switch S1 is in the on state, then when the chip power supply voltage VCC_div generated by the voltage divider resistors R4 and R5 dividing the chip power supply voltage VCC is lower than the light load power supply threshold Vref_low, the output signal of the hysteresis comparator CMP2 changes from low level to high level. After the PWM control signal changes from the on state to the off state for a period of time, the switching control signal EN_S2 used for the light load power supply switch S2 changes from low level to high level, and the light load power supply switch S2 changes from the off state to the on state. The primary inductance current of the transformer T1 continuously charges the chip power supply capacitor C3 through the withstand voltage power switch M1, the light load power supply switch S2, and the current setting unit U34, so that the chip power supply voltage VCC can be stabilized at around 4*Vref_low when the flyback switching power supply 200 is in the light load working state.

[0038] Figure 6 A schematic diagram of another system architecture for a flyback switching power supply according to an embodiment of the present invention is shown. Figure 2 and Figure 6As shown, the main difference between the flyback switching power supply 600 and the flyback switching power supply 200 is that the anode of the chip power supply diode D2 is connected to the first terminal of the self-powered switch S1, and the cathode is connected to the chip power supply capacitor C3. After the self-powered switch S1 changes from the on state to the off state, when there is an interference negative voltage at the source of the voltage-rated power switch M1, the chip power supply diode D2 will not conduct, and the voltage at its cathode will still be approximately equal to the chip power supply voltage VCC, which will not affect the control of the power supply switch S1. This can effectively reduce the interference of the interference negative voltage at the source of the voltage-rated power switch M1 on the self-powered switch S1. When there is an interference positive voltage at the source of the voltage-rated power switch M1, since the self-powered switch S1 is in the off state, it will not affect the chip power supply voltage VCC.

[0039] It should be noted that the control chip used in switching power supplies according to the embodiments of this utility model is also applicable to switching power supplies with various architectures such as BUCK and BOOST.

[0040] The features, structures, or characteristics described above can be combined in any suitable manner in one or more embodiments. Numerous specific details have been provided in the above description to give a full understanding of embodiments of the present invention. However, those skilled in the art will recognize that the technical solutions of the present invention can be practiced without one or more of the specific details described, or other methods, components, materials, etc., can be employed. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the main technical concept of the present invention.

Claims

1. A control chip used in a switching power supply, characterized in that, The switching power supply includes a transformer and a high-voltage power switching transistor, and the control chip includes: A power switch transistor is connected between the gate of the withstand voltage power switch transistor and ground. When both the withstand voltage power switch transistor and the power switch transistor are in the on state, the primary inductance of the transformer is grounded through the withstand voltage power switch transistor and the power switch transistor. The self-powered switch has a first terminal connected to a chip power supply capacitor for powering the control chip and a second terminal connected to the source of the voltage-resistant power switch. It is used to control the primary inductance current of the transformer to charge the chip power supply capacitor through the voltage-resistant power switch when the switching power supply is in normal working condition. A high-voltage start switch, the first terminal of which is connected to the chip power supply capacitor via a current setting unit, and the second terminal connected to the source of the withstand voltage power switch, is in a conducting state by default when the control chip is first powered on. This switch is used to control the charging of the chip power supply capacitor via the withstand voltage power switch by the primary inductance current of the transformer during the control chip startup process; and The current setting unit is configured to generate a fixed charging current for charging the chip power supply capacitor based on the primary inductance current of the transformer when the high-voltage start switch is in the on state.

2. The control chip according to claim 1, characterized in that, The control chip also includes a chip power supply diode, the anode of which is connected to the source of the voltage-resistant power switch and the cathode of which is connected to the second terminal of the self-powered switch, in order to prevent current backflow from the chip power supply capacitor to the power switch.

3. The control chip according to claim 1, characterized in that, The control chip also includes a chip power supply diode, the anode of which is connected to the first terminal of the self-powered switch and the cathode of which is connected to the chip power supply capacitor, in order to prevent current backflow from the chip power supply capacitor to the power switch.

4. The control chip according to claim 1, characterized in that, The control chip also includes a power supply voltage detection unit, which is configured to generate a switch control signal to control the high-voltage start switch to change from the on state to the off state when the chip power supply voltage on the chip power supply capacitor reaches the undervoltage protection threshold of the control chip.

5. The control chip according to claim 1, characterized in that, The control chip also includes a light-load power supply switch. The first end of the light-load power supply switch is connected to the chip power supply capacitor via the current setting unit, and the second end is connected to the source of the withstand voltage power switch. When the switching power supply is in a light-load operating state, the switch controls the primary inductance current of the transformer to charge the chip power supply capacitor via the withstand voltage power switch. The current setting unit is also configured to generate a fixed charging current for charging the chip power supply capacitor based on the primary inductance current of the transformer when the light-load power supply switch is in the on state.

6. The control chip according to claim 1, characterized in that, The control chip also includes a self-powered control unit, which is configured to generate a switching control signal for controlling the on and off of the self-powered switch based on the chip power supply voltage on the chip power supply capacitor and a pulse width modulation control signal for controlling the system operating frequency of the switching power supply.

7. The control chip according to claim 5, characterized in that, The control chip also includes a self-powered control unit, which is configured to generate a switching control signal for controlling the on and off of the light-load power supply switch based on the chip power supply voltage on the chip power supply capacitor and a pulse width modulation control signal for controlling the system operating frequency of the switching power supply.

8. The control chip according to claim 6, characterized in that, The self-powered control unit includes a first voltage divider resistor, a second voltage divider resistor, a hysteresis comparator, a first two-input AND gate, a second two-input AND gate, and a two-input NOR gate.

9. The control chip according to claim 8, characterized in that, The first and second voltage divider resistors are connected in series between the chip power supply voltage and ground. The non-inverting input of the hysteresis comparator is connected to the connection point between the first and second voltage divider resistors, and the inverting input is used to receive a preset power supply voltage divider threshold. The first input of the first two-input AND gate is connected to the output of the hysteresis comparator, and the second input is used to receive a minimum charging time indication signal. The first input of the two-input NOR gate is connected to the output of the first two-input AND gate, and the second input is used to receive a maximum charging ratio indication signal. The first input of the second two-input AND gate is connected to the output of the two-input NOR gate, and the second input is used to receive the pulse width modulation control signal. The output outputs a switching control signal for the self-powered switch. The minimum charging time indication signal indicates that the charging time of the chip power supply capacitor has reached a preset minimum charging time. The maximum charging ratio indication signal indicates that the ratio of the charging time of the chip power supply capacitor to the duration of the pulse width modulation control signal being high has reached a preset maximum ratio.

10. The control chip according to claim 7, characterized in that, The self-powered control unit includes a first voltage divider resistor, a second voltage divider resistor, a hysteresis comparator, a two-input AND gate, a first inverter, and a second inverter.

11. The control chip according to claim 10, characterized in that, The first voltage divider resistor and the second voltage divider resistor are connected in series between the chip power supply voltage and ground. The non-inverting input of the hysteresis comparator is connected to the connection point between the first voltage divider resistor and the second voltage divider resistor, and the inverting input is used to receive a preset light-load power supply threshold. The input of the first inverter is connected to the output of the hysteresis comparator, and the input of the second inverter is used to receive the pulse width modulation control signal. The first terminal of the two-input AND gate is connected to the output of the first inverter, the second terminal is connected to the output of the second inverter, and the output terminal outputs a switching control signal for the light-load power supply switch.

12. The control chip according to claim 1, characterized in that, The control chip also includes a gate discharge diode, a bleed resistor, and a charging resistor. The gate discharge diode and the bleed resistor are connected in series between the gate of the voltage-resistant power switch and ground. The charging resistor is connected between the gate of the voltage-resistant power switch and ground and is connected in parallel with the gate discharge diode and the bleed resistor.

13. The control chip according to claim 1, characterized in that, The voltage-resistant power switch is implemented using a D-GaN device.

14. A switching power supply, comprising the control chip according to any one of claims 1 to 13.

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