A switching output interface circuit for a recoverable launch vehicle

CN224863022UActive Publication Date: 2026-10-16BEIJING LANDSPACETECH CO LTD
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Patent Information

Application Number
CN202522350420.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2025-01-17
Filing Date
2025-11-05
Publication Date
2026-10-16
Estimated Expiration
2035-11-05

AI Technical Summary

Technical Problem

[0004]传统的开关量接口电路一般采用高质量等级的继电器实现,该方式设计的开关量输出接口电路体积较大,成本较高,很难满足低成本、小型化和轻质化的需求

Benefits of technology

[0017] This utility model provides a switching output interface circuit for reusable launch vehicles, which significantly reduces costs while ensuring reliability, and also reduces size and weight, increases the driving power supply, and greatly improves the versatility of the back-end actuation device.

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Abstract

The utility model provides a kind of switch output interface circuit for recyclable launch vehicle. The circuit at least includes driving power supply, first switch combination and second switch combination arranged in series successively;Wherein, the first switch combination at least includes first switch module and second switch module arranged in parallel;The second switch combination at least includes third switch module and fourth switch module arranged in parallel;Each switch module at least includes isolated switch driver, NMOS tube and the primary side power supply for powering the isolated switch driver;The input end of the isolated switch driver is used to receive control signal, and its output end is connected with the gate G of the NMOS tube;After the switch driver receives the control signal, it is converted into first drive signal, and the corresponding NMOS tube is driven to act by the first drive signal;When the first drive signal is greater than the opening threshold voltage of NMOS tube, the drain D and source S of NMOS tube are closed conduction.
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Description

[0001] This application claims priority to an earlier patent application entitled "A Switch Output Interface Circuit" with patent application number "202520107954.6", the contents of which are incorporated herein by reference in their entirety. Technical Field

[0002] This utility model relates to the field of avionics systems for launch vehicles, and in particular to a switch output interface circuit for reusable launch vehicles. Background Technology

[0003] In the avionics systems of launch vehicles, switching interface circuits are commonly used to drive actuating devices such as solenoid valves and pyrotechnics, enabling them to change states. With the increasing urgency for rockets to achieve greater payload capacity, lower cost, higher reliability, and reusability, the number of switching interface circuits is increasing, placing higher demands on their economy, miniaturization, lightweight design, and high reliability.

[0004] Traditional digital input / output (DIO) interface circuits typically employ high-quality relays. This approach results in bulky and expensive circuits, making it difficult to meet the demands for low cost, miniaturization, and lightweight design. Therefore, there is an urgent need for a low-cost, miniaturized, and highly reliable DIO interface circuit suitable for reusable launch vehicles. Utility Model Content

[0005] To address the aforementioned technical problems, this utility model proposes a switch output interface circuit for reusable launch vehicles. This circuit significantly reduces size and weight while ensuring reliability, lowers costs, increases drive current, and improves the versatility of the back-end actuation device, thus meeting the technical requirements of reusable launch vehicles.

[0006] This invention provides a switching output interface circuit for a reusable launch vehicle, comprising at least: a driving power supply, a first switch assembly, and a second switch assembly connected in series; wherein, the first switch assembly includes at least a first switch module and a second switch module connected in parallel; the second switch assembly includes at least a third switch module and a fourth switch module connected in parallel; each switch module includes at least a switch driver, an NMOS transistor, and a primary-side power supply for powering the switch driver; the input terminal of the switch driver is used to receive a control signal, and its output terminal is connected to the gate G of the NMOS transistor; after receiving the control signal, the switch driver converts it into a first driving signal, and drives the corresponding NMOS transistor to operate through the first driving signal; when the first driving signal is greater than the turn-on threshold voltage of the NMOS transistor, the drain D and source S of the NMOS transistor are closed and turned on.

[0007] In one embodiment, the first switch assembly further includes a fifth switch module; the fifth switch module and the first switch module are connected in series and then connected in parallel with the second switch module.

[0008] In one embodiment, the drain D of the NMOS transistor in the first switching module is connected to the driving power supply; the drain D of the NMOS transistor in the fifth switching module is connected to the source S of the NMOS transistor in the first switching module; the drain D of the NMOS transistor in the second switching module is connected to the driving power supply; the drain D of the NMOS transistor in the third switching module is connected to the source S of both the second and fifth switching modules; the drain D of the NMOS transistor in the fourth switching module is connected to the source S of both the second and fifth switching modules; and the source S of the NMOS transistors in the third and fourth switching modules are used to output a second driving signal.

[0009] In one embodiment, the switch output interface circuit is turned on when the first switch module and the fifth switch module are closed, or the second switch module is closed, and at least one of the third switch module and the fourth switch module is closed.

[0010] In one embodiment, the switch driver is an isolated switch driver.

[0011] In one embodiment, the EN pin of the isolated switch driver is connected to a control signal, and the circuit between the EN pin and the control signal is grounded through a resistor R1; the VDP pin is connected to the primary-side power supply and grounded through capacitors C2 and C3 connected in parallel; the PXFR pin is grounded through a resistor R2; the VSP pin is directly grounded; capacitors C1 and C4 are connected in series between the VDH and VSS pins; and the VDM pin is connected to the circuit between capacitors C1 and C4; the VDRV pin of the isolated switch driver is connected to the gate G of the NMOS transistor through a protection circuit, and is used to output the first drive signal to the NMOS transistor.

[0012] In one embodiment, the protection circuit includes resistor R3, resistor R4, and diode D1; one end of resistor R3 is connected to the output terminal of the isolated switch driver, and the other end is connected to the source S of the NMOS transistor; resistor R4 and diode D1 are connected in series and then in parallel across resistor R3; wherein the cathode of diode D1 is connected to the output terminal of the isolated switch driver.

[0013] In one embodiment, the second switch assembly further includes a sixth switch module; the sixth switch module and the third switch module are connected in series and then connected in parallel with the fourth switch module.

[0014] In any of the above embodiments, the switch drivers and NMOS transistors in each switch module have the same model and specifications.

[0015] In one embodiment, the voltage of the primary-side power supply is 3.3V; the voltage of the control power supply is 28V.

[0016] In one embodiment, the output terminal of the second switch combination is used to connect to the actuating device, and the driving power supply outputs a second driving signal to the actuating device through a conducting switch output interface circuit.

[0017] This utility model provides a switching output interface circuit for reusable launch vehicles, which significantly reduces costs while ensuring reliability, and also reduces size and weight, increases the driving power supply, and greatly improves the versatility of the back-end actuation device.

[0018] The redundancy design of the switch output interface circuit of this invention ensures that even if one NMOS transistor malfunctions, the other components can still function normally, which significantly improves reliability compared to other designs.

[0019] The switch output interface circuit of this invention has been successfully applied to the single-unit products of reusable launch vehicles, and its reliability has been fully verified.

[0020] Upon reading the detailed embodiments and examining the accompanying drawings, those skilled in the art will recognize additional features and advantages. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a first schematic diagram of the switch output interface circuit according to an embodiment of the present utility model.

[0023] Figure 2 This is a second schematic diagram of the switch output interface circuit according to an embodiment of the present invention.

[0024] Figure 3 This is a schematic block diagram of the switch output interface circuit according to an embodiment of the present invention.

[0025] Figure 4 This is a circuit design schematic diagram of the switch output interface circuit according to an embodiment of this utility model.

[0026] Figure 5 This is a schematic diagram of the isolation drive control section of the switch output interface circuit according to an embodiment of this utility model.

[0027] Figure 6 This is a schematic diagram of the NMOS transistor section of the switch output interface circuit according to an embodiment of this utility model.

[0028] Figure 7 This is the first waveform diagram of Control_Siganl_ISO according to an embodiment of this utility model.

[0029] Figure 8 This is the second waveform diagram of Control_Siganl_ISO according to an embodiment of this utility model.

[0030] Figure 9 This is the first waveform diagram of the drive signal Power_Output in this embodiment of the present invention.

[0031] Figure 10 This is a second waveform diagram of the drive signal Power_Output in an embodiment of this utility model. Detailed Implementation

[0032] The features and exemplary embodiments of various aspects of this utility model will be described in detail below. To make the objectives, technical solutions, and advantages of this utility model clearer, the following detailed description is provided in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this utility model and to exemplarily illustrate the principles of this utility model, and are not configured to limit this utility model. In addition, the structural components in the drawings are not necessarily drawn to scale. For example, the dimensions of some structural components or regions in the drawings may be enlarged for other structural components or regions to aid in the understanding of the embodiments of this utility model.

[0033] The directional terms used in the following description refer to the directions shown in the figures and are not intended to limit the specific structure of the embodiments of this utility model. In the description of this utility model, it should be noted that, unless otherwise stated, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0034] Furthermore, the terms "comprising," "including," "having," or any other variations thereof are intended to cover non-exclusive inclusion, such that a structure or component that includes a list of elements includes not only those elements but also other structural elements that are not expressly listed or inherent to the structure or component. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the article or apparatus that includes the element.

[0035] Spatial relation terms such as "below," "under," "under," "low," "above," "on," and "high" are used for descriptive convenience to explain the positioning of one element relative to a second element, indicating that these terms are intended to cover different orientations of the device, in addition to those different from those shown in the figure. Furthermore, phrases such as "one element on / below another element" can indicate that two elements are in direct contact, or that there are other elements between the two elements. In addition, terms such as "first" and "second" are also used to describe individual elements, areas, parts, etc., and should not be considered limiting. Similar terms are used throughout the description to refer to similar elements.

[0036] For those skilled in the art, this invention can be implemented without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the invention by illustrating examples.

[0037] See also Figure 1 , Figure 2 and Figure 3 This invention provides a switching output interface circuit for a reusable launch vehicle, used to provide drive voltage and drive current to an actuation device. The switching output interface circuit of this invention includes at least a drive power supply 1, a first switch assembly 2, and a second switch assembly 3 arranged in series. The first switch assembly 2 includes at least a first switch module 21 and a second switch module 22 arranged in parallel, and the second switch assembly 3 includes at least a third switch module 31 and a fourth switch module 32 arranged in parallel. That is, the switching output interface circuit of this invention is activated when at least one of the first switch module 21 and the second switch module 22 is closed and at least one of the third switch module 31 and the fourth switch module 32 is closed and activated. Furthermore, the output terminal of the second switch assembly 3 is used to connect to an actuation device 4, which includes, but is not limited to, a solenoid valve and a pyrotechnic device. When the switching output interface circuit of this invention is activated, the drive power supply 1 can output a second drive signal to the actuation device 4 through the activated switching output interface circuit.

[0038] See also Figure 2 , Figure 3 , Figure 4 , Figure 5 and Figure 6 Furthermore, each switching module in this invention includes a switch driver and an NMOS transistor 60 connected in series, as well as a primary-side power supply for powering the switch driver. The switch driver can be an isolated switch driver 50. The input terminal of the isolated switch driver 50 is connected to a control signal for receiving the control signal, and its output terminal is connected to the gate G of the NMOS transistor 60. When using the switching output interface circuit of this invention, appropriate control signals are input to each switching module. After receiving the control signal, the isolated switch driver 50 converts it into a first drive signal (isolation drive signal), and drives the corresponding NMOS transistor 60 to operate through the isolation drive signal. When the isolation drive signal is greater than the turn-on threshold voltage of the NMOS transistor 60, the drain D and source S of the NMOS transistor close and conduct.

[0039] In this embodiment of the invention, the input of the switch output interface circuit is a driving power supply, and the output is a second driving signal. This invention controls the closing and opening of the entire switch output interface circuit by jointly controlling the switching states (closed and open states) of each switch module, ultimately achieving switch control of the actuating device.

[0040] In this embodiment, the switch output interface circuit uses multiple switch modules connected in series and parallel. When one or two redundant switch modules fail, the function of the circuit will not be affected.

[0041] See Figure 2 , Figure 3 , Figure 4 , Figure 5 and Figure 6 Furthermore, to increase the reliability of the switch output interface circuit of this invention, the first switch assembly 2 also includes a fifth switch module 23. The fifth switch module 23 is connected in series with the first switch module 21 and then in parallel with the second switch module 22. This arrangement can significantly improve the reliability of the switch output interface circuit of this invention. Even if the first switch module 21 fails and is in a normally closed state, the circuit can still be controlled by the fifth switch module 23.

[0042] In the above embodiment, the drain D of the NMOS transistor in the first switching module 21 is connected to the driving power supply 1, and the drain D of the NMOS transistor in the fifth switching module 23 is connected to the source S of the NMOS transistor in the first switching module 21. The drain D of the NMOS transistor in the second switching module 22 is connected to the driving power supply 1, and the drain D of the NMOS transistor in the third switching module 31 is connected to the source S of both the NMOS transistors in the second and fifth switching modules 23. The drain D of the NMOS transistor in the fourth switching module 32 is connected to the source S of both the NMOS transistors in the second and fifth switching modules 23. The source S of the NMOS transistors in the third and fourth switching modules 31 are used to output the driving power supply signal (the second driving signal Power_Output).

[0043] In each switching module, the gate G of the NMOS transistor 60 is connected to the output terminal of the isolated switch driver 50 to receive the isolated drive signal sent by the isolated switch driver 50. The drain D of the NMOS transistor 60 is connected to the drive power supply 1 to receive the power signal. The source S of the NMOS transistor 60 serves as the output terminal of the switch output interface circuit, used to output the power signal. Using this scheme, the control signal drives the corresponding NMOS transistor via the isolated switch driver. When the isolated drive signal is greater than the turn-on threshold voltage of the NMOS transistor, the drain D and source S of the NMOS transistor are closed and conduct; when the isolated drive signal is less than the turn-on threshold voltage of the NMOS transistor, the drain D and source S of the NMOS transistor are open.

[0044] In the above embodiment, the switch output interface circuit of this embodiment is turned on when the first switch module 21 and the fifth switch module 23 are closed or the second switch module 22 is closed, and at least one of the third switch module 31 and the fourth switch module 32 is closed.

[0045] Furthermore, to prevent a fault in the back end of the switching driver from affecting the front end (control signal), this invention can use an isolated switching driver. The main purpose of using an isolated switching driver is to drive the NMOS transistor at the back end to close while isolating the back end from affecting the front end. The schematic diagram of the isolated drive control section is detailed below. Figure 5 As shown. The primary-side power supply uses the interface power supply commonly used in FPGAs and processors, while the secondary-side output signal (Control_Siganl_ISO) provides a floating regulated power rail for the downstream NMOS transistor. The isolation voltage between the primary and secondary sides can reach 5000V.

[0046] See Figure 4 , Figure 5 and Figure 6 : In any of the above embodiments, the isolated switch driver in each switch module can be a TPSI3050, and the NMOS transistor can be a BSZ096N10LS5. It should be noted that the isolated switch driver and NMOS transistor in each switch module of this embodiment have the same model and specifications. Therefore, some embodiments of this utility model are mainly described using the first switch module as an example, and other switch modules can be adapted to the first switch module.

[0047] Specifically, the EN pin of the isolated switch driver 50 is connected to the control signal, and the circuit between the EN pin and the control signal is grounded through resistor R1. The VDDP pin of the isolated switch driver 50 is connected to the primary-side power supply and grounded through capacitors C2 and C3 connected in parallel. The PXFR pin is grounded through resistor R2, and the VSSP pin is directly grounded. Capacitors C1 and C4 are connected in series between the VDDH and VSSS pins, and the VDDM pin is connected to the circuit between capacitors C1 and C4. The VDRV pin of the isolated switch driver 50 is connected to the gate G of the NMOS transistor 60 through protection circuit 70, and is used to output the control signal to the NMOS transistor. In addition, the gate G of the NMOS transistor is grounded for protection, such as... Figure 6 As shown, one end of resistor R5 is connected to the circuit between protection circuit 70 and gate G of NMOS transistor 60, and the other end of resistor R5 is grounded.

[0048] Resistor R2 is chosen as an 11K resistor to provide sufficient drive capability for the downstream NMOS transistor without excessive power loss. Resistor R1 is chosen as a 1K resistor to ensure that the Control_Siganl signal does not produce unexpected outputs during power-up.

[0049] The protection circuit 70 in this embodiment includes resistors R3 and R4, and diode D1. One end of resistor R3 is connected to the output terminal of the isolated switch driver 50, and the other end is connected to the source S of the NMOS transistor 60. Resistor R4 and diode D1 are connected in series and then in parallel across resistor R3. The cathode of diode D1 is connected to the output terminal of the isolated switch driver 50. This embodiment's switch output interface circuit, by using two resistors connected to a diode, can limit ringing caused by parasitic inductance and capacitance, limit ringing caused by high-voltage switching, high-current switching, and diode reverse recovery, and also reduce electromagnetic interference.

[0050] See also Figure 2 and Figure 3To facilitate design and use, each switching module can be designed consistently. This means that the switch drivers, NMOS transistors, capacitors, resistors, and diodes used in each switching module are of the same type. It should be noted that the switching modules are independent yet interconnected, each controlled by a corresponding control signal. For example, control signal 1 is input to the first switching module 21, and after passing through an isolated switch driver, generates isolated drive signal 1, which drives the NMOS transistor at the back end. Control signal 2 is input to the second switching module 22, and after passing through an isolated switch driver, generates isolated drive signal 2, which drives the NMOS transistor at the back end. Control signal 3 is input to the third switching module 31, and after passing through an isolated switch driver, generates isolated drive signal 3, which drives the NMOS transistor at the back end. Control signal 4 is input to the fourth switching module 32, and after passing through an isolated switch driver, generates isolated drive signal 4, which drives the NMOS transistor at the back end. Control signal 5 is input to the fifth switching module 23, and after passing through an isolated switch driver, generates isolated drive signal 5, which drives the NMOS transistor at the back end. In addition, the control signals used to control the operation of each switch module are independent of each other but cooperate with each other. Specifically, the corresponding control signals can be provided to each switch module according to the truth table, so as to realize the conduction and disconnection of the entire switch output interface circuit.

[0051] The truth table is shown below: In the table, '1' represents a closed state; '0' represents an open state; 'X' represents any state, which can be closed or open; and 'C' represents a normally closed state.

[0052] As can be seen from the truth table, when one or two switch combinations fail, the entire switch output interface circuit can still work normally.

[0053] To improve reliability, the circuit can be used as follows: 1) When it is necessary to provide drive voltage and corresponding drive current to the actuator, that is, when it is necessary to turn on the switch output interface circuit (the entire circuit is in switch state '1'), it is necessary to control the closing of the corresponding switch module according to the truth table. The control signal for controlling the closing of each switch module is set to 3.3V (or 5V).

[0054] 2) When it is necessary to disconnect the actuator, that is, when the actuator is disconnected from the drive power supply, the control signal of each switch module can be set to 0V.

[0055] In this embodiment, the switch output interface circuit controls Control_Siganl to be high (see the waveform diagram of Control_Siganl_ISO). Figure 7 As shown in the diagram, Control_Siganl_ISO quickly follows the signal within 1µs, reaching a stable voltage after a small overshoot of 3µs. Control_Siganl is then set low (see the waveform diagram of Control_Siganl_ISO). Figure 8 As shown), Control_Siganl_ISO follows quickly within 5ns, providing a fast response.

[0056] In this embodiment, the switch output interface circuit controls the on / off state of each redundant switch combination through the Control_Siganlx (x=1...5) signal, thereby controlling the on / off state of the entire circuit. When the back-end actuator is not connected, i.e., under no-load conditions, and the entire circuit is off, the waveform of the drive signal Power_Output is shown below. Figure 9 As shown, a stable drive voltage can be achieved in 500ns. The waveform of the drive signal Power_Output when the entire circuit is disconnected is shown in the figure. Figure 10 As shown, it can be completely disconnected in 20µs. The specific parameters of the waveform are related to the device selection and the characteristics of the back-end actuator, but the waveforms are generally consistent.

[0057] The switch output interface circuit proposed in this invention leverages the advantages of NMOS transistors, such as low cost, small size, and high drive current, and employs a redundancy design approach to increase the reliability of the entire circuit, thereby achieving the goals of low cost, miniaturization, and high reliability. As can be seen from the truth table of this embodiment, even if one or two switch combinations fail, the entire switch output interface circuit can still operate normally, and its reliability can be fully guaranteed.

[0058] In any of the above embodiments, the voltage of the primary side power supply is 3.3V, and the voltage of the control power supply is 28V.

[0059] Those skilled in the art should understand that, based on any embodiment of this utility model, technical solutions that further add switch modules to the first or second switch assembly in a series or parallel manner also fall within the protection scope of the claims of this utility model. For example, the second switch assembly may also include a sixth switch module. Connecting the sixth switch module in series with the third switch module and then in parallel with the fourth switch module can increase the reliability of the second switch assembly and the entire circuit.

[0060] The switch output interface circuit of this invention has been used in the core single-unit product of a reusable launch vehicle. After undergoing all single-unit tests (screening tests, acceptance tests, qualification tests, and electromagnetic compatibility tests), system integration tests, engine testing, and first-stage power system testing, the product performed well without any abnormalities.

[0061] The above embodiments can be combined with each other and have corresponding technical effects.

[0062] The switch output interface circuit of this utility model is a redundant switch output interface circuit. This circuit significantly reduces costs while ensuring reliability, and also reduces size and weight, increases the driving power supply, and greatly improves the versatility of the back-end actuation device.

[0063] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A switch output interface circuit for a reusable launch vehicle, characterized in that, It includes at least: a drive power supply, a first switch assembly, and a second switch assembly arranged in series; The first switch assembly includes at least a first switch module and a second switch module connected in parallel; the second switch assembly includes a third switch module and a fourth switch module connected in parallel. Each switching module includes at least a switch driver, an NMOS transistor, and a primary-side power supply for powering the switch driver; the input terminal of the switch driver is used to receive control signals, and its output terminal is connected to the gate G of the NMOS transistor. After receiving the control signal, the switch driver converts it into a first drive signal and drives the corresponding NMOS transistor to operate through the first drive signal; when the first drive signal is greater than the turn-on threshold voltage of the NMOS transistor, the drain (D) and source (S) of the NMOS transistor are closed and turned on.

2. The switch output interface circuit according to claim 1, characterized in that, The first switch assembly also includes a fifth switch module; the fifth switch module and the first switch module are connected in series and then connected in parallel with the second switch module.

3. The switch output interface circuit according to claim 2, characterized in that, The drain D of the NMOS transistor in the first switching module is connected to the driving power supply. The drain D of the NMOS transistor in the fifth switching module is connected to the source S of the NMOS transistor in the first switching module. The drain D of the NMOS transistor in the second switching module is connected to the driving power supply. The drain D of the NMOS transistor in the third switching module is connected to the source S of both the NMOS transistor in the second and fifth switching modules. The drain D of the NMOS transistor in the fourth switching module is connected to the source S of both the NMOS transistor in the second and fifth switching modules. The source S of the NMOS transistors in the third and fourth switching modules are used to output the second driving signal.

4. The switch output interface circuit according to claim 3, characterized in that, When the first switch module and the fifth switch module are closed, or the second switch module is closed, and at least one of the third switch module and the fourth switch module is closed, the switch output interface circuit is turned on.

5. The switch output interface circuit according to claim 4, characterized in that, The switch driver is an isolated switch driver.

6. The switch output interface circuit according to claim 5, characterized in that, The EN pin of the isolated switch driver is connected to the control signal, and the circuit between the EN pin and the control signal is grounded through resistor R1; the VDP pin is connected to the primary side power supply and grounded through capacitors C2 and C3 connected in parallel; the PXFR pin is grounded through resistor R2; the VSP pin is directly grounded; capacitors C1 and C4 are connected in series between the VDH pin and the VSS pin; and the VDM pin is connected to the circuit between capacitors C1 and C4. The VDRV pin of the isolated switch driver is connected to the gate G of the corresponding NMOS transistor through a protection circuit, and is used to output the first drive signal to the corresponding NMOS transistor.

7. The switch output interface circuit according to claim 6, characterized in that, The protection circuit includes resistors R3 and R4 and diode D1; one end of resistor R3 is connected to the output terminal of the isolated switch driver, and the other end is connected to the source S of the NMOS transistor; resistor R4 and diode D1 are connected in series and then in parallel across resistor R3; the cathode of diode D1 is connected to the output terminal of the isolated switch driver.

8. The switch output interface circuit according to any one of claims 1 to 7, characterized in that, The switch drivers and NMOS transistors in each switch module have the same model and specifications.

9. The switch output interface circuit according to claim 8, characterized in that, The primary power supply has a voltage of 3.3V; the control power supply has a voltage of 28V.

10. The switch output interface circuit according to claim 8, characterized in that, The output terminal of the second switch combination is used to connect to the actuating device, and the driving power supply outputs the second driving signal to the actuating device through the conducting switch output interface circuit.