Signal receiving control circuit, inter-controller communication system and electric appliance
Patent Information
- Application Number
- CN202521770779.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-19
- Publication Date
- 2026-10-16
- Estimated Expiration
- 2035-08-19
AI Technical Summary
因此，需要解决强电磁干扰环境下通信故障易发的问题
[0013]The signal receiving control circuit, controller communication system, and electrical equipment provided in this application embodiment, by setting a signal receiving module, a signal demodulation module, and a control module in the signal receiving control circuit, and the signal demodulation module including a signal preprocessing unit and a signal delay unit, wherein the input terminals of the signal preprocessing unit and the signal delay unit are both connected to the output terminal of the signal receiving module, and the output terminals of the signal preprocessing unit and the signal delay unit are both connected to the signal input terminal of the control module, the signal preprocessing unit directly transmits the received signal to the control module, and the signal delay unit transmits the received signal to the control module after a certain delay, realizing that the signal preprocessing unit first instructs the control module to prepare to receive the signal, the control module enters the signal processing state, and then receives the subsequent unprocessed signal from the signal delay unit. Since the control module needs to receive the signal sent by the signal preprocessing unit before it can receive the unprocessed signal, it avoids the control module mistakenly receiving interference signals in the strong electromagnetic interference environment, thereby improving the communication anti-interference capability. The control module can not perform any signal processing before receiving the signal sent by the signal preprocessing unit, thus saving energy consumption.
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Figure CN224863024U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit technology, and in particular to a signal receiving control circuit, an inter-controller communication system, and electrical equipment. Background Technology
[0002] As people's demands for various electrical appliances continue to evolve, some of these appliances are used in harsh environments. In strong electromagnetic environments, electromagnetic interference can couple onto communication lines, causing communication abnormalities between different controllers and leading to equipment malfunctions. For example, air conditioning units typically contain multiple controllers that need to communicate with each other to coordinate temperature control.
[0003] Current controller communication methods typically involve continuous data transmission, with the main controller constantly receiving and processing the data, resulting in a very high probability of communication failures. Therefore, it is necessary to address the issue of frequent communication failures in environments with strong electromagnetic interference. Utility Model Content
[0004] In view of this, in order to solve some or all of the above-mentioned technical problems, embodiments of this application provide a signal receiving control circuit, an inter-controller communication system, and an electrical device.
[0005] In a first aspect, embodiments of this application provide a signal receiving control circuit, which includes: a signal receiving module, a signal demodulation module, and a control module. The output terminal of the signal receiving module is connected to the input terminal of the signal demodulation module, and the output terminal of the signal demodulation module is connected to the signal input terminal of the control module. The signal demodulation module includes a signal preprocessing unit and a signal delay unit. The input terminals of the signal preprocessing unit and the signal delay unit are both connected to the output terminal of the signal receiving module, and the output terminals of the signal preprocessing unit and the signal delay unit are both connected to the signal input terminal of the control module.
[0006] In one possible implementation, the signal preprocessing unit includes a level converter and a relay. The input terminal of the level converter is connected to the output terminal of the signal receiving module, and the output terminal of the level converter is connected to the first contact of the relay and the trigger input terminal of the control module. The second contact of the relay is connected to the signal input terminal of the control module. One end of the coil in the relay is connected to a preset level, and the other end is connected to the control terminal of the control module. The signal preprocessing unit is used to transmit the signal received from the signal receiving module to the control module. The signal delay unit is used to delay the signal received from the signal receiving module before transmitting it to the control module. The control module is used to switch from an idle state to a signal processing state after receiving the signal from the signal preprocessing unit.
[0007] In one possible implementation, the level shifter includes a first resistor, a second resistor, and a transistor; one end of the first resistor is connected to the output terminal of the signal receiving module, and the other end is connected to the control terminal of the transistor; the first controlled terminal of the transistor is connected to the second resistor and the first contact of the relay, the second controlled terminal of the transistor is connected to the low-level terminal, and the other end of the second resistor is connected to the high-level terminal.
[0008] In one possible implementation, the signal delay unit includes a delay comparator, an input buffer, and an output buffer; the input terminal of the input buffer is connected to the output terminal of the signal receiving module, and the output terminal of the input buffer is connected to the first input terminal of the delay comparator; the second input terminal of the delay comparator is connected to the reference voltage terminal, and the output terminal of the delay comparator is connected to the input terminal of the output buffer; the output terminal of the output buffer is connected to the signal input terminal of the control module.
[0009] In one possible implementation, the delay comparator includes an operational amplifier, a third resistor, a fourth resistor, and a capacitor; one end of the third resistor is connected to the output of the input buffer, and the other end is connected to the non-inverting input of the operational amplifier; one end of the fourth resistor is connected to the non-inverting input of the operational amplifier, and the other end is connected to the output of the operational amplifier; the capacitor is connected in parallel with the fourth resistor; the inverting input of the operational amplifier is connected to the reference voltage terminal, and the output of the operational amplifier is connected to the input of the output buffer.
[0010] In one possible implementation, the signal receiving module includes a photoelectric signal conversion unit, the optical signal connection terminal of which is connected to an externally accessed optical fiber, and the electrical signal output terminal of which is connected to the input terminal of the signal demodulation module.
[0011] Secondly, embodiments of this application provide an inter-controller communication system, which includes: a communication fault detector and at least two controllers, wherein the communication fault detector is connected to each of the at least two controllers, and each of the at least two controllers includes the aforementioned signal receiving control circuit; each of the at least two controllers is connected to at least one other controller, and each of the at least two controllers sends a detection signal to the communication fault detector while sending a detection signal to the other controller.
[0012] Thirdly, embodiments of this application provide an electrical device that includes the aforementioned inter-controller communication system.
[0013] The signal receiving control circuit, controller communication system, and electrical equipment provided in this application embodiment, by setting a signal receiving module, a signal demodulation module, and a control module in the signal receiving control circuit, and the signal demodulation module including a signal preprocessing unit and a signal delay unit, wherein the input terminals of the signal preprocessing unit and the signal delay unit are both connected to the output terminal of the signal receiving module, and the output terminals of the signal preprocessing unit and the signal delay unit are both connected to the signal input terminal of the control module, the signal preprocessing unit directly transmits the received signal to the control module, and the signal delay unit transmits the received signal to the control module after a certain delay, realizing that the signal preprocessing unit first instructs the control module to prepare to receive the signal, the control module enters the signal processing state, and then receives the subsequent unprocessed signal from the signal delay unit. Since the control module needs to receive the signal sent by the signal preprocessing unit before it can receive the unprocessed signal, it avoids the control module mistakenly receiving interference signals in the strong electromagnetic interference environment, thereby improving the communication anti-interference capability. The control module can not perform any signal processing before receiving the signal sent by the signal preprocessing unit, thus saving energy consumption. Attached Figure Description
[0014] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0016] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.
[0017] Figure 1 This is a schematic diagram of the structure of a signal receiving control circuit provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of a second signal receiving control circuit provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a third signal receiving control circuit provided in an embodiment of this application; Figure 4 This is a schematic diagram of the structure of the fourth signal receiving control circuit provided in the embodiments of this application; Figure 5This is a schematic diagram of the structure of the fifth signal receiving control circuit provided in the embodiments of this application; Figure 6 This is a schematic diagram of the sixth signal receiving control circuit provided in the embodiments of this application; Figure 7 This is a schematic diagram of the structure of an inter-controller communication system provided in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of a controller communication fault detection device provided in an embodiment of this application.
[0018] Figure label: 100 - Signal receiving control circuit; 101 - Signal receiving module; 1011 - Photoelectric signal conversion unit; 102 - Signal demodulation module; 1021 - Signal preprocessing unit; 10211 - Level converter; 10212 - Relay; 1022 - Signal delay unit; 10221 - Delay comparator; 10222 - Input buffer; 10223 - Output buffer; 103 - Control module; 700 - Inter-controller communication system; 701 - Communication fault detector; 702 - At least two controllers; 800 - Electrical equipment. Detailed Implementation
[0019] Various exemplary embodiments of this application will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values of the components and steps set forth in these embodiments do not limit the scope of this application.
[0020] Those skilled in the art will understand that the terms "first" and "second" in the embodiments of this application are only used to distinguish different steps, devices or modules, and do not represent any specific technical meaning, nor do they indicate the logical order between them.
[0021] It should also be understood that in this embodiment, "multiple" can refer to two or more, and "at least one" can refer to one, two or more.
[0022] It should also be understood that any component, data or structure mentioned in the embodiments of this application can generally be understood as one or more unless explicitly defined or given contrary guidance in the context.
[0023] Furthermore, the term "and / or" in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this application generally indicates that the preceding and following related objects have an "or" relationship.
[0024] It should also be understood that the description of the various embodiments in this application emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.
[0025] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the scope of this application and its application or use.
[0026] Techniques, circuits, and devices known to a person skilled in the art may not be discussed in detail, but where appropriate, such techniques, circuits, and devices should be considered part of the specification.
[0027] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.
[0028] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. To facilitate understanding of the embodiments of this application, the application will be described in detail below with reference to the accompanying drawings and embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0029] To address the problem of signal interference in existing technologies under strong electromagnetic interference environments, this application provides a signal receiving control circuit that can prevent the control module from mistakenly receiving interference signals and improve the anti-interference capability of communication.
[0030] Figure 1 This is a schematic diagram of a signal receiving control circuit 100 provided in an embodiment of this application. This signal receiving control circuit 100 can be applied to various types of electrical appliances, such as air conditioners, televisions, and refrigerators.
[0031] like Figure 1 As shown, the signal receiving control circuit 100 includes: a signal receiving module 101, a signal demodulation module 102, and a control module 103.
[0032] The output terminal of the signal receiving module 101 is connected to the input terminal of the signal demodulation module 102, and the output terminal of the signal demodulation module 102 is connected to the signal input terminal P2 of the control module 103.
[0033] The signal receiving module 101 is used to receive signals from outside the circuit and send the received signals to the signal demodulation module 102. The signal demodulation module 102 sends the demodulated signal to the control module 103.
[0034] The signal demodulation module 102 includes a signal preprocessing unit 1021 and a signal delay unit 1022. The input terminals of the signal preprocessing unit 1021 and the signal delay unit 1022 are both connected to the output terminal of the signal receiving module 101. The output terminals of the signal preprocessing unit 1021 and the signal delay unit 1022 are both connected to the signal input terminal P2 of the control module 103.
[0035] The control module 103 can be any type of electronic device with signal processing capabilities, such as MCU, DSP, etc.
[0036] The aforementioned signal preprocessing unit 1021 is used to directly transmit the signal received from the signal receiving module 101 to the control module 103. After receiving the signal, the control module 103 can switch from an idle state to a signal processing state. The aforementioned signal delay unit 1022 can delay the signal received from the signal receiving module 101 before transmitting it to the control module 103. The delay time can be set according to actual needs. After entering the signal processing state, the control module 103 can receive the signal to be processed from the signal delay unit 1022 and process the signal.
[0037] The aforementioned signal preprocessing unit 1021 can be implemented in various ways. For example, it may include a switching unit that can respond to the signal sent by the signal receiving module 101, connect the line between it and the control module 103, transmit the signal to the control module 103, and then have the control module 103 control the switching unit to disconnect, or have the switching unit actively disconnect.
[0038] The aforementioned signal delay unit 1022 can be implemented in various ways. For example, signal delay can be achieved by setting an RC delay circuit, or by setting up a device such as an MCU to implement signal transmission delay through a program.
[0039] The signal receiving control circuit provided in this application embodiment includes a signal receiving module 101, a signal demodulation module 102, and a control module 103. The signal demodulation module 102 includes a signal preprocessing unit 1021 and a signal delay unit 1022. The input terminals of both the signal preprocessing unit 1021 and the signal delay unit 1022 are connected to the output terminal of the signal receiving module 101, and the output terminals of both are connected to the signal input terminal P2 of the control module 103. The signal preprocessing unit 1021 directly transmits the received signal to the control module 103, while the signal delay unit 1022 transmits the received signal to the control module 103 after a delay period. This allows the signal preprocessing unit 1021 to first instruct the control module 103 to prepare to receive a signal, the control module 103 to enter the signal processing state, and then the subsequent signals to be processed are received from the signal delay unit 1022. Because the control module 103 needs to receive the signal sent by the signal preprocessing unit 1021 before it can receive the signal to be processed, it avoids the control module 103 from mistakenly receiving interference signals in a strong electromagnetic interference environment, thus improving the anti-interference capability of communication. The control module 103 can avoid performing any signal processing before receiving the signal sent by the signal preprocessing unit 1021, thereby saving energy.
[0040] In some alternative implementations, such as Figure 2 As shown, the signal preprocessing unit 1021 includes a level converter 10211 and a relay 10212. The input terminal of the level converter 10211 is connected to the output terminal of the signal receiving module 101, and the output terminal of the level converter 10211 is connected to the first contact of the relay 10212 and the trigger input terminal P1 of the control module 103.
[0041] The level converter 10211 is used to convert the level of the signal received from the signal receiving module 101. The level-converted signal can be detected by the control module 103 through the trigger input terminal P1, thereby causing the control module 103 to make a corresponding response.
[0042] For example, the level converter 10211 can be an inverter. When the signal receiving module 101 receives a valid signal, it sends a high-level signal to the level converter 10211. The level converter 10211 converts the high-level signal to a low-level signal, which is then transmitted to the trigger input P1 of the control module 103. After detecting this low-level signal, the control module 103 can send a control signal to the coil of the relay 10212.
[0043] like Figure 2As shown, the second contact of relay 10212 is connected to the signal input terminal P2 of control module 103. One end of the coil in relay 10212 is connected to a preset level, and the other end is connected to the control terminal P3 of control module 103. Typically, to ensure that signal input terminal P2 remains stable at a high level when no signal is received, such as... Figure 2 As shown, a pull-up resistor for the second contact can be set.
[0044] After the control module 103 detects the signal output by the level converter 10211 through the trigger input terminal P1, it can output a control signal to the coil of the relay 10212 through the control terminal P3. The relay 10212 then connects its first and second contacts, and the level-converted signal is sent to the signal input terminal P2 of the control module 103 via the second contact. Upon receiving the level-converted signal from the signal input terminal P2, the control module 103 enters the signal processing state. Subsequently, it can further send a disconnect signal to the relay 10212 through the control terminal P3, disconnecting the connection between the first and second contacts of the relay 10212, and continue to receive the signal to be processed from the signal delay unit 1022 from the signal input terminal P2.
[0045] The preset levels mentioned above can be set arbitrarily according to actual needs. For example, Figure 2 The preset level shown is a high level VCC. After the control module 103 detects the signal after the level conversion through the trigger input terminal P1, it sends a low level signal to the coil of the relay 10212 to energize the coil, thereby connecting the first contact and the second contact.
[0046] In this embodiment, by setting up a level converter 10211 and a relay 10212, the control module 103 can detect the level of the signal output by the level converter 10211 in real time. After detecting a level change, it controls the relay 10212 to close, so that the signal output by the level converter 10211 can be used as a state transition control signal. The control module 103 can quickly enter the signal processing state based on this signal and wait for the signal delay circuit to send the signal to be processed, thereby improving the state switching efficiency of the control module 103.
[0047] In some alternative implementations, such as Figure 3 As shown, the level shifter 10211 includes a first resistor R1, a second resistor R2, and a transistor T1. The transistor T1 can be of various types and can function as a switch. For example, the transistor T1 can be... Figure 3 The transistor T1 shown is an NPN transistor. Alternatively, this transistor T1 can also be a field-effect transistor, etc.
[0048] One end of the first resistor R1 is connected to the output terminal of the signal receiving module 101, and the other end is connected to the control terminal of the transistor T1. The control terminal of the transistor T1 can be used as the signal input terminal P2, such as... Figure 3 As shown, the control terminal is the base of the transistor.
[0049] The first controlled terminal of transistor T1 is connected to the second resistor R2 and the first contact of relay 10212. The second controlled terminal of transistor T1 is connected to the low-level terminal (e.g., ground terminal GND). The other end of the second resistor R2 is connected to the high-level terminal (e.g., VCC).
[0050] like Figure 3 As shown, the first controlled terminal of transistor T1 is the collector of the transistor, which is simultaneously connected to the first contact of relay 10212 and the trigger input terminal P1 of control module 103; the second controlled terminal of transistor T1 is the emitter, which is connected to ground. When signal receiving module 101 receives a valid signal, it can output a high-level signal to transistor T1, and the first and second controlled terminals of transistor T1 are connected. The first controlled terminal is at a low level, and the trigger input terminal P1 of control module 103 and the first contact of relay 10212 are also at a low level.
[0051] In this embodiment, a current-limiting resistor and a transistor T1 are used to form a level converter 10211. The level converter 10211 has a simple and effective structure, which helps to simplify the circuit structure, improve the circuit configuration efficiency, and reduce the circuit cost.
[0052] In some alternative implementations, such as Figure 4 As shown, the signal delay unit 1022 includes a delay comparator 10221, an input buffer 10222, and an output buffer 10223.
[0053] The input terminal of the input buffer 10222 is connected to the output terminal of the signal receiving module 101, and the output terminal of the input buffer 10222 is connected to the first input terminal of the delay comparator.
[0054] The input buffer 10222 can stabilize the signal level sent by the signal receiving module 101 at a fixed level, thereby improving the circuit's anti-interference capability. For example, as... Figure 5 As shown, the input buffer 10222 can be a voltage follower.
[0055] The second input terminal of the delay comparator 10221 is connected to the reference voltage terminal Vref, and the output terminal of the delay comparator 10221 is connected to the input terminal of the output buffer 10223.
[0056] The output terminal of the output buffer 10223 is connected to the signal input terminal P2 of the control module 103.
[0057] The aforementioned delay comparator 10221 is used to compare the level of the signal to be processed input to the input buffer 10222 with the level of the reference signal input to the reference voltage terminal. If the level of the signal to be processed is higher than the level of the reference signal, the delay comparator 10221 outputs a high level after a delay; if the level of the signal to be processed is lower than the level of the reference signal, the delay comparator 10221 outputs a low level after a delay.
[0058] The delay time of the delay comparator 10221 can be set. For example, the delay time can be adjusted by adjusting the RC time constant within the delay comparator 10221.
[0059] The aforementioned output buffer 10223 can stabilize the signal level output by the delay comparator 10221 at a fixed level, thereby improving the circuit's anti-interference capability. For example, as Figure 5 As shown, the output buffer 10223 can be configured as an inverter. The inverter can invert the signal output by the delay comparator 10221, so that the signal level output by the signal delay unit 1022 is consistent with the signal level output by the relay 10212.
[0060] This embodiment sets up a signal delay unit 1022 by configuring a delay comparator 10221, an input buffer 10222, and an output buffer 10223. This enables the signal level of the signal output by the signal delay unit 1022 to be more stable on the basis of delaying the output of the signal from the signal receiving module 101, thereby helping to further improve the anti-interference capability of the circuit.
[0061] In some alternative implementations, such as Figure 5 As shown, the delay comparator 10221 includes an operational amplifier U1, a third resistor R3, a fourth resistor R4, and a capacitor C.
[0062] One end of the third resistor R3 is connected to the output of the input buffer 10222, and the other end is connected to the non-inverting input of operational amplifier U1. One end of the fourth resistor R4 is connected to the non-inverting input of operational amplifier U1, and the other end is connected to the output of operational amplifier U1. Capacitor C is connected in parallel with the fourth resistor R4.
[0063] The inverting input of operational amplifier U1 is connected to the reference voltage terminal, and the output of operational amplifier U1 is connected to the input of output buffer 10223.
[0064] The aforementioned third resistor R3, fourth resistor R4, and capacitor C can form an RC delay circuit. By adjusting the resistance and capacitance values, the delay time from input to output can be adjusted. The voltage difference between the positive input terminal and the reference voltage input to the inverting input terminal of operational amplifier U1 is amplified and outputs a voltage of a set magnitude.
[0065] This embodiment achieves stable output after a delay of the input signal by setting up an operational amplifier, resistors, and capacitors. The circuit has a simple structure, stable signal transmission, and the delay time can be flexibly adjusted, which helps to simplify the circuit structure and improve the stability of circuit operation.
[0066] In some alternative implementations, such as Figure 6 As shown, the signal receiving module 101 includes a photoelectric signal conversion unit 1011. The optical signal connection terminal of the photoelectric signal conversion unit 1011 is connected to an externally accessed optical fiber, and the electrical signal output terminal of the photoelectric signal conversion unit is connected to the input terminal of the signal demodulation module 102.
[0067] In this embodiment, the signal receiving module 101 can not only receive signals from the outside, but also transmit signals to the outside. When receiving a signal, the photoelectric signal conversion unit receives the optical signal from the optical fiber, converts the optical signal into an electrical signal, and then sends the electrical signal to the signal demodulation module 102. When transmitting a signal, the photoelectric signal conversion unit can receive the electrical signal to be transmitted from the signal output terminal of the control module 103, convert the electrical signal into an optical signal, and then transmit it to the target device through the optical fiber.
[0068] This embodiment, by setting a photoelectric signal conversion unit in the signal receiving module 101 and transmitting and receiving signals through optical fiber, can effectively avoid electromagnetic interference during the transmission of electrical signals, thereby improving the stability of signal transmission.
[0069] Figure 7 This is a schematic diagram of an inter-controller communication system 700 provided in an embodiment of this application. The inter-controller communication system specifically includes a communication fault detector 701 and at least two controllers 702, with each controller connected to the communication fault detector 701 and the at least two controllers 702. Each of the at least two controllers 702 includes the signal receiving control circuit described in the above embodiments.
[0070] Each of at least two controllers 702 is connected to at least one other controller, and each of the at least two controllers 702 sends a detection signal to the communication fault detector 701 while sending a detection signal to the other controller.
[0071] like Figure 7The system shown includes three controllers, namely controller A, controller B, and controller C. Each controller is connected to the communication fault detector 701 and to at least one other controller. When any controller triggers a communication fault detection condition, it can simultaneously send detection signals to the other controllers connected to it and the communication fault detector 701.
[0072] The communication fault detector 701 is used to execute the above-described inter-controller communication fault detection method. Specifically, after any controller sends a detection signal to the detector in the communication diagram, the communication fault detector 701 uses that controller as the target controller and can perform the following steps: In an idle state, in response to detecting a change in the output level of the signal preprocessing unit, it receives a preprocessed signal sent by the signal preprocessing unit from the signal input terminal; in response to completing the reception of the preprocessed signal, it switches the current state from the idle state to the signal processing state; and it receives the signal to be processed from the signal delay unit included in the signal receiving control circuit.
[0073] It should be noted that, in this embodiment, after receiving a detection signal from another controller, any controller can perform a self-test based on a relevant self-test method without needing to send feedback information to other controllers. The communication fault detector 701 determines whether the target controller has experienced a communication fault based on the feedback information.
[0074] The controller communication system provided in this application embodiment, by setting the above-mentioned signal receiving control circuit in the controller, can improve the system's anti-electromagnetic interference capability, while a third-party communication fault detector can detect communication faults in each controller, thereby helping to improve the efficiency of communication fault detection and quickly locate the controller that has a communication fault, thus helping to respond quickly to the fault.
[0075] Figure 8 This is a schematic diagram of the structure of an electrical device 800 provided in an embodiment of this application. The electrical device includes the aforementioned inter-controller communication system.
[0076] The electrical equipment provided in this application embodiment, by applying the above-mentioned inter-controller communication system, can improve the system's anti-electromagnetic interference capability, while the communication fault detector can detect communication faults in each controller, thereby helping to improve the efficiency of communication fault detection and quickly locate the controller that has a communication fault, thus helping to respond quickly to the fault.
[0077] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different circuits to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0078] The steps of the circuits or algorithms described in connection with the embodiments disclosed herein can be implemented in hardware, in a software module executed by a processor, or in a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0079] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also mean including the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.
[0080] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.
Claims
1. A signal receiving control circuit, characterized in that, The circuit includes: a signal receiving module, a signal demodulation module, and a control module. The output terminal of the signal receiving module is connected to the input terminal of the signal demodulation module, and the output terminal of the signal demodulation module is connected to the signal input terminal of the control module. The signal demodulation module includes a signal preprocessing unit and a signal delay unit. The input terminals of the signal preprocessing unit and the signal delay unit are both connected to the output terminal of the signal receiving module, and the output terminals of the signal preprocessing unit and the signal delay unit are both connected to the signal input terminal of the control module. The signal preprocessing unit is used to transmit the signal received from the signal receiving module to the control module, and the signal delay unit is used to delay the signal received from the signal receiving module before transmitting it to the control module. The control module is used to switch from an idle state to a signal processing state after receiving a signal from the signal preprocessing unit.
2. The circuit according to claim 1, characterized in that, The signal preprocessing unit includes a level converter and a relay. The input terminal of the level converter is connected to the output terminal of the signal receiving module, and the output terminal of the level converter is connected to the first contact of the relay and the trigger input terminal of the control module. The second contact of the relay is connected to the signal input terminal of the control module; One end of the coil in the relay is connected to a preset level, and the other end is connected to the control terminal of the control module.
3. The circuit according to claim 2, characterized in that, The level converter includes a first resistor, a second resistor, and a transistor; One end of the first resistor is connected to the output terminal of the signal receiving module, and the other end is connected to the control terminal of the transistor; The first controlled terminal of the transistor is connected to the second resistor and the first contact of the relay, the second controlled terminal of the transistor is connected to the low-level terminal, and the other end of the second resistor is connected to the high-level terminal.
4. The circuit according to claim 1, characterized in that, The signal delay unit includes a delay comparator, an input buffer, and an output buffer; The input terminal of the input buffer is connected to the output terminal of the signal receiving module, and the output terminal of the input buffer is connected to the first input terminal of the delay comparator. The second input terminal of the delay comparator is connected to the reference voltage terminal, and the output terminal of the delay comparator is connected to the input terminal of the output buffer. The output terminal of the output buffer is connected to the signal input terminal of the control module.
5. The circuit according to claim 4, characterized in that, The delay comparator includes an operational amplifier, a third resistor, a fourth resistor, and a capacitor; One end of the third resistor is connected to the output terminal of the input buffer, and the other end is connected to the non-inverting input terminal of the operational amplifier; One end of the fourth resistor is connected to the non-inverting input terminal of the operational amplifier, and the other end is connected to the output terminal of the operational amplifier. The capacitor is connected in parallel with the fourth resistor; The inverting input terminal of the operational amplifier is connected to the reference voltage terminal, and the output terminal of the operational amplifier is connected to the input terminal of the output buffer.
6. The circuit according to any one of claims 1-5, characterized in that, The signal receiving module includes a photoelectric signal conversion unit. The optical signal connection end of the photoelectric signal conversion unit is connected to an externally accessed optical fiber, and the electrical signal output end of the photoelectric signal conversion unit is connected to the input end of the signal demodulation module.
7. A controller-to-controller communication system, characterized in that, The system includes: a communication fault detector and at least two controllers, wherein the communication fault detector is connected to each of the at least two controllers, and each of the at least two controllers includes the signal receiving control circuit according to any one of claims 1-6; Each of the at least two controllers is connected to at least one other controller, and each of the at least two controllers sends the detection signal to the communication fault detector while sending the detection signal to the other controller.
8. An electrical appliance, characterized in that, The electrical equipment includes the controller communication system described in claim 7.