Power semiconductor module

Abstract

The power semiconductor module comprises a braking chopper and a three-phase inverter, is arranged in a square structure, and separates a power high-voltage end and a driving low-voltage end to be located on different sides of the power semiconductor module, so that the signal interference of the driving low-voltage end caused by the fluctuation of the power high-voltage end can be reduced, and the normal operation of the related switching devices can be better ensured. In addition, a direct current input end and a direct current output end are arranged on opposite third and fourth sides and cross the entire power semiconductor module, the transmission distances of different phases of the three-phase inverter to the direct current port can be balanced, the current sharing of parallel devices in the power semiconductor module can be well ensured, and the symmetry of device layout is facilitated by the arrangement of the above-mentioned ports of the power semiconductor module, the parasitic inductance of the power semiconductor module can be well reduced, and the power semiconductor module can be adapted to higher current, working junction temperature, switching frequency and the like.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a power semiconductor module. Background Technology

[0002] Power semiconductor modules are primarily used in applications such as motor drives, servo systems, and auxiliary inverters. In related technologies, power semiconductor modules typically employ a copper substrate design to optimize heat dissipation and integrate an NTC (Negative Temperature Coefficient Thermistor) temperature sensor for real-time temperature monitoring. A single power semiconductor module generally integrates a three-phase rectifier bridge (primarily used to convert three-phase AC power from the grid or other energy sources into DC power), a braking chopper (primarily used to dissipate energy promptly during motor regenerative braking, preventing power surges that could cause chip overvoltage and overcurrent failure), and a three-phase inverter (primarily used to convert rectified DC power back to three-phase AC power for motor drive).

[0003] However, the power semiconductor modules of the relevant technologies can only support a maximum current specification of 200A, with a maximum operating junction temperature of 150℃. Some models support 175℃ overload operation, and the highest switching frequency is only 20kHz. The module parasitic inductance is 25nH, which is not suitable for ultra-high frequency application scenarios, and the high frequency performance is obviously insufficient. Utility Model Content

[0004] In view of this, in order to solve the technical problem that the high-frequency performance of power semiconductor modules in the prior art is obviously insufficient, this disclosure provides a power semiconductor module.

[0005] According to a first aspect of the present disclosure, a power semiconductor module is provided, the power semiconductor module including a braking chopper and a three-phase inverter, the high-voltage terminal pins of the braking chopper and the three-phase inverter are disposed on a first side of the power semiconductor module, and the low-voltage terminal pins of the braking chopper and the three-phase inverter are disposed on a second side of the power semiconductor module; A portion of the DC output terminals of the power semiconductor module are disposed on the third side of the power semiconductor module, and the remaining portion of the DC output terminals of the power semiconductor module are disposed on the fourth side of the power semiconductor module. A portion of the DC input terminals of the power semiconductor module are disposed on the third side of the power semiconductor module, and the remaining portion of the DC input terminals of the power semiconductor module are disposed on the fourth side of the power semiconductor module. The power semiconductor module is constructed in a square structure, with the first side and the second side forming a pair of opposite sides of the square structure, and the third side and the fourth side forming another pair of opposite sides of the square structure.

[0006] In one optional embodiment, the output pin of the braking chopper is located on the first side, the output pin of each phase of the three-phase inverter is located on the first side, the gate pin and source pin of the transistor of the braking chopper are located on the second side, and the gate pin and source pin of the transistor in the upper and lower arms of each phase of the three-phase inverter are located on the second side.

[0007] In one optional embodiment, the power semiconductor module includes a DC bus circuit, with a portion of the DC bus circuit's DC lead pins located on the third side, the remaining portion of the DC bus circuit's DC lead pins located on the fourth side, a portion of the DC bus circuit's DC input pins located on the third side, and the remaining portion of the DC bus circuit's DC input pins located on the fourth side.

[0008] In an optional embodiment, the power semiconductor module includes a first substrate and a second substrate. The braking chopper, the upper and lower arms of the U phase of the three-phase inverter, and the upper arm of the V phase of the three-phase inverter are disposed on the first substrate, and the lower arm of the V phase of the three-phase inverter and the upper and lower arms of the W phase of the three-phase inverter are disposed on the second substrate.

[0009] In an optional embodiment, the first liner is provided with a first mountain-shaped frame, a first occupying frame, and a second occupying frame. The diodes of the braking chopper, the transistors of the upper bridge arm of the U phase of the three-phase inverter, and the transistors of the upper bridge arm of the V phase of the three-phase inverter are all disposed in the first mountain-shaped frame. The transistors of the braking chopper are disposed in the first occupying frame, and the transistors of the lower bridge arm of the U phase of the three-phase inverter are disposed in the second occupying frame.

[0010] In an optional embodiment, the second liner is provided with an F-type frame, a third-type frame, and a fourth-type frame. The transistors of the upper arm of the W phase of the three-phase inverter are disposed in the F-type frame, the transistors of the lower arm of the V phase of the three-phase inverter are disposed in the third-type frame, and the transistors of the lower arm of the W phase of the three-phase inverter are disposed in the fourth-type frame.

[0011] In an optional embodiment, the first liner is located in the power semiconductor module near the third side. The first liner is provided with a first mountain-shaped frame, a second mountain-shaped frame, a first slab frame, and a second slab frame. The first mountain-shaped frame, the second mountain-shaped frame, the first slab frame, and the second slab frame are nested and enveloped. The first mountain-shaped frame is located in the power semiconductor module near the first side, and the second mountain-shaped frame is located in the power semiconductor module near the second side. The first mountain-shaped frame is used to carry part of the input terminal of the power semiconductor module, and the second mountain-shaped frame is used to carry part of the output terminal of the power semiconductor module.

[0012] In an optional embodiment, the second liner is located in the power semiconductor module near the fourth side. The second liner is provided with an F-shaped frame, a third mountain-shaped frame, a third slab-shaped frame, and a fourth slab-shaped frame. The F-shaped frame, the third mountain-shaped frame, the third slab-shaped frame, and the fourth slab-shaped frame are nested and enveloped. The F-shaped frame is located in the power semiconductor module near the first side, and the third mountain-shaped frame is located in the power semiconductor module near the second side. The first mountain-shaped frame is used to carry the remaining input terminals of the power semiconductor module, and the second mountain-shaped frame is used to carry the remaining output terminals of the power semiconductor module.

[0013] In one optional embodiment, the transistors of both the braking chopper and the three-phase inverter comprise silicon carbide metal-oxide-semiconductor field-effect transistors, and the diodes of the braking chopper comprise silicon carbide Schottky barrier diodes.

[0014] In an optional embodiment, the upper and lower bridge arms of each phase of the braking chopper and the three-phase inverter each include corresponding silicon carbide metal oxide semiconductor field-effect transistor gate resistor groups and silicon carbide metal oxide semiconductor field-effect transistor chip groups. The gate resistor group of the silicon carbide metal oxide semiconductor field-effect transistor is used to balance the switching speed and overcurrent of the corresponding silicon carbide metal oxide semiconductor field-effect transistor chip group.

[0015] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects: The power semiconductor module in this disclosure includes a braking chopper and a three-phase inverter, and the power semiconductor module is set as a square structure (it can be a rectangle or a square, and there is no limitation thereto), so that the package side frame includes four regions: top, bottom, left, and right. That is, the power semiconductor module includes a first side, a second side, a third side, and a fourth side, etc. In this disclosure, to avoid interference between the high-voltage power terminal and the low-voltage drive terminal, the DC input terminal and DC output terminal of the power semiconductor module are arranged on opposite third and fourth sides (e.g., left and right sides), and partial DC output terminals and DC input terminals are arranged on both the third and fourth sides. The high-voltage pins of the braking chopper and the three-phase inverter are set on the first side of the power semiconductor module, and the low-voltage pins of the braking chopper and the three-phase inverter are set on the second side of the power semiconductor module. In this way, the high-voltage power terminal and the low-voltage drive terminal are separated and located on different sides of the power semiconductor module (e.g., upper and lower sides). This reduces the signal interference of the high-voltage power terminal fluctuation on the low-voltage drive terminal and better ensures the normal operation of the relevant switching devices. Furthermore, since the DC input and DC output terminals are arranged on opposite third and fourth sides, spanning the entire power semiconductor module, the transmission distance from different phases of the three-phase inverter to the DC port can be balanced. This ensures good current sharing among parallel devices in the power semiconductor module. At the same time, the arrangement of these ports in the power semiconductor module promotes the symmetry of the device layout, which can effectively reduce the parasitic inductance of the power semiconductor module. This allows the power semiconductor module to adapt to higher currents (e.g., the upper limit of current can be increased to 300A), operating junction temperatures, switching frequencies, etc., thereby improving its high-frequency performance and better meeting user needs.

[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the present invention and, together with the description, serve to explain the principles of the present invention.

[0018] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0020] Figure 1 This is a schematic diagram of the pin layout of a power semiconductor module according to an exemplary embodiment.

[0021] Figure 2 This is a schematic diagram of the circuit topology of a power semiconductor module according to an exemplary embodiment.

[0022] Figure 3 This is a schematic diagram of the appearance of a power semiconductor module according to an exemplary embodiment.

[0023] Figure 4 This is another schematic diagram of the appearance of a power semiconductor module according to an exemplary embodiment.

[0024] Figure 5 This is another schematic diagram of the appearance of a power semiconductor module according to an exemplary embodiment.

[0025] Figure 6 This is a schematic diagram of the internal structure of a power semiconductor module according to an exemplary embodiment.

[0026] Figure 7 This is a schematic diagram of the internal chip mounting of a power semiconductor module according to an exemplary embodiment.

[0027] Figure 8 This is a schematic diagram of the substrate layout of a power semiconductor module according to an exemplary embodiment. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0029] The following disclosure provides numerous different embodiments or examples for implementing various aspects of the present invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0030] For ease of description, spatial relative terms may be used in the text to describe the relative position or movement of one element or feature relative to another element or feature, as shown in the figure. These relative terms include, for example, "inside," "outside," "middle," "outer," "below," "below," "above," "front," "back," etc. Such spatial relative terms are intended to include different orientations of the device in use or operation, other than those depicted in the figure. For example, if the device in the figure undergoes a positional flip, orientation change, or change of motion, these directional indications will change accordingly. For instance, an element described as "below other elements or features" or "below other elements or features" will subsequently be oriented "above other elements or features" or "above other elements or features." Therefore, the example term "below" can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or in other directions), and the spatial relative descriptors used in the text will be interpreted accordingly.

[0031] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0032] The embodiments of this application will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be understood that the preferred embodiments are only for illustrating this application and are not intended to limit the scope of protection of this application.

[0033] To address the technical problem of insufficient high-frequency performance in existing power semiconductor modules, this disclosure provides a power semiconductor module.

[0034] The power semiconductor module disclosed herein includes a braking chopper and a three-phase inverter, and is configured with a square structure (which can be rectangular or square, without limitation), such that the package side frame includes four regions: top, bottom, left, and right. That is, the power semiconductor module includes a first side, a second side, a third side, and a fourth side. In this disclosure, to avoid interference between the high-voltage power terminal and the low-voltage drive terminal, the DC input and DC output terminals of the power semiconductor module are arranged on opposite third and fourth sides (e.g., left and right sides), and partial DC output and DC input terminals are arranged on both the third and fourth sides. The high-voltage pins of the braking chopper and the three-phase inverter are located on the first side of the power semiconductor module, and the low-voltage pins are located on the second side. This separates the high-voltage power terminal and the low-voltage drive terminal, placing them on different sides of the power semiconductor module (e.g., top and bottom). This reduces the signal interference of high-voltage power fluctuations on the low-voltage drive terminal, better ensuring the normal operation of related switching devices. Furthermore, since the DC input and DC output terminals are arranged on opposite third and fourth sides, spanning the entire power semiconductor module, the transmission distance from different phases of the three-phase inverter to the DC port can be balanced. This ensures good current sharing among parallel devices in the power semiconductor module. At the same time, the arrangement of these ports in the power semiconductor module promotes the symmetry of the device layout, which can effectively reduce the parasitic inductance of the power semiconductor module. This allows the power semiconductor module to adapt to higher currents (e.g., the upper limit of current can be increased to 300A), operating junction temperatures, switching frequencies, etc., thereby improving its high-frequency performance and better meeting user needs.

[0035] In one exemplary embodiment, reference Figures 1 to 3 As shown, a power semiconductor module is provided that can be used in applications such as motor drives, servo systems, and auxiliary inverters.

[0036] The power semiconductor module is constructed in a square shape, comprising a first side, a second side, a third side, and a fourth side. The first and second sides form one pair of opposite sides of the square structure, while the third and fourth sides form another pair of opposite sides. For ease of explanation, the following description will use the first side as the top, the second side as the bottom, the third side as the left, and the fourth side as the right.

[0037] The power semiconductor module may include a braking chopper and a three-phase inverter. The high-voltage pins of the braking chopper and the three-phase inverter are located on the first side of the power semiconductor module, and the low-voltage pins of the braking chopper and the three-phase inverter are located on the second side of the power semiconductor module.

[0038] For example, the output pin of the braking chopper is located on the first side, the output pin of each phase of the three-phase inverter is located on the first side, the gate pin and source pin of the transistor of the braking chopper are located on the second side, and the gate pin and source pin of the transistor in the upper and lower bridge arms of each phase of the three-phase inverter are located on the second side.

[0039] In this configuration, a portion of the DC output terminals of the power semiconductor module are located on the third side of the power semiconductor module, and the remaining portion of the DC output terminals of the power semiconductor module are located on the fourth side of the power semiconductor module. A portion of the DC input terminals of the power semiconductor module are located on the third side of the power semiconductor module, and the remaining portion of the DC input terminals of the power semiconductor module are located on the fourth side of the power semiconductor module.

[0040] For example, a power semiconductor module includes a DC bus circuit, with a portion of the DC power output pins of the DC bus circuit located on the third side, the remaining portion of the DC power output pins of the DC bus circuit located on the fourth side, a portion of the DC power input pins of the DC bus circuit located on the third side, and the remaining portion of the DC power input pins of the DC bus circuit located on the fourth side.

[0041] It should be noted that in related technologies, power semiconductor modules are generally based on Si-based IGBT (Insulated Gate Bipolar Transistor) chips and Si-based FRD (Fast Recovery Diode). However, in this embodiment, SiC MOS (Silicon Carbide Metal-Oxide Semiconductor Field-Effect Transistor) and SiC SBD (Silicon Carbide Schottky Barrier Diode) can replace the Si-based solution. For example, SiC MOS transistors can be used in braking choppers and three-phase inverters. SiC SBDs can be used for the diodes in braking choppers. Compared to traditional silicon devices, silicon carbide devices have significant advantages: 1) high bandgap and high thermal conductivity; 2) low on-resistance and switching losses; 3) high switching speed and low reverse recovery losses; 4) high voltage and high temperature resistance; 5) excellent heat dissipation and reliability.

[0042] In some implementations... Pin Layout Reference for Power Semiconductor Modules Figure 1 As shown, the circuit topology of the power semiconductor module can be referenced. Figure 2As shown. In this embodiment, the SiC MOS gate pin 1 of the braking chopper, the SiC MOS source pin 2 of the braking chopper, the SiC MOS gate pin 3 of the upper arm of the U phase of the three-phase inverter (i.e., the SiC MOS gate pin of the upper arm of the U phase of the three-phase inverter), the SiC MOS source pin 4 of the upper arm of the U phase of the three-phase inverter, the SiC MOS gate pin 5 of the lower arm of the U phase of the three-phase inverter, the SiC MOS source pin 6 of the lower arm of the U phase of the three-phase inverter, the SiC MOS gate pin 7 of the upper arm of the V phase of the three-phase inverter, the SiC MOS source pin 8 of the upper arm of the V phase of the three-phase inverter, the SiC MOS gate pin 9 of the lower arm of the V phase of the three-phase inverter, the SiC MOS source pin 10 of the lower arm of the V phase of the three-phase inverter, the SiC MOS gate pin 11 of the upper arm of the W phase of the three-phase inverter, and the SiC MOS source pin 12 of the upper arm of the W phase of the three-phase inverter... The low-voltage pins, such as MOS source pin 12, SiC MOS gate pin 13 of the lower arm of the three-phase inverter W-phase, and SiC MOS source pin 14 of the lower arm of the three-phase inverter W-phase, are located on the lower side of the power semiconductor. The three DC output pins 15, 16, and 17 of the DC bus circuit, and the three DC input pins 18, 19, and 20 of the DC bus circuit, are all located on the right side; that is, the three D- pins and three D+ pins of the DC bus circuit are located on the right side of the power semiconductor. The pins, such as NTC T1 pin 21, NTCT2 pin 22, the three-phase inverter W-phase output pins (i.e., 23, 24, 25, and 26 in the figure), the three-phase inverter V-phase output pins (i.e., 27, 28, 29, and 30 in the figure), the three-phase inverter U-phase output pins (i.e., 31, 32, 33, and 34 in the figure), and the braking chopper O-phase output pins (i.e., 35, 36, and 37 in the figure), are located on the upper side of the power semiconductor. The remaining three DC power output pins 38, 39, and 40 of the DC bus circuit, as well as the remaining three DC power input pins 41, 42, and 43 of the DC bus circuit, are all located on the left side. That is, the remaining three D- pins and three D+ pins of the DC bus circuit are located on the left side of the power semiconductor.

[0043] This implementation can be developed based on the packaging technology of power semiconductor modules (e.g., based on Econo PIM3) and can be applied to packages of similar specifications. In this embodiment, replacing the Si-based solution with SiC MOS and SiC SBD can improve the power rating, operating junction temperature, and switching frequency of the power semiconductor module, enabling its application in higher power and higher frequency operating scenarios. The main improvement lies in reducing the parasitic inductance of the module to leverage the advantages of silicon carbide devices (high operating junction temperature, high switching speed, etc.), thereby further reducing voltage spikes and switching losses and improving module performance. Furthermore, based on the new pin layout, the high-voltage power side and the low-voltage drive side can be separated and located on different sides of the power semiconductor module (e.g., the upper and lower sides). This reduces the signal interference of high-voltage power side fluctuations on the low-voltage drive side. At the same time, the gates and sources of the drive power chips used to form the braking chopper and three-phase inverter are paired in pairs to reduce signal crosstalk between the drives, better ensuring the normal operation of the relevant switching devices. Furthermore, since the DC input and DC output terminals are arranged on opposite third and fourth sides, spanning the entire power semiconductor module, the transmission distance from different phases of the three-phase inverter to the DC port can be balanced. This effectively ensures current sharing among parallel devices in the power semiconductor module. At the same time, the arrangement of these ports in the power semiconductor module promotes the symmetry of the device layout, which can effectively reduce the parasitic inductance of the power semiconductor module. This allows the power semiconductor module to adapt to higher currents (e.g., the upper limit of current can be increased to 300A), operating junction temperatures (e.g., the upper limit of operating junction temperature can be increased to 175℃), and switching frequencies (e.g., the upper limit of switching frequency can be increased to 50kHz), thereby improving its high-frequency performance and better meeting user needs.

[0044] In one exemplary embodiment, a power semiconductor module is provided. (Reference) Figures 1 to 8 As shown, in this embodiment, the power semiconductor module may include a first substrate and a second substrate. For example, the first substrate is located in the power semiconductor module near the third side, and the second substrate is located in the power semiconductor module near the fourth side, that is, the first substrate and the second substrate are the left substrate and the right substrate, respectively.

[0045] The backing plate can be a three-layer structure, with copper-clad layers on the top and bottom and a ceramic layer in the middle. It can be an AMB (Active Metal Brazing) ceramic backing plate or a DBC (Direct Bond Copper) ceramic backing plate.

[0046] The braking chopper, the upper and lower bridge arms of the U phase of the three-phase inverter, and the upper bridge arm of the V phase of the three-phase inverter are disposed on the first liner plate, while the lower bridge arm of the V phase of the three-phase inverter and the upper and lower bridge arms of the W phase of the three-phase inverter are disposed on the second liner plate.

[0047] The first liner may be provided with a first mountain-shaped frame 73, a second mountain-shaped frame 96, a first slab-shaped frame 76, and a second slab-shaped frame 79. The first mountain-shaped frame 73, the second mountain-shaped frame 96, the first slab-shaped frame 76, and the second slab-shaped frame 79 are nested and enclosed. The first mountain-shaped frame 73 is located in the power semiconductor module near the first side, and the second mountain-shaped frame 96 is located in the power semiconductor module near the second side. The first mountain-shaped frame 73 is used to support part of the input terminal of the power semiconductor module, and the second mountain-shaped frame 96 is used to support part of the output terminal of the power semiconductor module.

[0048] The diodes of the braking chopper, the transistors of the upper arm of the U phase of the three-phase inverter, and the transistors of the upper arm of the V phase of the three-phase inverter are all disposed in the first mountain-shaped frame 73, the transistors of the braking chopper are disposed in the first occupation frame 76, and the transistors of the lower arm of the U phase of the three-phase inverter are disposed in the second occupation frame 79.

[0049] For example, refer to Figure 6As shown, the first substrate is the left substrate 72. The left substrate 72 houses the braking chopper, the upper and lower bridge arms of the U-phase of the three-phase inverter, and the upper bridge arm of the V-phase of the three-phase inverter. Specifically, the left substrate 72 may be equipped with a SiC MOS gate resistor group 97 for the braking chopper, a SiC MOS gate resistor group 77 for the upper bridge arm of the U-phase of the three-phase inverter, a SiC MOS gate resistor group 94 for the lower bridge arm of the U-phase of the three-phase inverter, and a SiC MOS gate resistor group 80 for the upper bridge arm of the V-phase of the three-phase inverter. The main function of the gate resistor group is to balance the switching speed and overcurrent of the MOS chipset, thereby improving the parallel performance of the chips. The first mountain-shaped frame 73 houses the braking chopper SBD chip group 74, the three-phase inverter U-phase upper bridge arm SiC MOS (which may include the three-phase inverter U-phase upper bridge arm SiC MOS gate resistor group 77 and the three-phase inverter U-phase upper bridge arm SiC MOS chip group 78), and the three-phase inverter V-phase upper bridge arm SiC MOS (which may include the three-phase inverter V-phase upper bridge arm SiC MOS gate resistor group 80 and the three-phase inverter V-phase upper bridge arm SiC MOS chip group 81). The first occupying frame 76 houses the braking chopper SiC MOS (which may include the braking chopper SiC MOS gate resistor group 97 and the braking chopper SiC MOS chip group 98). The second occupying frame 79 houses the three-phase inverter U-phase lower bridge arm SiC MOS (which may include the three-phase inverter U-phase lower bridge arm SiC MOS gate resistor group 94 and the three-phase inverter U-phase lower bridge arm SiC MOS chip group 95).

[0050] The second liner may be provided with an F-shaped frame 87, a third mountain-shaped frame 91, a third slab-shaped frame 82, and a fourth slab-shaped frame 85. The F-shaped frame 87, the third mountain-shaped frame 91, the third slab-shaped frame 82, and the fourth slab-shaped frame 85 are nested and enclosed. The F-shaped frame 87 is located in the power semiconductor module near the first side, and the third mountain-shaped frame 91 is located in the power semiconductor module near the second side. The first mountain-shaped frame 73 is used to carry the remaining input terminals of the power semiconductor module, and the second mountain-shaped frame 96 is used to carry the remaining output terminals of the power semiconductor module.

[0051] The transistors of the upper arm of the W phase of the three-phase inverter are disposed in the F-type frame 87, the transistors of the lower arm of the V phase of the three-phase inverter are disposed in the third type frame 82, and the transistors of the lower arm of the W phase of the three-phase inverter are disposed in the fourth type frame 85.

[0052] For example, the second liner can be a right-side liner 88, which houses the lower V-phase bridge arm, the upper W-phase bridge arm, and the lower W-phase bridge arm of the three-phase inverter. For instance, it may include a SiC MOS gate resistor group 92 for the lower V-phase bridge arm of the three-phase inverter, a SiC MOS gate resistor group 83 for the upper W-phase bridge arm of the three-phase inverter, and a SiC MOS gate resistor group 89 for the lower W-phase bridge arm of the three-phase inverter. The F-frame 87 houses the upper arm SiC MOS of the three-phase inverter W phase (which may include, for example, the three-phase inverter W phase upper arm SiC MOS chipset 84), the third frame 82 houses the lower arm SiC MOS of the three-phase inverter V phase (which may include the three-phase inverter V phase lower arm SiC MOS chipset 93 and the three-phase inverter V phase lower arm SiC MOS gate resistor group 92), and the fourth frame 85 houses the lower arm SiC MOS of the three-phase inverter W phase (which may include the three-phase inverter W phase lower arm SiC MOS chipset 90 and the three-phase inverter W phase lower arm SiC MOS gate resistor group 89).

[0053] It should be noted that this embodiment can be an improvement based on the above embodiment. Although the above embodiment can improve the high power and high frequency performance of the power semiconductor module to a certain extent, it is still limited by the number of pins on the package side frame 45. When applied to higher power and higher current conditions, the pin output capability is limited, and the pins may experience a temperature rise due to the Joule heating effect, eventually melting the side frame and causing failure.

[0054] In this embodiment, the nested envelopment of the dome-shaped frame and the mountain-shaped frame, as well as the nested envelopment of the F-shaped frame 87, the mountain-shaped frame, and the dome-shaped frame, can cancel out magnetic field changes in the power semiconductor module, reducing the parasitic inductance of the substrate to below 14nH. This further reduces voltage spikes and switching losses, improving module performance to meet the needs of high-power, high-frequency applications. Additionally, this embodiment can use bonding technology to attach the chip to the copper layer on the substrate, between chips, and between the copper layer on the substrate and the pins 44 using bonding wires 75. Figure 1 The circuit topology and pin numbering are defined for wiring. After the bonding process is completed, the module is potted to isolate moisture, which can improve the reliability of the module.

[0055] In one exemplary embodiment, a power semiconductor module is provided. (Reference) Figures 1 to 8As shown, this power semiconductor module replaces the Si-based solution with SiC MOS (Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor) and SiC SBD (Silicon Carbide Schottky Barrier Diode), increasing the current rating of the power semiconductor module to a maximum of 300A and achieving a switching frequency exceeding 50kHz. The module's substrate layout structure is optimized, resulting in an internal parasitic inductance as low as 14nH, further reducing voltage spikes and switching losses to improve product performance. Since the three-phase rectifier bridge is not a high-frequency rectifier and can be separately placed in other components in practical applications, this embodiment only includes a braking chopper and a three-phase inverter, with customized module pinouts and functions.

[0056] The power semiconductor module in this embodiment is developed based on the Econo PIM3 (a power integrated module packaging technology offered by a certain company) packaging technology, and can be applied to packages of similar specifications. Pin definitions in the product can be found in [reference needed]. Figure 1 The product's circuit topology can be referenced. Figure 2 The product's appearance illustration can be used as a reference. Figures 3 to 5 The internal structure of the product can be referenced. Figure 6 The internal chip layout diagram of the product can be referenced. Figure 7 The product's lining layout can be referenced. Figure 8 .

[0057] The power semiconductor module of this embodiment may include a package side frame 45, a substrate 46, a top cover 47, and multiple pin pins 44. The package side frame 45 includes four pin areas: top, bottom, left, and right. To avoid interference between the high-voltage power terminals and the low-voltage drive terminals, the two high-voltage terminals, DC+ and DC-, are respectively placed on the left and right sides. The high-voltage terminals of the braking chopper and the U-phase, V-phase, and W-phase of the three-phase inverter are placed on the upper side of the module, and the low-voltage drive terminals of the braking chopper and the three-phase inverter are placed on the lower side of the module. In this way, the high-voltage power terminals and the low-voltage drive terminals are separated and located on different sides of the module. At the same time, the gate and source of the drive power chip are paired in pairs to reduce signal crosstalk between the drives. Meanwhile, the DC+ and DC- pins are located on the left and right sides of the module, spanning the entire module, balancing the transmission distance from different phases of the three-phase inverter to the DC terminal. Due to the limited number of pins on the PIM3 package side frame 45, the current specification of the power semiconductor module is limited to 300A. When applied to higher power and higher current applications, the pin output capability is limited, which may cause the pins to heat up due to the Joule heating effect, eventually melting the side frame and causing failure.

[0058] The power semiconductor module in this embodiment includes two substrates with a three-layer structure: upper and lower copper layers and a middle ceramic layer. AMB (Active Metal Brazing) or DBC (Direct Bond Copper) ceramic substrates can be used. The left substrate 72 houses the braking chopper, the upper and lower arms of the U-phase of the three-phase inverter, and the upper arm of the V-phase of the three-phase inverter. Examples include the SiC MOS gate resistor group 97 for the braking chopper, the SiC MOS gate resistor group 77 for the upper arm of the U-phase of the three-phase inverter, the SiC MOS gate resistor group 94 for the lower arm of the U-phase of the three-phase inverter, and the SiC MOS gate resistor group 80 for the upper arm of the V-phase of the three-phase inverter. It should be noted that the main function of the gate resistor group is to balance the switching speed and overcurrent of the MOS chipset, thereby improving the parallel performance of the chips.

[0059] In the left-side liner 72, the first mountain-shaped frame 73 houses the SiC SBD (e.g., may include the SiC SBD chipset of the braking chopper), the three-phase inverter U-phase upper arm SiC MOS (may include the three-phase inverter U-phase upper arm SiC MOS gate resistor group 77 and the three-phase inverter U-phase upper arm SiC MOS chipset 78), and the three-phase inverter V-phase upper arm SiC MOS (may include the three-phase inverter V-phase upper arm SiC MOS gate resistor group 80 and the three-phase inverter V-phase upper arm SiC MOS chipset 81). The first occupant frame 76 houses the braking chopper SiC MOS (may include the braking chopper SiCMOS gate resistor group 97 and the braking chopper SiC MOS chipset 98). The second occupant frame 79 houses the three-phase inverter U-phase lower arm SiC MOS (may include the three-phase inverter U-phase lower arm SiC MOS). MOS gate resistor group 94 and SiC MOS chip group 95 of the lower bridge arm of the U phase of the three-phase inverter.

[0060] The right-side liner 88 houses the lower arm of the V phase of the three-phase inverter, the upper arm and the lower arm of the W phase of the three-phase inverter, such as the SiC MOS gate resistor group 92 of the lower arm of the V phase of the three-phase inverter, the SiC MOS gate resistor group 83 of the upper arm of the W phase of the three-phase inverter, and the SiC MOS gate resistor group 89 of the lower arm of the W phase of the three-phase inverter.

[0061] In the right-side liner 88, the F-type frame 87 houses the SiC MOS of the upper bridge arm of the W phase of the three-phase inverter (which may include, for example, the SiC MOS chipset 84 of the upper bridge arm of the W phase of the three-phase inverter), the third-type frame 82 houses the SiC MOS of the lower bridge arm of the V phase of the three-phase inverter (which may include the SiC MOS chipset 93 of the lower bridge arm of the V phase of the three-phase inverter and the SiCMOS gate resistor group 92 of the lower bridge arm of the V phase of the three-phase inverter), and the fourth-type frame 85 houses the SiC MOS of the lower bridge arm of the W phase of the three-phase inverter (which may include the SiC MOS chipset 90 of the lower bridge arm of the W phase of the three-phase inverter and the SiC MOS gate resistor group 89 of the lower bridge arm of the W phase of the three-phase inverter).

[0062] The power semiconductor also includes a second mountain-shaped frame 96 and a third mountain-shaped frame 91, which are used to receive the output terminals (i.e., DC+ pin and DC- pin) of the power semiconductor module.

[0063] This embodiment of the power semiconductor module replaces the Si-based solution with SiC MOS and SiC SBD, increasing the current rating of the power semiconductor module to a maximum of 300A, the maximum operating junction temperature to 175°C, and the switching frequency to exceed 50kHz. Furthermore, the power semiconductor module employs a nested envelope structure of slotted and mountain-shaped frames, as well as a nested envelope structure of F-shaped frame 87, mountain-shaped frame, and slotted frame. This structure can cancel out magnetic field variations within the power semiconductor module, reducing the parasitic inductance of the substrate to below 14nH, further reducing voltage spikes and switching losses, and improving module performance to meet the needs of high-power, high-frequency applications. Additionally, this embodiment utilizes bonding technology to attach bonding wires 75 between the chip and the copper layer on the substrate, between chips, and between the copper layer on the substrate and the pins 44. Figure 2 Circuit topology and appendix Figure 1 The pin numbers are defined for wiring. After the bonding process is completed, the module is potted to isolate moisture, which can improve the reliability of the module.

[0064] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0065] It should be noted that the terms "one implementation," "embodiment," "exemplary embodiment," and "some embodiments" used in the specification indicate that the described embodiment may include a specific feature, structure, or characteristic, but not every embodiment necessarily includes that specific feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Moreover, when a specific feature, structure, or characteristic is described in connection with an embodiment, implementing such a feature, structure, or characteristic in conjunction with other embodiments, whether explicitly described or not, is within the knowledge scope of those skilled in the art.

[0066] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0067] The above embodiments are merely preferred embodiments provided to fully illustrate this application, and the scope of protection of this application is not limited thereto. Equivalent substitutions or modifications made by those skilled in the art based on this application are all within the scope of protection of this application.

Claims

1. A power semiconductor module, characterized in that, The power semiconductor module includes a braking chopper and a three-phase inverter. The high-voltage pins of the braking chopper and the three-phase inverter are located on the first side of the power semiconductor module, and the low-voltage pins of the braking chopper and the three-phase inverter are located on the second side of the power semiconductor module. A portion of the DC output terminals of the power semiconductor module are disposed on the third side of the power semiconductor module, and the remaining portion of the DC output terminals of the power semiconductor module are disposed on the fourth side of the power semiconductor module. A portion of the DC input terminals of the power semiconductor module are disposed on the third side of the power semiconductor module, and the remaining portion of the DC input terminals of the power semiconductor module are disposed on the fourth side of the power semiconductor module. The power semiconductor module is constructed in a square structure, with the first side and the second side forming a pair of opposite sides of the square structure, and the third side and the fourth side forming another pair of opposite sides of the square structure.

2. The power semiconductor module according to claim 1, characterized in that, The output pin of the braking chopper is located on the first side, and the output pin of each phase of the three-phase inverter is located on the first side. The gate pin and source pin of the transistor of the braking chopper are located on the second side, and the gate pin and source pin of the transistor in the upper and lower bridge arms of each phase of the three-phase inverter are located on the second side.

3. The power semiconductor module according to claim 1, characterized in that, The power semiconductor module includes a DC bus circuit, with a portion of the DC power output pins of the DC bus circuit located on the third side, and the remaining portion of the DC power output pins of the DC bus circuit located on the fourth side. A portion of the DC power input pins of the DC bus circuit are located on the third side, and the remaining portion of the DC power input pins of the DC bus circuit are located on the fourth side.

4. The power semiconductor module according to claim 1, characterized in that, The power semiconductor module includes a first substrate and a second substrate. The braking chopper, the upper and lower bridge arms of the U phase of the three-phase inverter, and the upper bridge arm of the V phase of the three-phase inverter are disposed on the first substrate. The lower bridge arm of the V phase of the three-phase inverter and the upper and lower bridge arms of the W phase of the three-phase inverter are disposed on the second substrate.

5. The power semiconductor module according to claim 4, characterized in that, The first liner is provided with a first mountain-shaped frame, a first occupying frame, and a second occupying frame. The diodes of the braking chopper, the transistors of the upper bridge arm of the U phase of the three-phase inverter, and the transistors of the upper bridge arm of the V phase of the three-phase inverter are all disposed in the first mountain-shaped frame. The transistors of the braking chopper are disposed in the first occupying frame, and the transistors of the lower bridge arm of the U phase of the three-phase inverter are disposed in the second occupying frame.

6. The power semiconductor module according to claim 4, characterized in that, The second liner is provided with an F-type frame, a third-type frame and a fourth-type frame. The transistors of the upper arm of the W phase of the three-phase inverter are disposed in the F-type frame, the transistors of the lower arm of the V phase of the three-phase inverter are disposed in the third-type frame, and the transistors of the lower arm of the W phase of the three-phase inverter are disposed in the fourth-type frame.

7. The power semiconductor module according to claim 4, characterized in that, The first liner is located in the power semiconductor module near the third side. The first liner is provided with a first mountain-shaped frame, a second mountain-shaped frame, a first slab frame, and a second slab frame. The first mountain-shaped frame, the second mountain-shaped frame, the first slab frame, and the second slab frame are nested and enveloping each other. The first mountain-shaped frame is located in the power semiconductor module near the first side, and the second mountain-shaped frame is located in the power semiconductor module near the second side. The first mountain-shaped frame is used to support part of the input terminal of the power semiconductor module, and the second mountain-shaped frame is used to support part of the output terminal of the power semiconductor module.

8. The power semiconductor module according to claim 7, characterized in that, The second liner is located in the power semiconductor module near the fourth side. The second liner is provided with an F-shaped frame, a third mountain-shaped frame, a third slab-shaped frame, and a fourth slab-shaped frame. The F-shaped frame, the third mountain-shaped frame, the third slab-shaped frame, and the fourth slab-shaped frame are nested and enveloped. The F-shaped frame is located in the power semiconductor module near the first side, and the third mountain-shaped frame is located in the power semiconductor module near the second side. The first mountain-shaped frame is used to support the remaining input terminals of the power semiconductor module, and the second mountain-shaped frame is used to support the remaining output terminals of the power semiconductor module.

9. The power semiconductor module according to any one of claims 1-8, characterized in that, The transistors in both the braking chopper and the three-phase inverter include silicon carbide metal-oxide-semiconductor field-effect transistors, and the diodes in the braking chopper include silicon carbide Schottky barrier diodes.

10. The power semiconductor module according to claim 9, characterized in that, The upper and lower bridge arms of each phase of the braking chopper and the three-phase inverter each include corresponding silicon carbide metal oxide semiconductor field-effect transistor gate resistor groups and silicon carbide metal oxide semiconductor field-effect transistor chip groups. The gate resistor group of the silicon carbide metal oxide semiconductor field-effect transistor is used to balance the switching speed and overcurrent of the corresponding silicon carbide metal oxide semiconductor field-effect transistor chip group.

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