A chip package device and electronic equipment

Abstract

The application relates to the semiconductor field and discloses a chip packaging device and an electronic equipment. The device comprises: a circuit board with a first hollow region, the circuit board being provided with a conductive needle, and a first surface of the circuit board being provided with a conductive circuit layer; a first end of the conductive needle is located on the first surface and is electrically connected with the conductive circuit layer, and a second end of the conductive needle is located on a second surface of the circuit board; a functional module with a second hollow region, the functional module being located on one side of the second surface of the circuit board; the functional module internally having a conductive adapter wire, a first end of the conductive adapter wire being electrically connected with the second end of the conductive needle, and a second end of the conductive adapter wire being exposed on a side surface of the functional module; a chip arranged in the first hollow region, electrodes of the chip being electrically connected with the conductive circuit layer through conductive connecting wires, and at least part of the chip being located in the second hollow region in projection of the functional module. In the application, part of the chip is directly contacted with air, so that the heat dissipation effect of the chip is enhanced.

Description

Technical Field

[0001] This application relates to the semiconductor field, and in particular to a chip packaging device and an electronic device. Background Technology

[0002] For packaged devices containing chips, heat dissipation is a critical issue, directly determining the chip's performance, reliability, and lifespan. As chip power continues to increase, heat dissipation becomes increasingly important. Current packaged devices use stacked high thermal conductivity dielectrics in the die-mount area of ​​the circuit board, which provides some heat dissipation, but due to the overall thickness of the substrate, the heat dissipation effect often falls short of expectations.

[0003] Therefore, how to solve the above-mentioned technical problems should be a key focus for those skilled in the art. Utility Model Content

[0004] The purpose of this application is to provide a chip packaging device and an electronic device to improve the heat dissipation performance of the chip.

[0005] To address the aforementioned technical problems, this application provides a chip packaging device, comprising:

[0006] A circuit board having a first cutout area, the circuit board having conductive pins, and a conductive circuit layer being formed on a first surface of the circuit board; a first end of the conductive pin is located on the first surface and is electrically connected to the conductive circuit layer, and a second end of the conductive pin is located on a second surface of the circuit board.

[0007] A functional module having a second cutout area is located on one side of the second surface of the circuit board; the functional module has a conductive adapter wire inside, the first end of the conductive adapter wire is electrically connected to the second end of the conductive pin, and the second end of the conductive adapter wire is exposed on the side of the functional module.

[0008] The chip is disposed in the first hollow area, the electrodes of the chip are electrically connected to the conductive line layer through conductive connection lines, and at least part of the chip's projection in the functional module is located in the second hollow area.

[0009] Optionally, the size of the chip is larger than the size of the second cutout area.

[0010] Optionally, it further includes: a first fixing part for fixing the chip to the circuit board.

[0011] Optionally, the size of the chip is smaller than the size of the second cutout area; the chip packaging device further includes a second fixing part for fixing the chip to the circuit board.

[0012] Optionally, the circuit board is located on the upper surface of the functional module, and a groove is provided on the upper surface of the functional module corresponding to the area of ​​the pin header, and a conductive medium is provided in the groove; the conductive medium is used to electrically connect the second end of the conductive pin to the first end of the conductive adapter cable; the pin header is formed by a plurality of the conductive pins, and the conductive adapter cable forms a connector on the side of the functional module.

[0013] Optionally, it also includes a lens module fixed to a first surface of the circuit board.

[0014] Optionally, the functional module includes at least one of a voltage divider, a rectifier, and a filter.

[0015] Optionally, it also includes a heat sink disposed in the second hollowed-out area.

[0016] Optionally, when the radiator is a cooling fan, it further includes: foam metal disposed in the second hollow area.

[0017] This application also provides an electronic device including any of the chip packaging devices described above.

[0018] The chip packaging device in this application includes a circuit board, a functional module, and a chip. The circuit board has a first cutout area, the functional module has a second cutout area, and the chip is located in the first cutout area, with at least a portion of the chip's projection onto the functional module located in the second cutout area. Therefore, in this application, the chip is at least partially exposed on the side closest to the functional module, directly contacting the air, which enhances the chip's heat dissipation. Furthermore, conductive pins and a conductive line layer are provided in the circuit board. The chip's electrodes are electrically connected to the conductive line layer, the conductive line layer is electrically connected to the first end of the conductive pin, and the second end of the conductive pin is electrically connected to the conductive adapter line in the functional module. This allows the chip's signals to be led out from the side of the functional module, reducing the height of the chip packaging device and facilitating miniaturization.

[0019] In addition, this application also provides an electronic device that has the above-mentioned advantages. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 A top view of a circuit board provided in an embodiment of this application;

[0022] Figure 2A cross-sectional schematic diagram of a chip packaging device provided in an embodiment of this application. Figure 1 ;

[0023] Figure 3 A cross-sectional schematic diagram of a chip packaging device provided in an embodiment of this application. Figure 2 ;

[0024] Figure 4 A cross-sectional schematic diagram of a chip packaging device provided in an embodiment of this application. Figure 3 ;

[0025] Figure 5 A cross-sectional schematic diagram of a chip packaging device provided in an embodiment of this application. Figure 4 ;

[0026] In the diagram, 1 is the circuit board, 11 is the conductive pin, 12 is the conductive circuit layer, 121 is the bonding finger, 122 is the conductive wire, 13 is the first cutout area, 2 is the functional module, 21 is the second cutout area, 22 is the conductive adapter wire, 23 is the groove, 3 is the chip, 4 is the conductive connection wire, 5 is the first fixing part, 6 is the second fixing part, 7 is the heat sink, 8 is the lens module, 81 is the lens, 82 is the support part, and 9 is the conductive medium. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] Many specific details are set forth in the following description in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0029] As described in the background section, in existing packaged devices, heat dissipation of the chip is improved by stacking high thermal conductivity media on the circuit board. However, due to the large overall thickness of the board, the heat dissipation effect often fails to meet expectations.

[0030] In view of this, this application provides a chip packaging device, please refer to... Figures 1 to 3 ,include:

[0031] A circuit board 1 having a first cutout area 13, the circuit board 1 having a conductive pin 11, and a conductive line 122 layer 12 having a first surface of the circuit board 1; the first end of the conductive pin 11 is located on the first surface and is electrically connected to the conductive line 122 layer 12, and the second end of the conductive pin 11 is located on the second surface of the circuit board 1.

[0032] A functional module 2 having a second cutout area 21 is located on one side of the second surface of the circuit board 1; the functional module 2 has a conductive adapter wire 22 inside, the first end of the conductive adapter wire 22 is electrically connected to the second end of the conductive pin 11, and the second end of the conductive adapter wire 22 is exposed on the side of the functional module 2.

[0033] The chip 3 is disposed in the first hollow area 13, and the electrodes of the chip 3 are electrically connected to the conductive line 122 layer 12 through the conductive connection line 4, and at least part of the projection of the chip 3 in the functional module 2 is located in the second hollow area 21.

[0034] Circuit board 1 is a PCB (Printed Circuit Board).

[0035] The conductive line layer 12 includes bonding fingers 121 and a redistribution layer (RDL). The redistribution layer includes multiple conductive lines 122, one end of which is connected to the bonding fingers 121, and the other end of which is connected to the conductive pins 11. The bonding fingers 121 are distributed around the edge of the first cutout region 13, and the distance from the edge of the first cutout region 13 can be 1 mm.

[0036] Since the first cutout area 13 needs to hold the chip 3, the size of the first cutout area 13 is larger than the size of the chip 3.

[0037] There are multiple conductive pins 11, arranged in rows or columns along the edge of the circuit board 1. For example... Figure 1 As shown, conductive pins 11 are arranged in rows on the left and right edges of the circuit board 1. When conductive pins 11 are also distributed on the top and bottom edges of the circuit board 1, the conductive pins 11 are arranged in rows on the top and bottom edges. Multiple conductive pins 11 form rows on the edges of the circuit board 1.

[0038] The conductive pins 11 are used to connect to the conductive adapter lines 22 in the functional module 2 to bring out the signals from the chip 3. The number of conductive adapter lines 22 is the same as the number of conductive pins 11. Corresponding to the pin headers on the edge of the circuit board 1, the conductive adapter lines 22 form a connector on the side of the functional module 2. An interface for electrical connection to the connector can also be provided at the connector so that the chip 3 packaged device can be connected to other components through the interface.

[0039] Circuit board 1 is disposed on the upper surface of functional module 2. Functional module 2 has a groove 23 in the area corresponding to the pin row. A conductive medium 9 is disposed in the groove 23. The conductive medium 9 is used to electrically connect the second end of the conductive pin 11 to the first end of the conductive adapter cable 22.

[0040] As one possible implementation, the functional module 2 includes at least one of a voltage divider, a rectifier, and a filter to achieve the functions of voltage division, rectification, and filtering.

[0041] The first cutout area 13 and the second cutout area 21 overlap, and at least a portion of the chip 3 is located in the overlapping part of the first cutout area 13 and the second cutout area 21.

[0042] It should be noted that this application does not limit the size relationship between chip 3 and the second hollow area 21.

[0043] As one possible implementation method, such as Figure 2 As shown, the size of the chip 3 is larger than the size of the second hollow area 21. At this time, the projection of part of the chip 3 onto the functional module 2 is located in the second hollow area 21.

[0044] In this embodiment, a portion of the chip 3 is fixed to the functional module 2. During the manufacturing process, the chip 3 and the functional module 2 can be fixedly connected by applying adhesive to the functional module 2, which is a simple manufacturing method.

[0045] Furthermore, in one embodiment of this application, the chip 3 packaging device may further include: a first fixing part 5, for fixing the chip 3 to the circuit board 1.

[0046] The first fixing part 5 can be black glue, which is a colloid mixed with black dye.

[0047] The upper surface of the first fixing part 5 can also be higher than the conductive connecting wire 4, that is, the first fixing part 5 covers the conductive connecting wire 4, which can protect the conductive connecting wire 4 and reduce the risk of the conductive connecting wire 4 breaking.

[0048] As another possible implementation method, such as Figure 3 As shown, the size of the chip 3 is smaller than the size of the second cutout area 21; the chip 3 packaging device also includes a second fixing part 6 for fixing the chip 3 to the circuit board 1.

[0049] The second fixing part 6 can be black glue, which is a colloid mixed with black dye.

[0050] The upper surface of the second fixing part 6 can also be higher than the conductive connecting wire 4, that is, the first fixing part 5 covers the conductive connecting wire 4, which can protect the conductive connecting wire 4 and reduce the risk of the conductive connecting wire 4 breaking.

[0051] for Figure 2 and Figure 3 The chip 3 shown is a packaged device, and chip 3 outputs signals.

[0052] The chip 3 packaged device in this embodiment includes a circuit board 1, a functional module 2, and a chip 3. The circuit board 1 has a first cutout area 13, and the functional module 2 has a second cutout area 21. The chip 3 is located in the first cutout area 13, and at least a portion of the chip 3's projection onto the functional module 2 is located in the second cutout area 21. Therefore, in this embodiment, at least a portion of the chip 3 is exposed on the side closest to the functional module 2, directly contacting the air, which enhances the heat dissipation effect of the chip 3. In addition, conductive pins 11 and conductive lines 122-way layer 12 are provided in the circuit board 1. The electrodes of the chip 3 are electrically connected to the conductive lines 122-way layer 12, the conductive lines 122-way layer 12 are electrically connected to the first end of the conductive pins 11, and the second end of the conductive pins 11 is electrically connected to the conductive adapter line 22 in the functional module 2. This allows the signal of the chip 3 to be led out from the side of the functional module 2, reducing the height of the chip 3 packaged device and facilitating miniaturization.

[0053] Please refer to Figure 4 and Figure 5 Based on the above embodiments, in one embodiment of this application, the chip 3 packaging device may further include: a lens module 8, fixed to the first surface of the circuit board 1.

[0054] The lens module 8 includes a lens 81 and a support 82. The support 82 is used to fix the lens 81. The lens 81 is located above the chip 3. At this time, the chip 3 outputs an image.

[0055] Based on any of the above embodiments, in one embodiment of this application, the chip 3 packaging device may further include: a heat sink 7 disposed in the second hollow area 21.

[0056] In this embodiment, the type of heat sink 7 is not limited and can be set arbitrarily. For example, the heat sink 7 can be a cooling fan for air cooling or a liquid cooling device. The cooling fan delivers cooling air to the chip 3 to dissipate heat from the chip 3; the liquid cooling device sprays coolant onto the chip to dissipate heat from the chip 3.

[0057] In this embodiment, by setting a heat sink 7 in the second hollow area 21, the heat dissipation effect on the chip 3 can be further enhanced.

[0058] In one embodiment of this application, when the heat sink 7 is a cooling fan, it may further include a heat dissipation duct disposed between the heat sink 7 and the chip 3.

[0059] By setting up a heat dissipation airflow, the cooling air provided by the cooling fan can be precisely delivered to chip 3, improving the heat dissipation effect on chip 3.

[0060] In one embodiment of this application, when the radiator 7 is a cooling fan, it may further include: foam metal disposed in the second hollow area 21.

[0061] The foamed metal can be foamed copper or foamed aluminum, etc., and this application does not make a specific limitation, but depends on the specific circumstances.

[0062] Foam metal has a large specific surface area and complex three-dimensional through-pores, which can greatly enhance turbulence and heat exchange, and improve the heat dissipation efficiency of chip 3.

[0063] This application also provides an electronic device including the chip packaging device described in any of the above embodiments.

[0064] This application does not limit the types of electronic devices; the definition depends on the circumstances. For example, electronic devices can be laptops, smartphones, tablets, etc.

[0065] The following is based on Figure 2 and Figure 3 Taking the chip package device shown as an example, the manufacturing method of the chip package device will be introduced.

[0066] Example 1: The size of the chip is larger than the size of the second cutout area.

[0067] Step 1: Create a first cutout area 13 on the circuit board. The size of the first cutout area 13 is larger than the size of the chip.

[0068] Step 2: Create bonding fingers on the first surface of the circuit board, with the bonding fingers arranged around the first cutout area 13; and create conductive pins on the edge of the circuit board to form a pin array.

[0069] Step 3: Create a redistribution layer on the first surface of the circuit board. One end of the conductive line in the redistribution layer is connected to the bonding finger, and the other end is connected to the conductive pin.

[0070] Step 4: Make conductive adapter wires in the functional module to form a connector, and make grooves at the corresponding pin positions, and make conductive medium in the grooves to electrically connect the pins and connectors.

[0071] Step 5: Apply adhesive to the area where the chip contacts the functional module and fix the chip onto the functional module;

[0072] Step 6: Wire bonding, using conductive wires to electrically connect the chip's electrodes to the bonding fingers;

[0073] Step 7: Make the first fixing part to fix the chip on the circuit board;

[0074] Step 8: Drill holes in the area corresponding to the chip of the functional module to form the second hollow area.

[0075] Example 2: The size of the chip is smaller than the size of the second cutout area.

[0076] Step 1: Create a first cutout area 13 on the circuit board. The size of the first cutout area 13 is larger than the size of the chip.

[0077] Step 2: Create bonding fingers on the first surface of the circuit board, with the bonding fingers arranged around the first cutout area 13; and create conductive pins on the edge of the circuit board to form a pin array.

[0078] Step 3: Create a redistribution layer on the first surface of the circuit board. One end of the conductive line in the redistribution layer is connected to the bonding finger, and the other end is connected to the conductive pin.

[0079] Step 4: Make conductive adapter wires in the functional module to form a connector, and make grooves at the corresponding pin positions, and make conductive medium in the grooves to electrically connect the pins and connectors.

[0080] Step 5: Drill holes in the functional modules; do not remove the drilling slurry at this time.

[0081] Step 6: Apply a UV (Ultraviolet) film to the corresponding chip mounting position on the functional module, and apply adhesive to the UV film.

[0082] Step 7: Mount the chip onto the UV film;

[0083] Step 8: Wire bonding, using conductive wires to electrically connect the chip's electrodes to the bonding fingers;

[0084] Step 9: Make the second fixing part to fix the chip on the circuit board;

[0085] Step 10: Use UV light to irradiate and remove the UV film to remove the above-mentioned hole-drilling consumables along with the UV film.

[0086] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0087] The chip packaging device and electronic device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the solution and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A chip packaging device, characterized in that, include: A circuit board having a first cutout area, the circuit board having conductive pins, and a conductive circuit layer being formed on a first surface of the circuit board; a first end of the conductive pin is located on the first surface and is electrically connected to the conductive circuit layer, and a second end of the conductive pin is located on a second surface of the circuit board. A functional module having a second cutout area is located on one side of the second surface of the circuit board; the functional module has a conductive adapter wire inside, the first end of the conductive adapter wire is electrically connected to the second end of the conductive pin, and the second end of the conductive adapter wire is exposed on the side of the functional module. The chip is disposed in the first hollow area, the electrodes of the chip are electrically connected to the conductive line layer through conductive connection lines, and at least part of the chip's projection in the functional module is located in the second hollow area.

2. The chip packaging device as described in claim 1, characterized in that, The size of the chip is larger than the size of the second cutout area.

3. The chip packaging device as described in claim 2, characterized in that, Also includes: The first fixing part is used to fix the chip to the circuit board.

4. The chip packaging device as described in claim 1, characterized in that, The size of the chip is smaller than the size of the second cutout area; The chip packaging device also includes a second fixing part for fixing the chip to the circuit board.

5. The chip packaging device as described in claim 1, characterized in that, The circuit board is located on the upper surface of the functional module. The upper surface of the functional module has a groove corresponding to the area of ​​the pin header, and a conductive medium is disposed in the groove. The conductive medium is used to electrically connect the second end of the conductive pin to the first end of the conductive adapter cable; the pin header is formed by a plurality of the conductive pins, and the conductive adapter cable forms a connector on the side of the functional module.

6. The chip packaging device as described in claim 1, characterized in that, Also includes: The lens module is fixed to the first surface of the circuit board.

7. The chip packaging device as described in claim 1, characterized in that, The functional module includes at least one of a voltage divider, a rectifier, and a filter.

8. The chip packaging device according to any one of claims 1 to 7, characterized in that, Also includes: A heat sink is disposed in the second hollow area.

9. The chip packaging device as described in claim 8, characterized in that, When the heat sink is a cooling fan, it also includes: Foam metal is placed in the second hollow area.

10. An electronic device, characterized in that, Includes the chip packaging device as described in any one of claims 1 to 9.

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