Flip chip package structure

Abstract

The utility model relates to the chip packaging field discloses a flip chip packaging structure, it includes the substrate and the flip chip connected through the copper column with the substrate, and the encapsulation colloid that combines on the substrate and covers the chip, the chip is distributed with the solder ball, the windowed area that the substrate is jointed with the chip adopts big windowed area mode, the windowed area is fixed and is distributed with the metal solder pad, the surface that metal solder pad is jointed with the solder ball keeps its metal material, the surface of the substrate surface around metal solder pad is the surface that has been browned, the solder ball is welded with metal solder pad through reflow soldering, the utility model has the beneficial effect that: the combination of chip and substrate is more reliable, reduces the stress that chip receives, especially suitable for the occasion application of high heat dissipation requirement of large current.

Description

Technical Field

[0001] This utility model relates to chip packaging, and more particularly to a structure in which a chip is soldered to a substrate by flip-chip bonding. Background Technology

[0002] Flip chip technology connects components face down to a substrate, carrier, or circuit board directly via bumps on the chip. The bumps on the chip are structured as solder balls or copper pillars located at the chip leads and solder balls at the ends of the copper pillars. Currently, the mainstream connection method is to solder the solder balls to pads pre-placed on the substrate, carrier, or circuit board via reflow soldering.

[0003] High-density FCBGA (Flip Chip-Ball Grid Array) substrate technology employs an inverted mounting technique, placing the chip upside down on the substrate and then connecting the chip and substrate via solder balls to achieve electrical connection and signal transmission. This packaging method eliminates the need for wires connecting the chip and substrate, making the connection between the chip and substrate more reliable, thereby reducing power consumption. This also enables higher integration and higher density packaging, meeting higher performance requirements. Furthermore, due to the advanced packaging technology, FCBGA products also have higher reliability and longer lifespan, and are better able to withstand the effects of external environmental factors such as temperature changes, vibration, and humidity.

[0004] Due to the aforementioned advantages of flip chip structures, it is foreseeable that flip chip packaging will be increasingly widely used compared to traditional wire bonding structures.

[0005] The substrate used for mounting and connecting flip chips typically includes the following main processing steps: lamination, drilling, copper plating, wiring, solder mask application, surface treatment, and molding. 1) Lamination is the process of bonding multiple layers of copper foil and dielectric layers together to form a multilayer board; 2) Drilling and copper plating form vias to complete the internal electrical connections of the substrate and provide heat dissipation; 3) After the image is exposed and developed, some copper is etched away to form the circuit, thus realizing different networks; 4) After the green oil is printed, the image is exposed and developed, and then some of the green oil is removed to expose the copper surface of the functional area. 5) Surface treatment: The front chip area is usually treated with OSP (Organic Solderability Preservatives). OSP is an organic film grown on a clean bare copper surface using chemical methods as a protective film; the back pads are usually gold-plated. In subsequent soldering, this OSP protective film is easily and quickly removed by flux at high temperatures, allowing the exposed clean copper surface to bond immediately with molten solder to form a strong solder joint in a very short time. In this method, a large opening is often used, meaning the opening area is close to the size of the chip's Controlled Collapse Component Connection (C4 area), such as... Figure 1 and Figure 2 As shown.

[0006] In the above packaging process, the solder balls diffuse across the copper surface of the substrate after melting during reflow soldering. After flip-chip bonding, the solder paste thickness (H) is relatively small, typically around 10µm, resulting in greater stress on the chip, which may affect its performance. For example... Figure 9 As shown in Figure a, after performing the Moisture Sensitivity Level 3 (MSS) test, the molding compound and the copper surface of the substrate are prone to delamination. The solder will flow away, affecting the electrical performance of the chip. For example, poor contact between the solder and the copper pillars can lead to problems such as short circuits.

[0007] like Figure 3 and Figure 4 As shown, there is another connection method in the prior art called "small window on green solder mask". This method exposes small windows on the green solder mask of the substrate, and uses the exposed copper surface after the window to form FC pads, and then flip-chip solders them to the FC chip. This connection method may cause solder paste voids or cracking of the green solder mask at the small window after moisture sensitivity testing. If there are foreign objects that are not cleaned properly at the small window, it can easily lead to cold solder joints and may also cause substrate warping.

[0008] However, current power supply chips have a large number of high pin counts, and even the same signal design has many such bumps. This requires a large copper surface on the substrate to meet the requirements of high current and heat dissipation. As mentioned earlier, although the existing large copper surface packaging solutions can meet the requirements of high current and heat dissipation, the chip solder balls are prone to spread to the surrounding area during reflow soldering, resulting in a smaller solder paste thickness (H). Therefore, there is a lack of a packaging solution that can meet the heat dissipation requirements and reduce chip stress. Utility Model Content

[0009] The technical problem to be solved by this utility model is to provide a flip chip packaging structure. By changing the surface treatment of the copper surface of the substrate, the thickness of the solder paste at the connection point between the chip and the substrate can be increased under the condition of large window opening, thereby improving the reliability of the solder joint connection, reducing the stress on the chip, and meeting the requirements of high current and heat dissipation of power supply chips.

[0010] The technical solution adopted by this utility model to solve its technical problem is: a flip chip packaging structure, including a substrate and a flip chip connected to the substrate by solder balls, and an encapsulating colloid bonded to the substrate and covering the chip. The window area where the substrate and the chip are joined adopts a large window method. The window area is fixed and distributed with metal pads. The surface of the metal pads and the solder balls is kept as metal. The copper surface around the metal pads is a browned copper surface. The solder balls and the metal pads are soldered by reflow soldering.

[0011] Browning is a step in the existing printed circuit board (PCB) manufacturing process, aimed at enhancing the adhesion between the inner core board and the prepreg. Browning increases the contact area between the copper surface and the resin substrate, strengthening the chemical bonding and physical adsorption between them. The inventors discovered that when browning is applied to the copper surface around the metal pads of the substrate connected to the chip, during reflow soldering, the changes in the surface microstructure and material of the browned surface around the pads alter the surface tension of the flowing solder paste. This hinders the solder paste from flowing around the pads and causes it to flow back to above the pads. Therefore, compared to conventional OPS (Optical Prepreg) reflow soldering, browning significantly increases the thickness of the solder paste at the chip-substrate connection joints.

[0012] In another scenario, the chip has copper pillars distributed on it, with solder balls positioned at the ends of each pillar. During reflow soldering, solder paste flows back between the pads and the copper pillars, bonding them tightly together.

[0013] The beneficial effects of this invention are as follows: after the copper surface around the substrate pads is browned, the diffusion of the solder paste melted by the solder balls to the area around the pads is prevented during the reflow soldering process. The reflow solder paste is less likely to form voids, and the thickness of the solder ball curing layer is increased, making the bonding between the chip and the substrate more reliable and reducing the stress on the chip. At the same time, the large opening of the substrate ensures the heat dissipation requirements. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of an existing substrate with a large window.

[0015] Figure 2 yes Figure 1 A schematic diagram of a flip-chip structure on a substrate.

[0016] Figure 3 This is a schematic diagram of an existing substrate with small openings.

[0017] Figure 4 yes Figure 3 A schematic diagram of a flip-chip structure on a substrate.

[0018] Figure 5This is a schematic diagram of the substrate used in this utility model, which features a large window.

[0019] Figure 6 This is a schematic diagram of the flip-chip packaging structure of this utility model.

[0020] Figure 7 This is a schematic diagram comparing the thickness of solder paste at the solder joint connecting the chip and the substrate in the flip-chip packaging structure (7b) of this utility model with the packaging case (7a) where only the copper surface around the substrate pads is not browned, and all other conditions are exactly the same.

[0021] Figure 8 This is a comparative schematic diagram of a normal copper surface (8a) and a copper surface (8b) after browning treatment in the flip chip packaging structure of this utility model.

[0022] Figure 9 yes Figure 2 A schematic diagram comparing the microstructure of the flip chip (9a) and the flip chip (9b) of this utility model after a reliability test for moisture sensitivity level.

[0023] Figure 10 and Figure 11 This is a schematic diagram of a typical process used in the packaging structure of this utility model.

[0024] The markings in the figure are as follows: 1-substrate, 2-chip, 3-colloid, 10-brown copper surface, 11-metal pad, 12-green solder mask, 13-normal copper surface, 14-substrate dielectric layer, 15-substrate back solder ball, 21-copper pillar, 22-solder ball, H-average thickness of solder ball curing layer. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0026] Example: like Figure 5 and Figure 6 As shown, the flip-chip packaging structure of this utility model includes a substrate 1 and a flip chip 2 connected to the substrate 1 via copper pillars 21, as well as an encapsulating colloid 3 bonded to the substrate 1 and covering the chip 2. Copper pillars 21 are distributed on the chip 2, and solder balls 22 are provided at the ends of the copper pillars 21. The opening area where the substrate 1 and the chip 2 are joined adopts a large opening method. Metal pads 11 are fixed and distributed in the opening area. The surfaces of the metal pads 11 and the solder balls 22 maintain their original metallic material. The copper surface around the metal pads 11 is a browned copper surface 10. The solder balls 22 and the metal pads 11 are soldered by reflow soldering. The metal pads 11 can be electroplated with other metal materials different from copper, such as a nickel-gold alloy, as needed.

[0027] like Figure 7 and Figure 8 As shown, the copper surface after browning treatment is... Figure 5 The browned copper surface 10 shown has a microscopically irregular uneven or locally recessed structure, which differs from ordinary copper surfaces. Figure 5 Compared to the ordinary copper surface 13 shown, the effect of surface tension on the solder ball in the liquefied state is changed, causing the solder ball in the liquefied state to tend to flow back to the metal pad instead of staying on the browned surface. Therefore, the amount of solder paste dispersed around the pad is significantly reduced, the thickness of the solder ball solidification layer is increased, and the solder ball after reflow soldering can be tightly bonded to the copper pillar and the pad. The reflow solder paste is less likely to form voids, making the bonding between the chip and the substrate more reliable and reducing the stress on the chip.

[0028] Furthermore, due to the changes in the microstructure of the substrate surface, it can also form a tighter bond with the encapsulating colloid, improving encapsulation quality, such as... Figure 9 As shown in b, after the reliability (Moisture Sensitivity Level 3) test, the molding compound and the copper surface of the substrate bonded well without delamination.

[0029] In this invention, the substrate is processed with a large window, thus avoiding packaging defects caused by a "small window".

[0030] like Figure 10 and Figure 11 As shown, the implementation process of the packaging structure of this utility model is roughly as follows: 1) Substrate circuit etching; 2) Green oil printing on the substrate; 3) Exposure and development of substrate green oil; 4) Substrate surface treatment, for example, electroplating or electroless plating to create nickel-gold pads, and browning the copper surface around the pads. 5) Flip-chip; 6) Plastic encapsulation: wrapping the chip in plastic; 7) Plant balls on the back of the substrate.

Claims

1. A flip-chip package structure, comprising a substrate (1) and a flip-chip (2) connected to the substrate (1) via solder balls (22), and an encapsulating colloid (3) bonded to the substrate (1) and covering the chip (2), characterized in that: The window area where the substrate (1) and the chip (2) are joined adopts a large window method. The window area is fixed and distributed with metal pads (11). The surface of the metal pads (11) and the solder balls (22) is kept in metal material. The copper surface around the metal pads (11) is a brown copper surface (10) that has been browned. The solder balls (22) and the metal pads (11) are soldered by reflow soldering.

2. The flip-chip packaging structure as described in claim 1, characterized in that: The chip (2) has copper pillars (21) distributed on it, and solder balls (22) are disposed at the ends of each copper pillar (21).

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