A 1.6T NPO silicon photonics engine
Patent Information
- Application Number
- CN202522679649.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-18
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2035-12-18
Smart Images

Figure CN224873754U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of silicon photonics engine technology, specifically to a 1.6T NPO silicon photonics engine. Background Technology
[0002] The structure of the 1.6T NPO silicon photonics engine is as follows: a PCB board, a silicon photonics chip, and a fiber array. The silicon photonics chip is placed on top of the PCB board. To ensure its performance, the silicon photonics chip is flip-chipped onto the PCB board. Black glue is then filled into the gap between the silicon photonics chip and the PCB board to reinforce their adhesion. Similarly, the electrical chip is flip-chipped onto the PCB board, and black glue is filled into the gap between the electrical chip and the PCB board to reinforce their adhesion. A fiber array coupled to the silicon photonics chip is placed within a slot on the PCB board. A fixing block, preferably made of glass, is placed below the silicon photonics chip within the slot on the PCB board. Finally, optical path hard adhesive is used to bond and fix the fixing block, the silicon photonics chip, and the substrate in the fiber array. (Details follow...) Figure 1 , Figure 2 As shown, the silicon photonics chip integrates TX (transmit) and RX (receive), with 16 TX channels and 16 RX channels. The wavelength of a single channel is 100G. The light source is an external light source, which enters the silicon photonics chip through an optical fiber array. Therefore, the silicon photonics chip is designed with 32 ordinary optical fibers and 4 polarization-maintaining optical fibers. The 4 light sources are further divided into 16 channels for the silicon photonics modulator, so the optical fiber array has a total of 36 channels. Because the polarization-maintaining optical fiber is very stiff and has a large bending force, the bonding and fixing points between the optical fiber array and the silicon photonics chip in the current solution are prone to delamination, resulting in a decrease in coupling performance, and even the possibility of the optical fiber array falling off the silicon photonics chip. In addition, this solution chooses to open through slots on the PCB board to lay out the optical fiber array, but this solution cannot be applied to some special requirements, such as the requirement to fill the lower surface of the PCB board with sockets, which makes it impossible to open through slots on the PCB board. Utility Model Content
[0003] The technical problem to be solved by this utility model is to provide a 1.6T NPO silicon photonics engine to overcome the shortcomings of the prior art.
[0004] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: A 1.6T NPO silicon photonics engine includes: a PCB board and a silicon photonics chip upside down on the upper surface of the PCB board. A recessed groove is formed on the upper surface of the PCB board to allow the optical end of the silicon photonics chip to be open. A socket is provided on the lower surface of the PCB board in the area corresponding to the recessed groove. An optical fiber array coupled to the silicon photonics chip is suspended in the recessed groove. The cover plate of the optical fiber array is bonded to both sides of a first fixing block suspended in the recessed groove and located below the open end of the silicon photonics chip with thick adhesive. There is a gap between the first fixing block and the cover plate. The upper surface of the first fixing block is lower than the center of the fiber core in the optical fiber array. A second fixing block is arranged above the silicon photonics chip and the optical fiber array. The second fixing block is bonded and fixed to the substrate in the silicon photonics chip and the optical fiber array, respectively.
[0005] The beneficial effects of this utility model are: by having the second fixing block stick to the substrate in the silicon photonic chip and the fiber array respectively, the bonding force is greatly enhanced, avoiding performance degradation or fiber array detachment due to fiber bending stress. At the same time, the second fixing block can also strengthen the silicon photonic chip and prevent it from breaking at the edge of the PCB board. In this solution, even without opening a through slot on the PCB board, the silicon photonic chip and the fiber array can be reinforced by only opening a recessed slot to avoid the fiber array.
[0006] Based on the above technical solution, the present invention can be further improved as follows.
[0007] Furthermore, the upper surface of the first fixing block is 20 μm lower than the center of the fiber core within the fiber array.
[0008] Furthermore, the lower surface of the first fixing block is at the same height as the lower surface of the cover plate in the fiber array.
[0009] Furthermore, the gap between the first fixing block and the cover plate in the fiber array is less than 10 μm.
[0010] Furthermore, the thick adhesive is a thick UV adhesive.
[0011] Furthermore, the length of the second fixing block covering the silicon photonic chip is 2mm to 3mm, the length of the second fixing block covering the substrate is 2mm to 3mm, the width of the second fixing block is the same as the width of the substrate, and the thickness of the second fixing block is 0.5mm to 1mm.
[0012] Furthermore, the silicon photonics chip is at the same height as the substrate in the fiber optic array.
[0013] The further beneficial effect of adopting the above is that the thickness of the adhesive between the second fixing block and the silicon photonic chip and the thickness of the adhesive between the second fixing block and the substrate in the fiber array are consistent, so as to ensure that the thermal expansion of the adhesive is consistent.
[0014] Furthermore, both the first and second fixing blocks are made of glass.
[0015] Furthermore, the second fixing block is bonded to the silicon photonic chip using rigid adhesive, and the second fixing block is bonded to the substrate in the fiber array using rigid adhesive.
[0016] Furthermore, the electrical chip is upside down attached to the PCB board, and the gap between the silicon photonics chip and the PCB board is filled with black glue. Attached Figure Description
[0017] Figure 1 A front view of a 1.6T NPO silicon photonics engine in the prior art; Figure 2 for Figure 1 A bottom view of the middle section of the structure; Figure 3 This is a front view of the 1.6T NPO silicon photonics engine of this utility model; Figure 4 for Figure 3 Enlarged view of a local structure in the middle; Figure 5 for Figure 3 A bottom view of a partial structure in the middle.
[0018] The attached diagram lists the components represented by each number as follows: 1. PCB board, 110. Recessed tank, 2. Silicon photonics chip, 3. Socket, 4. Fiber optic array, 410. Cover plate, 420. Substrate, 5. First fixing block, 6. Thick glue, 7. Second fixing block, 8. Electrical chip, 9. Black glue. Detailed Implementation
[0019] The principles and features of this utility model are described below with reference to the accompanying drawings. The examples given are only for explaining this utility model and are not intended to limit the scope of this utility model.
[0020] Example 1 like Figure 3 , Figure 4 , Figure 5 As shown, a 1.6T NPO silicon photonics engine includes: The PCB board 1, silicon photonic chip 2, socket 3, fiber array 4, first fixing block 5, and second fixing block 7 are included. The silicon photonic chip 2 is upside down and attached to the upper surface of the PCB board 1, which is consistent with the existing technology. A recessed groove 110 is formed on the upper surface of the PCB board 1 to allow the light end of the silicon photonic chip 2 to be open. Multiple sockets 3 are arranged on the lower surface of the PCB board 1. There are sockets 3 on the lower surface of the PCB board 1 in the areas corresponding to the recessed groove 110. A fiber array 4 coupled to the silicon photonic chip 2 is suspended in the recessed groove 110. The cover plate 410 of the fiber array 4 is bonded to both sides of a first fixing block 5, which is suspended in the recessed groove 110 and located below the open end of the silicon photonic chip 2, using thick adhesive 6. That is to say, a first fixing block 5 is suspended in the recessed groove 110 below the open end of the silicon photonic chip 2. The first fixing block 5 is bonded to the cover plate 410 on both sides with thick adhesive 6. The thickness of the first fixing block 5 is smaller than the distance between the silicon photonic chip 2 and the bottom of the sink 110. After the first fixing block 5 is bonded to the cover plate 410, its overall length is smaller than the distance between the silicon photonic chip 2 and the sink 110 and its opposite wall. There is a gap between the first fixing block 5 and the cover plate 410 in the fiber array 4, which is reserved to allow the adhesive to penetrate, so that the adhesive can fix the first fixing block 5 and the cover plate 410 at the same time and form a T-shaped bond. The upper surface of the first fixing block 5 is lower than the center of the fiber core in the fiber array 4. A second fixing block 7 is arranged above the silicon photonic chip 2 and the fiber array 4. One end of the second fixing block 7 is bonded to the silicon photonic chip 2, and the other end of the second fixing block 7 is bonded to the substrate 420 in the fiber array 4.
[0021] Because the PCB board 1 has a recessed groove 110, the first fixing block 5 cannot be attached to the fiber array 4 and the silicon photonic chip 2 via a through groove as in existing technologies. Therefore, during the production of this 1.6T NPO silicon photonic engine, thick adhesive 6 is first used to bond the two sides of the first fixing block 5 to the cover plate 410 in the fiber array 4. Then, the entire structure (fiber array 4 + first fixing block 5) is coupled to the silicon photonic chip 2. Next, thin adhesive is applied to the gap between the substrate 420 and the silicon photonic chip 2, relying on capillary force to automatically fill all the gaps and bond all the materials together. Finally, adhesive is applied to the lower surface of the second fixing block 7 to bond one end of the second fixing block 7 to the silicon photonic chip 2 and to allow the second fixing block 7 to... The other end is bonded and fixed to the substrate 420 in the fiber array 4. By having the second fixing block 7 bond to the silicon photonic chip 2 and the substrate 420 in the fiber array 4 respectively, the bonding force is greatly enhanced, avoiding performance degradation or fiber array 4 falling off due to fiber bending stress. At the same time, the second fixing block 7 can also strengthen the silicon photonic chip 2 and prevent the silicon photonic chip 2 from breaking at the edge of the PCB board 1. In this solution, even if a through slot is not opened on the PCB board 1, the silicon photonic chip 2 and the fiber array 4 can be reinforced by only opening a recessed slot to avoid the fiber array 4.
[0022] Example 2 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1, as detailed below: The upper surface of the first fixing block 5 is 20 μm lower than the center of the fiber core in the fiber array 4, and the lower surface of the first fixing block 5 is at the same height as the lower surface of the cover plate 410 in the fiber array 4.
[0023] Furthermore, the gap between the first fixing block 5 and the cover plate 410 in the fiber array 4 is less than 10 μm, and the thick adhesive 6 is preferably a thick UV adhesive with a viscosity of 50,000 cp to 100,000 cp.
[0024] Example 3 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1 or 2, as detailed below: The length of the second fixing block 7 covering the silicon photonic chip 2 is 2mm to 3mm, the length of the second fixing block 7 covering the substrate 420 is 2mm to 3mm, the width of the second fixing block 7 is the same as the width of the substrate 420, and the thickness of the second fixing block 7 is 0.5mm to 1mm.
[0025] The silicon photonic chip 2 and the substrate 420 in the fiber array 4 are at the same height, so that the thickness of the adhesive between the second fixing block 7 and the silicon photonic chip 2 and the thickness of the adhesive between the second fixing block 7 and the substrate 420 in the fiber array 4 are the same, so as to ensure that the thermal expansion of the adhesive is consistent.
[0026] Example 4 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1, 2, or 3, as detailed below: The first fixing block 5 is preferably a glass block, and the second fixing block 7 is preferably a glass block.
[0027] Furthermore, the second fixing block 7 is bonded to the silicon photonic chip 2 with hard adhesive, and the second fixing block 7 is bonded to the substrate 420 in the fiber array 4 with hard adhesive.
[0028] Example 5 like Figure 3 As shown, this embodiment is a further improvement on any one of embodiments 1 to 4, as detailed below: The electrical chip 8 is mounted upside down on the PCB board 1, and the gap between the silicon photonic chip 2 and the PCB board 1 is filled with black glue 9. The electrical chip 8 and the PCB board 1 are filled with black glue 9, which means that this content is still consistent with the existing technology.
[0029] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A 1.6T NPO silicon photonic engine, characterized in that, include: A PCB board (1) and a silicon photonic chip (2) mounted upside down on the upper surface of the PCB board (1). A recess (110) is formed on the upper surface of the PCB board (1) to allow the light end of the silicon photonic chip (2) to be open. A socket (3) is provided on the lower surface of the PCB board (1) in the area corresponding to the recess (110). An optical fiber array (4) coupled to the silicon photonic chip (2) is suspended in the recess (110). A cover plate (410) in the optical fiber array (4) is connected to an optical fiber array (4) suspended in the recess (110). The first fixing block (5) located inside the silicon photonic chip (2) and below the open end is bonded to both sides with thick glue (6). There is a gap between the first fixing block (5) and the cover plate (410). The upper surface of the first fixing block (5) is lower than the center of the fiber core in the fiber array (4). A second fixing block (7) is arranged above the silicon photonic chip (2) and the fiber array (4). The second fixing block (7) is bonded and fixed to the substrate (420) in the silicon photonic chip (2) and the fiber array (4), respectively.
2. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The upper surface of the first fixing block (5) is 20 μm lower than the center of the fiber core in the fiber array (4).
3. A 1.6T NPO silicon photonic engine according to claim 2, characterized in that, The lower surface of the first fixing block (5) is at the same height as the lower surface of the cover plate (410) in the fiber array (4).
4. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The gap between the first fixing block (5) and the cover plate (410) in the fiber array (4) is less than 10 μm.
5. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The thick adhesive (6) is a thick UV adhesive.
6. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The second fixing block (7) covers a length of 2mm to 3mm on the silicon photonic chip (2), the second fixing block (7) covers a length of 2mm to 3mm on the substrate (420), the width of the second fixing block (7) is the same as the width of the substrate (420), and the thickness of the second fixing block (7) is 0.5mm to 1mm.
7. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The silicon photonic chip (2) is at the same height as the substrate (420) in the fiber array (4).
8. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The first fixing block (5) is made of glass, and the second fixing block (7) is made of glass.
9. A 1.6T NPO silicon photonic engine according to any one of claims 1 to 8, characterized in that, The second fixing block (7) is bonded to the silicon photonic chip (2) with hard adhesive, and the second fixing block (7) is bonded to the substrate (420) in the fiber array (4) with hard adhesive.
10. A 1.6T NPO silicon photonic engine according to claim 1, characterized in that, The electrical chip (8) is attached upside down on the PCB board (1), and the gap between the silicon photonic chip (2) and the PCB board (1) is filled with black glue (9).