Electronic paper display panel and display device
Patent Information
- Application Number
- CN202522128818.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-30
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2035-09-30
AI Technical Summary
[0003]而现有的电子纸显示面板中,在阵列基板粘接电子纸膜片,使得信号传输结构和公共电极连接之后,需要通过点亮测试才能判断出信号传输结构是否正常,测试难度较大
[0025]相对于现有的电子纸显示面板的方案来说,本申请的电子纸显示面板的方案通过设置第一共电极走线和第二共电极走线,所述信号传输结构分别连接所述第一共电极走线和所述公共电极,所述第一共电极走线远离所述信号传输结构的一端与所述第二共电极走线远离所述共电极的一端均用于接收公共电极信号;由于电子纸膜片上的公共电极是通过信号传输结构和阵列基板上的第一共电极走线连接的,在需要测试两个信号传输结构的两端是否均分别与所述第一公共电极走线和公共电极连通,便可以通过在两个信号传输结构连接的第一公共电极走线上连接检测装置,检测出电阻是否在预设范围内,当检测出电阻不在预设范围内的电阻值的时候便可以判定信号传输结构中存在异常,而且不影响给阵列基板上的共电极输入公共电极信号,从而降低检测难度,提高检测效率。
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Figure CN224873818U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and more particularly to an electronic paper display panel and display device. Background Technology
[0002] Electronic paper technology is widely used in e-book readers, electronic tags, smart wearables and other fields. In recent years, with the continuous evolution of electronic paper technology, its application scenarios have continued to expand.
[0003] In existing electronic paper display panels, after the electronic paper film is bonded to the array substrate to connect the signal transmission structure and the common electrode, a lighting test is required to determine whether the signal transmission structure is normal, which is quite difficult. Utility Model Content
[0004] The purpose of this application is to provide an electronic paper display panel and display device, thereby reducing the difficulty of detection and improving the efficiency of detection.
[0005] This application discloses an electronic paper display panel, which includes an array substrate, an electronic paper film, and a common electrode, wherein the electronic paper film and the common electrode are sequentially disposed on the array substrate;
[0006] The array substrate includes a substrate, and an active switch, a pixel electrode, a common electrode, a first common electrode trace, a second common electrode trace, and at least two signal transmission structures disposed on the substrate;
[0007] The pixel electrode is connected to the drain of the active switch, the first common electrode trace is connected to the signal transmission structure, the common electrode is connected to the first common electrode trace and / or the second common electrode trace, and a storage capacitor is formed between the common electrode and the pixel electrode.
[0008] The signal transmission structure is connected to the first common electrode trace and the common electrode respectively. The end of the first common electrode trace away from the signal transmission structure and the end of the second common electrode trace away from the common electrode are both used to receive the common electrode signal.
[0009] Optionally, the array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel further includes a driver chip, which is bonded to the non-display area, and both the first common electrode trace and the second common electrode trace are connected to the driver chip;
[0010] The signal transmission structure and the driver chip are located on opposite sides of the display area.
[0011] Optionally, the array substrate further includes a third common electrode line, which is connected to the second common electrode line, and both ends of the common electrode line are connected to the second common electrode line and the third common electrode line, respectively.
[0012] Optionally, the array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel further includes a driver chip, which is bonded to the non-display area, and both the first common electrode trace and the second common electrode trace are connected to the driver chip;
[0013] The common electrode is connected to the second common electrode via a trace, and the side of the signal transmission structure furthest from the driver chip is only connected to the common electrode.
[0014] Optionally, the array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel further includes a driver chip, which is bonded to the non-display area, and both the first common electrode trace and the second common electrode trace are connected to the driver chip;
[0015] The two signal transmission structures are defined as a first signal transmission structure and a second signal transmission structure. The first common electrode trace includes a first sub-common electrode trace, a second sub-common electrode trace, and a third sub-common electrode trace connected in sequence. The first sub-common electrode trace is connected to the first signal transmission structure, and the second sub-common electrode trace is connected to the second signal transmission structure.
[0016] The side of the first sub-common electrode trace away from the driver chip and the side of the second sub-common electrode trace away from the driver chip are connected. The first sub-common electrode trace, the second sub-common electrode trace, and the third sub-common electrode trace surround the display area. Both ends of the common electrode are connected to the third sub-common electrode trace.
[0017] Optionally, the array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel further includes a driver chip, which is bonded to the non-display area, and both the first common electrode trace and the second common electrode trace are connected to the driver chip;
[0018] The two signal transmission structures are defined as the first signal transmission structure and the second signal transmission structure, respectively.
[0019] The first common electrode trace includes a first sub-common electrode trace, a second sub-common electrode trace, and a third sub-common electrode trace. The first sub-common electrode trace is connected to the first signal transmission structure, the second sub-common electrode trace is connected to the second signal transmission structure, and the second common electrode trace is connected to the third sub-common electrode trace. Both ends of the common electrode trace are connected to the third sub-common electrode trace. One end of the third sub-common electrode trace forms a breakpoint with the first sub-common electrode trace, and the other end of the third sub-common electrode trace also forms a breakpoint with the second sub-common electrode trace.
[0020] Optionally, the electronic paper film includes a main body, a first ear, and a second ear. The first ear and the second ear are both located on the same side of the main body. The sum of the width of the first ear and the width of the second ear is less than 1 / 2 of the width of the main body. The first ear is located at the edge of the main body. The distance between the second ear and the first ear is greater than the width of the second ear.
[0021] Optionally, the number of signal transmission structures includes four, which are respectively defined as a first signal transmission structure, a second signal transmission structure, a third signal transmission structure, and a fourth signal transmission structure; the first common electrode trace includes a first sub-common electrode trace and a second sub-common electrode trace, the first sub-common electrode trace is connected to the first signal transmission structure and the second signal transmission structure, and the second sub-common electrode trace is connected to the third signal transmission structure and the fourth signal transmission structure;
[0022] The first signal transmission structure, the second signal transmission structure, the third signal transmission structure and the fourth signal transmission structure are arranged sequentially. The first signal transmission structure and the third signal transmission structure correspond to the first ear and the second ear, or the second signal transmission structure and the fourth signal transmission structure correspond to the first ear and the second ear.
[0023] Optionally, the width of both the first ear and the second ear is greater than the width of the first signal transmission structure, the second signal transmission structure, the third signal transmission structure, and the fourth signal transmission structure. The first ear and the second ear cover the first signal transmission structure and the third signal transmission structure, or the first ear and the second ear cover the second signal transmission structure and the fourth signal transmission structure.
[0024] This application also discloses a display device, which includes a driving circuit and an electronic paper display panel, wherein the driving circuit is connected to the electronic paper display panel.
[0025] Compared to existing electronic paper display panel solutions, the electronic paper display panel solution of this application sets up a first common electrode trace and a second common electrode trace. The signal transmission structure is respectively connected to the first common electrode trace and the common electrode. The end of the first common electrode trace away from the signal transmission structure and the end of the second common electrode trace away from the common electrode are both used to receive the common electrode signal. Since the common electrode on the electronic paper film is connected to the first common electrode trace on the array substrate through the signal transmission structure, when it is necessary to test whether both ends of the two signal transmission structures are connected to the first common electrode trace and the common electrode respectively, a detection device can be connected to the first common electrode trace connecting the two signal transmission structures to detect whether the resistance is within a preset range. When a resistance value outside the preset range is detected, it can be determined that there is an abnormality in the signal transmission structure, and this does not affect the input of the common electrode signal to the common electrode on the array substrate, thereby reducing the detection difficulty and improving the detection efficiency. Attached Figure Description
[0026] The accompanying drawings, which form part of the specification, are used to provide a further understanding of the embodiments of this application and illustrate the implementation methods of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any creative effort. In the drawings:
[0027] Figure 1 This is a schematic diagram of a display device according to an embodiment of this application;
[0028] Figure 2 This is a schematic diagram of an electronic paper display panel according to the first embodiment of this application;
[0029] Figure 3 This is a schematic diagram of an array substrate according to the first embodiment of this application;
[0030] Figure 4 This is a schematic diagram of the signal transmission structure of an array substrate according to the first embodiment of this application;
[0031] Figure 5 This is a schematic diagram of an uncut electronic paper film according to the first embodiment of this application;
[0032] Figure 6 This is a schematic diagram of an electronic paper film after cutting, according to the first embodiment of this application;
[0033] Figure 7 This is a schematic diagram of an electronic paper film being bonded to an array substrate according to the first embodiment of this application;
[0034] Figure 8 This is a schematic diagram of an array substrate according to a second embodiment of this application;
[0035] Figure 9 This is a schematic diagram of an array substrate according to a third embodiment of this application.
[0036] Wherein, 10 is a display device; 20 is a driving circuit; 30 is an electronic paper display panel; 100 is an array substrate; 110 is a display area; 120 is a non-display area; 210 is a substrate; 220 is a data line; 230 is a scan line; 240 is an active switch; 250 is a pixel electrode; 260 is a common electrode; 310 is a first common electrode trace; 311 is a first sub-common electrode trace; 312 is a second sub-common electrode trace; 313 is a third sub-common electrode trace; 320 is a second common electrode trace; 330 is a third common electrode trace; 340 is a third common electrode trace; 350 is a second common electrode trace; 360 is a third common electrode trace; 370 is a third common electrode trace; 380 is a third common electrode trace; 390 is a third common electrode trace; 30 is a third common electrode trace; 310 is a third common electrode trace; 311 is a third common electrode trace; 312 is a third common electrode trace; 313 is a third common electrode trace; 314 is a third common electrode trace; 315 is a third common electrode trace; 316 is a third common electrode trace; 317 is a third common electrode trace; 318 is a third common electrode trace; 319 is a third common electrode trace; 320 is a third common electrode trace; 310 is a third common electrode trace; 319 is a third common electrode trace; 310 is a third common electrode trace; 310 is a third common electrode trace; 311 is a third common electrode trace; 312 is a third common electrode trace; 313 is a third common electrode trace; 314 is a third common electrode trace; 315 is a third common electrode trace; 316 is a third common electrode trace; 317 is a third common electrode trace; 318 is a Three common electrode lines; 400, signal transmission structure; 410, first signal transmission structure; 420, second signal transmission structure; 430, third signal transmission structure; 440, fourth signal transmission structure; 500, electronic paper film; 510, main body; 521, first ear; 522, second ear; 600, common electrode; 700, driver chip; 800, breakpoint; 910, first cutting position; 920, second cutting position; 930, third cutting position; 940, fourth cutting position. Detailed Implementation
[0037] It should be understood that the terminology, specific structural and functional details used herein are merely for describing particular embodiments and are representative. However, this application may be implemented in many alternative forms and should not be construed as being limited to the embodiments set forth herein.
[0038] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating relative importance or implying the number of technical features indicated. Therefore, unless otherwise stated, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "multiple" means two or more. The term "comprising" and any variations thereof mean non-exclusive inclusion, where one or more other features, integers, steps, operations, units, components, and / or combinations thereof may be present or added.
[0039] In addition, terms such as “center,” “horizontal,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer” that indicate orientation or positional relationship are based on the orientation or relative positional relationship shown in the accompanying drawings. They are only for the purpose of simplifying the description of this application and do not indicate that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0040] Furthermore, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium, or internal connections between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0041] The present application will now be described in detail with reference to the accompanying drawings and optional embodiments.
[0042] Figure 1 This is a schematic diagram of a display device according to an embodiment of this application, as shown below. Figure 1 As shown, this application discloses a display device 10, which includes a driving circuit 20 and an electronic paper display panel 30, wherein the driving circuit 20 is connected to the electronic paper display panel 30.
[0043] The driving circuit 20 is used to transmit driving data, such as common electrode signal, scan signal and data line 220 signal, to the driving chip 700 in the electronic paper display panel 30.
[0044] This application also discloses an electronic paper display panel 30, which can be used in the display device 10 described above. Regarding the electronic paper display panel 30, this application provides the following design, which is specifically described through several embodiments:
[0045] Example 1:
[0046] Figure 2 This is a schematic diagram of an electronic paper display panel according to the first embodiment of this application. Figure 3 This is a schematic diagram of an array substrate according to the first embodiment of this application, as shown below. Figures 2-3 As shown, this application discloses an electronic paper display panel 30, which includes an array substrate 100, an electronic paper film 500, and a common electrode 600. The electronic paper film 500 and the common electrode 600 are sequentially disposed on the array substrate 100.
[0047] The array substrate 100 includes a substrate 210, and an active switch 240, a pixel electrode 250, a common electrode 260, a first common electrode trace 310, a second common electrode trace 320, and at least two signal transmission structures 400 disposed on the substrate 210.
[0048] The pixel electrode 250 is connected to the drain of the active switch 240, the first common electrode trace 310 is connected to the signal transmission structure 400, the common electrode 260 is connected to the first common electrode trace 310 and / or the second common electrode trace 320, and a storage capacitor is formed between the common electrode 260 and the pixel electrode 250.
[0049] The signal transmission structure 400 is connected to the first common electrode trace 310 and the common electrode 600 respectively. The end of the first common electrode trace 310 away from the signal transmission structure 400 and the end of the second common electrode trace 320 away from the common electrode 260 are both used to receive the common electrode signal.
[0050] The array substrate 100 further includes a data line 220 and a scan line 230. The data line 220 is connected to the source of the active switch 240, and the scan line 230 is connected to the gate of the active switch 240. The data line 220 and the scan line 230 are arranged in a crisscross pattern to define multiple pixel unit regions. The pixel electrode 250 and the common electrode 260 are located within the pixel unit regions.
[0051] In existing electronic paper display panels, a common electrode trace is set on the array substrate, and then the common electrode 260 is connected to the common electrode trace. Then, a signal transmission structure 400 is directly set on the common electrode trace to connect the common electrode trace and the common electrode 600, so that the signal entering from the common electrode trace can be transmitted to the common electrode 600. However, this makes it impossible to directly test whether the common electrode 600 and the common electrode trace are connected after the electronic paper film 500 and the common electrode 600 are attached to the array substrate 100. A power-on test is required to determine the conductivity of the signal transmission structure 400.
[0052] Compared to existing electronic paper display panel solutions, the electronic paper display panel 30 of this application provides a first common electrode trace 310 and a second common electrode trace 320. The signal transmission structure 400 connects the first common electrode trace 310 and the common electrode 600 respectively. The end of the first common electrode trace 310 away from the signal transmission structure 400 and the end of the second common electrode trace 320 away from the common electrode 260 are both used to receive the common electrode signal.
[0053] Since the common electrode 600 on the electronic paper film 500 is connected to the first common electrode trace 310 on the array substrate 100 through the signal transmission structure 400, when it is necessary to test whether both ends of the two signal transmission structures 400 are connected to the first common electrode trace 310 and the common electrode 600 respectively, a detection device can be connected to the first common electrode trace 310 connecting the two signal transmission structures 400 to detect whether the resistance is within a preset range. When a resistance value that is not within the preset range is detected, it can be determined that there is an abnormality in the signal transmission structure 400, and this does not affect the input of the common electrode signal to the common electrode 260 on the array substrate 100, thereby reducing the detection difficulty and improving the detection efficiency.
[0054] In this embodiment, the array substrate 100 includes a display area 110 and a non-display area 120, with the non-display area 120 surrounding the display area 110. The electronic paper display panel 30 also includes a driver chip 700, which is bonded to the non-display area 120. The first common electrode trace 310 and the second common electrode trace 320 are both connected to the driver chip 700. The driver chip 700 can be connected to an external Tcon circuit board via a flip-chip film. The driver chip 700 can be directly disposed on the array substrate 100 or disposed on the flip-chip film.
[0055] The two signal transmission structures 400 are defined as a first signal transmission structure 410 and a second signal transmission structure 420. The first common electrode trace 310 includes a first sub-common electrode trace 311, a second sub-common electrode trace 312 and a third sub-common electrode trace 313 connected in sequence. The first sub-common electrode trace 311 is connected to the first signal transmission structure 410, and the second sub-common electrode trace 312 is connected to the second signal transmission structure 420.
[0056] The first sub-common electrode trace 311 is connected to the side of the driver chip 700 away from the second sub-common electrode trace 312 away from the driver chip 700. The first sub-common electrode trace 311, the second sub-common electrode trace 312 and the third sub-common electrode trace 313 surround the display area 110. Both ends of the common electrode 260 are connected to the third sub-common electrode trace 313.
[0057] In this way, when testing is required, the first signal transmission structure 410 is disconnected from the third sub-common electrode trace 313 by laser cutting, and the second signal transmission structure 420 is disconnected from the third sub-common electrode trace 313 by laser cutting. This allows a detection device, such as a multimeter, to be directly connected to the first sub-common electrode trace 311 and the second sub-common electrode trace 312 to detect whether the resistance is within a preset range, thereby determining whether the first signal transmission structure 410 and the second signal transmission structure 420 are abnormal.
[0058] For example, cutting can be performed at the first cutting position 910 and the second cutting position 920, so that the first signal transmission structure 410 is disconnected from the third sub-common electrode trace 313 and the second signal transmission structure 420 is disconnected from the third sub-common electrode trace 313.
[0059] The array substrate 100 further includes a third common electrode line 330, which is connected to the second common electrode line 260. The two ends of the common electrode line 260 are respectively connected to the second common electrode line 320 and the third common electrode line 330.
[0060] The third common electrode line 330 and the second common electrode line 260 may be partially collinear with the third sub-common electrode line 260, or they may not be collinear. This application uses the example of the third common electrode line 330, the second common electrode line 260, and the third sub-common electrode line 260 being partially collinear for explanation. In other words, on the side of the display area 110 away from the driver chip 700, the third common electrode line 330, the second common electrode line 260, and the third sub-common electrode line 260 are partially collinear.
[0061] Furthermore, in this application, the first sub-common electrode trace 311 and the second common electrode trace 320 can be connected to the same common electrode signal contact point, or they can be connected to two different common electrode signal input points; the second sub-common electrode trace 260 and the third common electrode trace 330 can be connected to the same common electrode signal input point, or they can be connected to two different common electrode signal contact points. The common electrode signal contact point refers to the connection pin on the driver chip 700 used for transmitting common electrode signals.
[0062] For example, when the first sub-common electrode trace 311 and the second common electrode trace 320 are connected to the same common electrode signal contact point, and the second sub-common electrode 260 and the third common electrode trace 330 are connected to the same common electrode signal input point, and the third common electrode line 330 is partially collinear with the second common electrode line 260 and the third sub-common electrode line 260, during testing, it is only necessary to laser-cut and disconnect one of the second common electrode line 260 and the third common electrode line 330. For example, the cutting can be performed at the third cutting position 930.
[0063] Figure 4 This is a schematic diagram of the signal transmission structure of an array substrate according to the first embodiment of this application, combined with... Figure 4 As shown, in order to facilitate the connection between the electronic paper film 500 and the signal transmission structure 400, this application may also place the signal transmission structure 400 and the driving chip 700 on the upper and lower sides of the display area 110, respectively.
[0064] The array substrate 100 includes a display area 110 and a non-display area 120, with the non-display area 120 surrounding the display area 110. The electronic paper display panel 30 also includes a driver chip 700, which is bonded to the non-display area 120. The first common electrode trace 310 and the second common electrode trace 320 are both connected to the driver chip 700. The signal transmission structure 400 and the driver chip 700 are located on opposite sides of the display area 110. This avoids the formation of capacitance between the signal transmission structure 400 and the fan-out lines between the display area 110 and the driver chip 700, thus preventing any impact on the display effect of the electronic paper display panel 30.
[0065] For example, when the signal transmission structure 400 and the driver chip 700 are located on the upper and lower sides of the display area 110 respectively, cutting is required at the fourth cutting position 940 and the third cutting position 930 when testing is needed.
[0066] Figure 5 This is a schematic diagram of an uncut electronic paper film according to the first embodiment of this application. Figure 6 This is a schematic diagram of an electronic paper film after cutting, according to the first embodiment of this application. Figure 5 and Figure 6As shown, the electronic paper film 500 includes a main body 510, a first ear portion 521, and a second ear portion 522. The first ear portion 521 and the second ear portion 522 are both located on the same side of the main body 510. The sum of the width of the first ear portion 521 and the width of the second ear portion 522 is less than 1 / 2 the width of the main body 510. The first ear portion 521 is located at the edge of the main body 510. The distance between the second ear portion 522 and the first ear portion 521 is greater than the width of the second ear portion 522.
[0067] By setting a first ear portion 521 and a second ear portion 522 on the electronic paper film 500, with the first ear portion 521 located at the edge of the main body portion 510 and the distance between the second ear portion 522 and the first ear portion 521 being greater than the width of the second ear portion 522, a reasonable arrangement can be made so that the second ear portion 522 on one electronic paper film 500 is located between the first ear portion 521 and the second ear portion 522 on another electronic paper film 500, thereby increasing the effective usable area and reducing costs.
[0068] The widths of the first ear portion 521 and the second ear portion 522 are equal, and the shapes of the electronic paper film 500 cut from a master plate are also the same, making it easier to cut and making it easier to position the signal transmission structure 400 on the array substrate 100.
[0069] Figure 7 This is a schematic diagram of the bonding of an electronic paper film to an array substrate according to the first embodiment of this application, combined with... Figure 7 As shown, the number of signal transmission structures 400 includes four, which are respectively defined as a first signal transmission structure 410, a second signal transmission structure 420, a third signal transmission structure 430, and a fourth signal transmission structure 440; the first common electrode trace 310 includes a first sub-common electrode trace 311 and a second sub-common electrode trace 312. The first sub-common electrode trace 311 is connected to the first signal transmission structure 410 and the second signal transmission structure 420, and the second sub-common electrode trace 312 is connected to the third signal transmission structure 430 and the fourth signal transmission structure 440.
[0070] The first signal transmission structure 410, the second signal transmission structure 420, the third signal transmission structure 430 and the fourth signal transmission structure 440 are arranged sequentially. The first signal transmission structure 410 and the third signal transmission structure 430 correspond to the first ear 521 and the second ear 522, or the second signal transmission structure 420 and the fourth signal transmission structure 440 correspond to the first ear 521 and the second ear 522.
[0071] When the first signal transmission structure 410 and the third signal transmission structure 430 correspond to the first ear portion 521 and the second ear portion 522, the common electrode 600 on the first ear portion 521 and the common electrode 600 on the second ear portion 522 are connected to the first signal transmission structure 410 and the third signal transmission structure 430.
[0072] When the second signal transmission structure 420 and the fourth signal transmission structure 440 correspond to the first ear portion 521 and the second ear portion 522, the common electrode 600 on the first ear portion 521 and the common electrode 600 on the second ear portion 522 are connected to the second signal transmission structure 420 and the fourth signal transmission structure 440.
[0073] In this way, regardless of whether the first ear portion 521 of the cut electronic paper film 500 is on the left or right, it can be attached to the array substrate 100, thus eliminating the need for an additional array substrate 100 and improving the applicability of the array substrate 100.
[0074] Because ink may overflow from the edges after the electronic paper film 500 is cut, the widths of the first ear portion 521 and the second ear portion 522 are both greater than the widths of the first signal transmission structure 410, the second signal transmission structure 420, the third signal transmission structure 430, and the fourth signal transmission structure 440. The first ear portion 521 and the second ear portion 522 cover the first signal transmission structure 410 and the third signal transmission structure 430, or the first ear portion 521 and the second ear portion 522 cover the second signal transmission structure 420 and the fourth signal transmission structure 440.
[0075] The common electrode 600 on the first ear portion 521 and the common electrode 600 on the second ear portion 522 are connected to the first signal transmission structure 410 and the third signal transmission structure 430; the first ear portion 521 covers the first signal transmission structure 410, and the second ear portion 522 covers the third signal transmission structure 430; the common electrode 600 on the first ear portion 521 and the common electrode 600 on the second ear portion 522 are connected to the second signal transmission structure 420 and the fourth signal transmission structure 440; the first ear portion 521 covers the fourth signal transmission structure 440, and the second ear portion 522 covers the second signal transmission structure 420, to prevent spilled ink from contacting the signal transmission structure 400.
[0076] Example 2:
[0077] Figure 8 This is a schematic diagram of an array substrate according to a second embodiment of this application, as shown below. Figure 8As shown, unlike the first embodiment, the first common electrode trace 310 in this embodiment does not include the third sub-common electrode trace 313. The array substrate 100 includes a display area 110 and a non-display area 120, with the non-display area 120 surrounding the display area 110. The electronic paper display panel 30 also includes a driver chip 700, which is bonded to the non-display area 120. Both the first common electrode trace 310 and the second common electrode trace 320 are connected to the driver chip 700.
[0078] The common electrode 260 is connected to the second common electrode trace 320, and the side of the signal transmission structure 400 away from the driver chip 700 is only connected to the common electrode 600.
[0079] Compared to the solution in the first embodiment, this embodiment does not require laser cutting of the connection between the first sub-common electrode trace 311 and the third sub-common electrode trace 313, nor does it require laser cutting of the connection between the second sub-common electrode trace 312 and the third sub-common electrode trace 313. In other words, when testing is required, a testing device can be used to perform the test directly.
[0080] Example 3:
[0081] Figure 9 This is a schematic diagram of an array substrate according to a third embodiment of this application, as shown below. Figure 9 As shown, unlike the first embodiment, in the third embodiment, the connection between the first sub-common electrode trace 311 and the third sub-common electrode trace 313 is already cut during fabrication, and the connection between the second sub-common electrode trace 312 and the third sub-common electrode trace 313 is already cut during fabrication. That is, the array substrate 100 includes a display area 110 and a non-display area 120, and the non-display area 120 is disposed around the display area 110; the electronic paper display panel 30 also includes a driver chip 700, which is bound to the non-display area 120, and both the first common electrode trace 310 and the second common electrode trace 320 are connected to the driver chip 700.
[0082] The two signal transmission structures 400 are defined as the first signal transmission structure 410 and the second signal transmission structure 420.
[0083] The first common electrode trace 310 includes a first sub-common electrode trace 311, a second sub-common electrode trace 312, and a third sub-common electrode trace 313. The first sub-common electrode trace 311 is connected to the first signal transmission structure 410, the second sub-common electrode trace 312 is connected to the second signal transmission structure 420, and the second common electrode trace 320 is connected to the third sub-common electrode trace 313. Both ends of the common electrode 260 line are connected to the third sub-common electrode trace 313. A breakpoint 800 is formed between one end of the third sub-common electrode trace 313 and the first sub-common electrode 260 line, and a breakpoint 800 is also formed between the other end of the third sub-common electrode trace 313 and the second sub-common electrode 260 line.
[0084] Compared to the solution in the first embodiment, this embodiment cuts off the connection between the first sub-common electrode trace 311 and the third sub-common electrode trace 313, and cuts off the connection between the second sub-common electrode trace 312 and the third sub-common electrode trace 313 after depositing and forming the first sub-common electrode trace 311, the second sub-common electrode trace 312 and the third sub-common electrode trace 313. This also allows for direct testing using a detection device when testing is required.
[0085] It should be noted that the limitations on each step involved in this solution are not considered as limiting the order of steps, provided that they do not affect the implementation of the specific solution. The steps listed first can be executed first, later, or even simultaneously. As long as this solution can be implemented, it should be considered to fall within the scope of protection of this application.
[0086] It should be noted that the inventive concept of this application can form many embodiments, but due to the limited space of the application documents, they cannot all be listed. Therefore, without conflict, the embodiments described above or the technical features can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effect will be enhanced.
[0087] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.
Claims
1. An electronic paper display panel, characterized in that, The electronic paper display panel includes an array substrate, an electronic paper film, and a common electrode, wherein the electronic paper film and the common electrode are sequentially disposed on the array substrate; The array substrate includes a substrate, and an active switch, a pixel electrode, a common electrode, a first common electrode trace, a second common electrode trace, and at least two signal transmission structures disposed on the substrate; The pixel electrode is connected to the drain of the active switch, the first common electrode trace is connected to the signal transmission structure, the common electrode is connected to the first common electrode trace and / or the second common electrode trace, and a storage capacitor is formed between the common electrode and the pixel electrode. The signal transmission structure is connected to the first common electrode trace and the common electrode respectively. The end of the first common electrode trace away from the signal transmission structure and the end of the second common electrode trace away from the common electrode are both used to receive the common electrode signal.
2. The electronic paper display panel according to claim 1, characterized in that, The array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel also includes a driver chip, which is bonded to the non-display area, and the first common electrode trace and the second common electrode trace are both connected to the driver chip. The signal transmission structure and the driver chip are located on opposite sides of the display area.
3. The electronic paper display panel according to claim 1, characterized in that, The array substrate further includes a third common electrode line, which is connected to the second common electrode line, and both ends of the common electrode line are connected to the second common electrode line and the third common electrode line, respectively.
4. The electronic paper display panel according to claim 1, characterized in that, The array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel also includes a driver chip, which is bonded to the non-display area, and the first common electrode trace and the second common electrode trace are both connected to the driver chip. The common electrode is connected to the second common electrode via a trace, and the side of the signal transmission structure furthest from the driver chip is only connected to the common electrode.
5. The electronic paper display panel according to claim 1, characterized in that, The array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel also includes a driver chip, which is bonded to the non-display area, and the first common electrode trace and the second common electrode trace are both connected to the driver chip. The two signal transmission structures are defined as a first signal transmission structure and a second signal transmission structure. The first common electrode trace includes a first sub-common electrode trace, a second sub-common electrode trace, and a third sub-common electrode trace connected in sequence. The first sub-common electrode trace is connected to the first signal transmission structure, and the second sub-common electrode trace is connected to the second signal transmission structure. The side of the first sub-common electrode trace away from the driver chip and the side of the second sub-common electrode trace away from the driver chip are connected. The first sub-common electrode trace, the second sub-common electrode trace, and the third sub-common electrode trace surround the display area. Both ends of the common electrode are connected to the third sub-common electrode trace.
6. The electronic paper display panel according to claim 1, characterized in that, The array substrate includes a display area and a non-display area, with the non-display area surrounding the display area; the electronic paper display panel also includes a driver chip, which is bonded to the non-display area, and the first common electrode trace and the second common electrode trace are both connected to the driver chip. The two signal transmission structures are defined as the first signal transmission structure and the second signal transmission structure, respectively. The first common electrode trace includes a first sub-common electrode trace, a second sub-common electrode trace, and a third sub-common electrode trace. The first sub-common electrode trace is connected to the first signal transmission structure, the second sub-common electrode trace is connected to the second signal transmission structure, and the second common electrode trace is connected to the third sub-common electrode trace. Both ends of the common electrode trace are connected to the third sub-common electrode trace. One end of the third sub-common electrode trace forms a breakpoint with the first sub-common electrode trace, and the other end of the third sub-common electrode trace also forms a breakpoint with the second sub-common electrode trace.
7. The electronic paper display panel according to claim 1, characterized in that, The electronic paper film includes a main body, a first ear, and a second ear. The first ear and the second ear are both located on the same side of the main body. The sum of the width of the first ear and the width of the second ear is less than 1 / 2 of the width of the main body. The first ear is located at the edge of the main body. The distance between the second ear and the first ear is greater than the width of the second ear.
8. The electronic paper display panel according to claim 7, characterized in that, The number of signal transmission structures includes four, which are respectively defined as a first signal transmission structure, a second signal transmission structure, a third signal transmission structure, and a fourth signal transmission structure; the first common electrode trace includes a first sub-common electrode trace and a second sub-common electrode trace, the first sub-common electrode trace is connected to the first signal transmission structure and the second signal transmission structure, and the second sub-common electrode trace is connected to the third signal transmission structure and the fourth signal transmission structure; The first signal transmission structure, the second signal transmission structure, the third signal transmission structure and the fourth signal transmission structure are arranged sequentially. The first signal transmission structure and the third signal transmission structure correspond to the first ear and the second ear, or the second signal transmission structure and the fourth signal transmission structure correspond to the first ear and the second ear.
9. The electronic paper display panel according to claim 8, characterized in that, The width of the first ear and the second ear is greater than the width of the first signal transmission structure, the second signal transmission structure, the third signal transmission structure and the fourth signal transmission structure. The first ear and the second ear cover the first signal transmission structure and the third signal transmission structure, or the first ear and the second ear cover the second signal transmission structure and the fourth signal transmission structure.
10. A display device, characterized in that, The display device includes a driving circuit and an electronic paper display panel as described in any one of claims 1-9, wherein the driving circuit is connected to the electronic paper display panel.