Drive circuits, display devices and electronic equipment

Abstract

This application discloses a driving circuit, a display device, and an electronic device. The driving circuit includes: a timing control unit, which receives source data and compares it with a built-in screen to output a first signal indicating a match or a second signal indicating a mismatch; a microcontroller unit, which generates corresponding control commands based on the first and second signals; and a voltage conversion unit, which receives the control commands and generates corresponding analog voltage signals. When the voltage conversion unit receives a control command indicating a mismatch, it outputs an abnormal-level analog voltage signal, causing the display panel to display an abnormal image. This application effectively detects color shift problems in the display device by matching the received source data with the built-in screen within the timing control unit and controlling the output logic of the source data based on the matching result, resulting in abnormal image display in cases of mismatch.

Description

Technical Field

[0001] This utility model relates to the field of display technology, and in particular to a driving circuit, display device and electronic device. Background Technology

[0002] In the field of display panel manufacturing and driving technology, the array layer, as a core component, directly determines the stability and accuracy of the displayed image through its circuit architecture design. Among these, the Dual Gate architecture, due to its advantages such as improved driving capability and optimized pixel response speed, has been widely used in mid-to-high-end display panel products. It is worth noting that the Dual Gate architecture, based on the difference in the connection layout between the gate and source, exhibits a clear distinction between positive Z-shaped and inverse Z-shaped architectures. These two architectures display mirror-symmetric characteristics in their circuit topology, with their core differences lying in the signal transmission path and electrode connection logic.

[0003] During the operation of a display panel, the source, as the output terminal of the data signal, needs to transmit precise image data signals to the pixel units. The signal transmission logic must be strictly matched with the type of Dual Gate architecture. Specifically, the gate drive timing and signal polarity configuration of the positive Z-type architecture are fundamentally different from those of the inverse Z-type architecture. The corresponding source output signal needs to be specifically set according to the architecture type to ensure that each pixel unit can receive the corresponding data under the correct timing.

[0004] However, in existing technologies, the driver code configuration of the display panel fails to accurately match whether the target panel's Dual Gate architecture is positive or negative Z-shaped. When the signal output logic in the driver code is set incorrectly, it directly causes misalignment in the data signal transmission at the source. This misalignment manifests as a mismatch between the data received by the pixel unit and the preset display content, with signals from adjacent pixel columns becoming mixed, ultimately resulting in a color shift in the displayed image. However, this color shift is sometimes difficult for the human eye to detect and requires additional detection equipment, severely impacting production inspection efficiency. Utility Model Content

[0005] In view of the above problems, the purpose of this utility model is to provide a driving circuit, display device and electronic device, which matches the received source data with the built-in screen in the timing control unit, and controls the output logic of the source data according to the matching result, so that the screen display is abnormal when there is a mismatch, thereby effectively detecting the color deviation problem of the display device.

[0006] According to one aspect of this utility model, a driving circuit is provided for driving a display panel to display an image, comprising: a timing control unit, the timing control unit including a data receiving module connected to a system motherboard to receive source data; a built-in image module for storing preset standard color image data; a data comparison module connected to the data receiving module and the built-in image module, and outputting a first signal or a second signal; a microcontroller unit connected to the timing control unit, receiving the first signal or the second signal, and outputting a corresponding control command; a voltage conversion unit connected to the microcontroller unit, receiving the control command and outputting a corresponding analog voltage signal; and a source driving unit connected to the voltage conversion unit, receiving the analog voltage signal and outputting a corresponding driving voltage.

[0007] Optionally, the timing control unit has a built-in screen containing preset standard color image data.

[0008] Optionally, the voltage conversion unit receives source data transmitted by the microcontroller unit.

[0009] Optionally, the voltage conversion unit receives source data transmitted by the microcontroller unit via an I2C interface.

[0010] Optionally, the first signal representing a match is a high-level state signal, and the second signal representing a mismatch is a low-level state signal; or the first signal representing a match is a low-level state signal, and the second signal representing a mismatch is a high-level state signal.

[0011] Optionally, it further includes a gate driving unit connected to the timing control unit to provide a scan signal.

[0012] According to another aspect of the present invention, a display device is provided, comprising a display array and the aforementioned driving circuit.

[0013] According to another aspect of the present invention, an electronic device is provided, wherein the above-described display device is included.

[0014] The driving circuit, display device, and electronic equipment provided by this utility model do not have a timing control unit directly connected to the source driving unit. Instead, the timing control unit establishes an indirect connection with the source driving unit through a microcontroller unit and a voltage conversion unit. This allows the timing control unit to compare the received source data with the built-in screen in real time. If color deviation is detected, the timing control unit can adjust the output parameters of the source data through the microcontroller unit and the voltage conversion unit to actively aggravate display abnormalities and improve problem identification efficiency. This enables the system to quickly locate architecture matching problems caused by incorrect driver code configuration during production line testing. Attached Figure Description

[0015] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:

[0016] Figure 1 A structural diagram of a display device according to a first embodiment of the present invention is shown;

[0017] Figure 2 A structural diagram of a display device according to a second embodiment of the present invention is shown;

[0018] Figure 3 A structural diagram of the driving circuit in a display device according to an embodiment of the present invention is shown;

[0019] Figure 4 A flowchart of a driving method according to an embodiment of the present invention is shown. Detailed Implementation

[0020] Various embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0021] The specific embodiments of this utility model will be described in further detail below with reference to the accompanying drawings and examples.

[0022] Figure 1 A structural diagram of a display device according to a first embodiment of the present invention is shown; Figure 2 A structural diagram of a display device according to a second embodiment of the present invention is shown; Figure 3 A structural diagram of the driving circuit in a display device according to an embodiment of the present invention is shown; Figure 4 A flowchart of a driving method according to an embodiment of the present invention is shown.

[0023] like Figure 1 and Figure 2 As shown, the display device of the first embodiment and the display device 10 of the second embodiment of this application both include a display panel 100, a driving circuit 200 and a system motherboard 300. The driving circuit 200 is electrically connected between the system motherboard 300 and the display panel 100, and is used to receive control signals and image data sent by the system motherboard 300, and convert them into timing signals and grayscale voltages suitable for driving the display panel 100.

[0024] The main difference between the second embodiment and the first embodiment lies in the different display area structure design in the display panel 100. For example, the first embodiment uses a positive Z-shaped double gate structure, while the second embodiment uses an inverted Z-shaped double gate structure. The two differ in the transmission direction of the scanning signal and the pixel charging sequence, thus requiring different driving timing logic. The following will use the first embodiment as an example to describe the display device 10 with the positive Z-shaped double gate structure in detail.

[0025] refer to Figure 1 The display panel 100 includes multiple scan lines 120 extending along the row direction and data lines 130 extending along the column direction. The scan lines 120 and data lines 130 intersect to form multiple pixel units 110. Each pixel unit 110 includes two sub-pixels, which are red (R), green (G), and blue (B). In the display panel 100, the two sub-pixels in each pixel unit 110 are arranged horizontally, and the two sub-pixels are respectively connected to two different scan lines 120 and the same data line 130. Each sub-pixel includes a thin-film transistor T, a liquid crystal capacitor CLC, and a storage capacitor CST. The gates of the thin-film transistors T in the multiple sub-pixels in the same row are alternately connected to two scan lines 120; the sources or drains of the thin-film transistors T in the multiple sub-pixels in the same column are alternately connected to two adjacent data lines 130.

[0026] When the gate driving unit 210 outputs a high-level scanning signal, the thin-film transistor T of the corresponding row is turned on. The data voltage provided by the source driving unit 220 is written to the pixel unit 110 via the data line 130 and stored in the liquid crystal capacitor CLC and the storage capacitor CST to control the deflection degree of the liquid crystal molecules and realize grayscale display. Subsequently, the scanning signal becomes low-level, the thin-film transistor T is turned off, the pixel enters the non-selected state, and the charged voltage is maintained until the next frame is refreshed.

[0027] The driving circuit 200 includes a gate driving unit 210, a source driving unit 220, a timing control unit 230, a microcontroller unit 240, and a voltage conversion unit 250. The timing control unit 230 receives signals from the system motherboard 300 and is connected to the microcontroller unit 240 and the gate driving unit 210, while the voltage conversion unit 250 is connected to the microcontroller unit 240 and the source driving unit 220.

[0028] The timing control unit 230 receives frame synchronization signals, line synchronization signals, clock signals, and source data sent by the system motherboard 300. It then compares the received source data with the built-in image stored within the timing control unit 230 to determine whether the current source data matches the dual-raster type of the display panel 100, i.e., whether there is a color difference in the displayed image. The built-in image of the timing control unit 230 is preset standard color image data.

[0029] In this embodiment, the system motherboard 300 transmits source data to the timing control unit 230 via AUX and Main link. AUX (Auxiliary Channel) is a bidirectional half-duplex differential signal path, an auxiliary channel used for transmitting low-bandwidth data, primarily carrying control commands and configuration information; while the Main link is a high-bandwidth path composed of 1-4 pairs of unidirectional differential lines, responsible for high-speed transmission of image data streams. The timing control unit 230 is connected to an EEPROM memory, which stores core hardware parameters (including Z-signals, resolution, maximum refresh rate, etc.). The AUX channel reads these parameters when the system is powered on.

[0030] Furthermore, the display panel 100 has a positive Z-shaped dual-gate structure. When the timing control unit 230 detects that the source data matches the built-in screen, it will output a first signal; if the detection result does not match, the timing control unit 230 will output a second signal. The first signal may be, for example, a high-level state signal, and the second signal may be, for example, a low-level state signal; or the first signal may be a low-level state signal, and the second signal may be a high-level state signal, depending on the architecture of the display panel 100.

[0031] Specifically, such as Figure 3 As shown, the timing control unit 230 includes a data receiving module 231, a data comparison module 232, and a built-in image module 233. The built-in image module 233 stores preset standard color image data that matches the display panel 100. The data comparison module 232 compares the received source data with the standard image data frame by frame, analyzing the consistency of their timing characteristics and grayscale distribution. If the two match, the signal adaptation is determined to be normal, and a first signal is output to initiate a normal control command; if there is a deviation, a second signal is output to trigger the microcontroller unit 240 to initiate an abnormal control command.

[0032] The microcontroller unit 240 receives the first or second signal output by the timing control unit 230, and calls the corresponding driver program according to the signal type to generate corresponding control instructions. It also sends source data to the voltage conversion unit 250 via the I2C (SDA and SCL) interface. I2C is a two-wire serial communication protocol that defines the rules for data transmission between devices. The SDA serial data line is the "data carrier" of the I2C protocol, responsible for bidirectional transmission of actual data. The SCL serial clock line is the "synchronization reference" of the I2C protocol, with the master device outputting a fixed-frequency clock signal to synchronize the data transmission rhythm on the SDA line.

[0033] The voltage conversion unit 250 converts the source data into an analog voltage signal corresponding to the control command according to the control command of the microcontroller unit 240, and outputs it to the source drive unit 220; the source drive unit 220 generates a corresponding drive level according to the analog voltage signal and applies it to the data line of the pixel unit 110.

[0034] In this embodiment, when the timing control unit 230 outputs the first signal, it indicates that the source data matches the built-in screen. The microcontroller unit 240 generates a first control command for normal display and transmits the source data to the voltage conversion unit 250 via I2C. The voltage conversion unit 250 converts the source data into a corresponding first type of analog voltage signal according to the first control command and outputs it to the source drive unit 220. The source drive unit 220 generates a standard drive level according to the first type of analog voltage signal and transmits it to the pixel unit 110 of the display panel 100 via the data line. The screen is displayed normally without color difference.

[0035] When the timing control unit 230 outputs the second signal, it indicates a mismatch between the source data and the built-in screen, resulting in a color cast problem. At this time, the microcontroller unit 240 generates a second control command for abnormal display and transmits the source data to the voltage conversion unit 250 via I2C. The voltage conversion unit 250 converts the source data into a corresponding second-type analog voltage signal according to the second control command and outputs it to the source drive unit 220. The source drive unit 220 generates an abnormal drive level based on the second-type analog voltage signal and transmits it to the pixel unit 110 of the display panel 100 via the data line. This results in abnormal screen display, with issues such as color inversion. The original color cast problem is amplified to color inversion, making the color cast phenomenon more obvious and facilitating rapid detection. In this way, the system actively exacerbates the display abnormality when color cast is detected, utilizing the human eye's sensitivity to color inversion to improve problem identification efficiency, achieving rapid diagnosis without the need for additional detection equipment.

[0036] In this embodiment, the timing control unit 230 is not directly connected to the source drive unit 220. Instead, it is indirectly connected to the source drive unit 220 through the microcontroller unit 240 and the voltage conversion unit 250. This allows the timing control unit 230 to compare the received source data with the built-in screen in real time. If color shift is detected, the timing control unit 230 can adjust the output parameters of the source data through the microcontroller unit 240 and the voltage conversion unit 250 to actively aggravate display abnormalities and improve problem identification efficiency.

[0037] Similarly, Figure 2 In the inverse Z-type dual-gate architecture shown, if the timing control unit 230 detects color shift, it can adjust the output parameters of the source data through the microcontroller unit 240 and the voltage conversion unit 250 to actively aggravate the display abnormality and improve the problem identification efficiency.

[0038] Furthermore, such as Figure 4 As shown, the driving method of the driving circuit 200 includes the following steps.

[0039] Step S10: Receive source data and compare it with the built-in screen in the timing control unit.

[0040] In this step, the source data is transmitted from the system motherboard 300 to the data receiving module 231 of the timing control unit 230, and then the data comparison module 232 compares the received source data with the built-in data frame by frame.

[0041] Step S20: Determine if there is a match.

[0042] In this step, the data comparison module 232 determines whether the received source data matches the built-in screen based on the comparison result. If they match, step S30 is executed; otherwise, step S40 is executed.

[0043] Step S30: The timing control unit generates a first signal to the microcontroller unit.

[0044] In this step, since the source data matches the built-in screen, the timing control unit 230 generates a first signal and transmits it to the microcontroller unit 240.

[0045] Step S40: The timing control unit generates a second signal to the microcontroller unit.

[0046] In this step, since the source data does not match the built-in screen, the timing control unit 230 generates a second signal and sends it to the microcontroller unit 240.

[0047] Step S50: The microcontroller unit controls the voltage conversion unit to output the corresponding analog voltage signal according to the first signal or the second signal.

[0048] In this step, if the microcontroller unit 240 receives the first signal, it generates a first control command for normal display based on the first signal and transmits the source data to the voltage conversion unit 250, so that the voltage conversion unit 250 converts the source data into a corresponding analog voltage signal according to the first control command and outputs it to the source drive unit 220, thereby driving the source drive unit 220 to display normally.

[0049] If the microcontroller unit 240 receives the second signal, it generates a second control command for abnormal display based on the second signal and transmits the source data to the voltage conversion unit 250. The voltage conversion unit 250 converts the source data into a corresponding analog voltage signal according to the second control command and outputs it to the source drive unit 220, driving the source drive unit 220 to display abnormally. At this time, the display screen may be inverted, for example.

[0050] The driving circuit, display device, and electronic equipment provided by this utility model do not have a timing control unit directly connected to the source driving unit. Instead, the timing control unit establishes an indirect connection with the source driving unit through a microcontroller unit and a voltage conversion unit. This allows the timing control unit to compare the received source data with the built-in screen in real time. If color deviation is detected, the timing control unit can adjust the output parameters of the source data through the microcontroller unit and the voltage conversion unit to actively aggravate display abnormalities and improve problem identification efficiency. This enables the system to quickly locate architecture matching problems caused by incorrect driver code configuration during production line testing.

[0051] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to effectively utilize the present invention and its modifications. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A driving circuit for driving a display panel to display an image, comprising: A timing control unit, comprising a data receiving module connected to the system motherboard to receive source data; Built-in image module stores preset standard color image data; The data comparison module connects the data receiving module and the built-in screen module, and outputs a first signal or a second signal; The microcontroller unit is connected to the timing control unit, receives a first signal or a second signal, and outputs corresponding control commands; A voltage conversion unit is connected to the microcontroller unit, receives the control command, and outputs the corresponding analog voltage signal; The source drive unit is connected to the voltage conversion unit, receives the analog voltage signal, and outputs the corresponding drive voltage.

2. The driving circuit according to claim 1, wherein, The timing control unit has a built-in display of preset standard color image data.

3. The driving circuit according to claim 1, wherein, The voltage conversion unit receives source data transmitted by the microcontroller unit.

4. The driving circuit according to claim 3, wherein, The voltage conversion unit receives source data transmitted by the microcontroller unit via an I2C interface.

5. The driving circuit according to claim 1, wherein, The first signal representing a match is a high-level state signal, and the second signal representing a mismatch is a low-level state signal; or the first signal representing a match is a low-level state signal, and the second signal representing a mismatch is a high-level state signal.

6. The driving circuit according to claim 1, wherein, Also includes: The gate driving unit, connected to the timing control unit, provides a scan signal.

7. A display device, wherein, It includes a display array and a driving circuit as described in any one of claims 1 to 6.

8. An electronic device, wherein, Includes the display device as described in claim 7.

Images