Reset circuit, circuit board assembly and electronic device

Abstract

The application relates to the technical field of circuits, and discloses a reset circuit, a circuit board assembly and electronic equipment. The reset circuit comprises a key module, an open-drain control module, a delay open-drain control module and a main control module. The open-drain control module is configured to output a first level signal to the main control module and output a second level signal to the delay open-drain control module according to the conduction state of the key module. The delay open-drain control module is configured to output a delayed third level signal to the main control module according to the second level signal. The main control module is configured to determine whether to start a reset function and whether to start a target function according to the first level signal and the third level signal. Therefore, the reset function and the target function are controlled by one key module, and the reset function and the cost of the electronic equipment are considered.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and in particular to a reset circuit, circuit board assembly, and electronic device. Background Technology

[0002] A reset button is a hardware function button widely used in various electronic devices. Its main function is to restore the device to its initial or preset default state. Some electronic devices omit the hardware reset button for aesthetic reasons and cost considerations. However, if an electronic device freezes, the only solution is to power it off. Some electronic devices are non-removable, leaving end-users unable to perform any recovery operations and forcing them to return the device for repair or discontinue use. Currently, some electronic products, disregarding cost, include a hardware reset button for end-user use. However, this button is prone to accidental activation, leading to unknowing reset or restart of the device, resulting in system data loss and impacting the user experience.

[0003] To address the issue of accidental reset button presses, some electronic devices have hidden the hardware reset button. For example, they may have only a small hole on the casing where the reset button would normally be. When the device freezes, the user, following the instructions, presses the reset button by inserting it through the small hole to reset and restart the system. While this method solves the accidental reset button issue to some extent, it increases the complexity of the overall device design and requires a separate hardware reset button, increasing the cost of the electronic device. This means that current electronic devices cannot effectively balance reset functionality with cost. Utility Model Content

[0004] The purpose of this application is to provide a reset circuit, circuit board assembly, and electronic device, thereby balancing the reset function and cost of the electronic device.

[0005] To address the aforementioned technical problems, embodiments of this application provide a reset circuit, comprising: a button module, an open-drain control module, a delayed open-drain control module, and a main control module; the open-drain control module is configured to output a first-level signal to the main control module and a second-level signal to the delayed open-drain control module based on the conduction state of the button module; the delayed open-drain control module is configured to output a delayed third-level signal to the main control module based on the second-level signal; the main control module is configured to determine whether to enable the reset function and whether to enable the target function based on the first-level signal and the third-level signal.

[0006] Embodiments of this application also provide a circuit board assembly, including the reset circuit described above.

[0007] Embodiments of this application also provide an electronic device, including the circuit board assembly described above.

[0008] In some embodiments, the reset circuit further includes a pull-up module; the first terminal of the button module is grounded, the second terminal of the button module is connected to the first terminal of the open-drain control module, and the second terminal of the open-drain control module is connected to the function pin of the main control module; the third terminal of the button module is connected to the first terminal of the delayed open-drain control module, and the second terminal of the delayed open-drain control module is connected to the reset pin of the main control module; the first terminal of the pull-up module is connected to the power supply, and the second terminal of the pull-up module is connected to the second terminal of the delayed open-drain control module.

[0009] In some embodiments, the open-drain control module includes: a first resistor and a first switching transistor; a first end of the first resistor is connected to a power supply, and a second end of the first resistor is connected to the control terminal of the first switching transistor and a function pin of the main control module; a first end of the first switching transistor is connected to the first terminal of the time-delay open-drain control module, and a second end of the first switching transistor is grounded.

[0010] In some embodiments, the time-delay open-drain control module includes: a second resistor, a third resistor, a first capacitor, a second capacitor, and a second switching transistor; a first end of the second resistor is connected to a power supply, and a second end of the second resistor is connected to a second terminal of the open-drain control module; the second end of the second resistor is also connected to the first end of the third resistor, and the second end of the third resistor is connected to the control terminal of the second switching transistor; a first end of the second switching transistor is connected to the reset pin of the main control module, and a second end of the second switching transistor is grounded; a first end of the first capacitor is connected to the first end of the third resistor, and a second end of the first capacitor is grounded; a first end of the second capacitor is connected to the second end of the third resistor, and a second end of the second capacitor is grounded.

[0011] In some embodiments, the reset circuit further includes: a discharge module; a first terminal of the discharge module is connected to the control terminal of the second switching transistor, and a second terminal of the discharge module is grounded; the discharge module includes: a fourth resistor; a first terminal of the fourth resistor is connected to the control terminal of the second switching transistor, and a second terminal of the fourth resistor is grounded.

[0012] In some embodiments, the reset circuit further includes a discharge acceleration module; the first end of the discharge acceleration module is connected to the control terminal of the second switching transistor, and the second end of the discharge acceleration module is connected to the first end of the third resistor.

[0013] In some embodiments, the discharge acceleration module includes a diode; the anode of the diode is connected to the control terminal of the second switching transistor, and the cathode of the diode is connected to the first terminal of the third resistor.

[0014] In some embodiments, the pull-up module includes a fifth resistor; a first end of the fifth resistor is connected to the power supply, and a second end of the fifth resistor is connected to the second end of the time-delay open-drain control module.

[0015] The embodiments of this application have at least the following advantages: In the reset circuit of this application embodiment, the main control module obtains the first level signal output by the open-drain control module and the third level signal after the delay of the delayed open-drain control module, and determines whether to enable the reset function or the target function based on the first level signal and the third level signal. Thus, the reset function and the target function are both controlled by a button module, thereby balancing the reset function and cost of the electronic device. Attached Figure Description

[0016] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0017] Figure 1 This is a schematic diagram of a reset circuit according to an embodiment of this application; Figure 2 This is another schematic diagram of the structure of a reset circuit according to an embodiment of this application; Figure 3 This is a schematic diagram of the circuit structure of a reset circuit according to an embodiment of this application. Detailed Implementation

[0018] As can be seen from the background technology, current electronic devices cannot simultaneously achieve both reset functionality and cost.

[0019] To address the aforementioned technical problems, this application provides a reset circuit, comprising: a button module, an open-drain control module, a delayed open-drain control module, and a main control module; the open-drain control module is configured to output a first-level signal to the main control module and a second-level signal to the delayed open-drain control module based on the conduction state of the button module; the delayed open-drain control module is configured to output a delayed third-level signal to the main control module based on the second-level signal; the main control module is configured to determine whether to enable the reset function and whether to enable the target function based on the first-level signal and the third-level signal.

[0020] In the reset circuit of this application embodiment, the main control module obtains the first level signal output by the open-drain control module and the third level signal after the delay of the delayed open-drain control module, and determines whether to enable the reset function or the target function based on the first level signal and the third level signal. Thus, the reset function and the target function are both controlled by a button module, thereby balancing the reset function and cost of the electronic device.

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the various embodiments of this application will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the various embodiments of this application to help readers better understand this application. However, the technical solutions claimed in this application can be implemented even without these technical details and various changes and modifications based on the following embodiments. The division of the various embodiments below is for the convenience of description and should not constitute any limitation on the specific implementation of this application. The various embodiments can be combined with and referenced by each other without contradiction.

[0022] One embodiment of this application relates to a reset circuit, the specific structural diagram of which is shown below. Figure 1 As shown, the reset circuit includes: button module SW1, open-drain control module 10, delayed open-drain control module 20, and main control module 40.

[0023] refer to Figure 1 The open-drain control module 10 is configured to output a first-level signal to the main control module 40 and a second-level signal to the delayed open-drain control module 20 based on the conduction state of the button module SW1; the delayed open-drain control module 20 is configured to output a delayed third-level signal to the main control module 40 based on the second-level signal; the main control module 40 is configured to determine whether to enable the reset function and whether to enable the target function based on the first-level signal and the third-level signal.

[0024] In the reset circuit of this application embodiment, the main control module 40 obtains the first level signal output by the open-drain control module 10 and the third level signal after the delay of the delayed open-drain control module 20, and determines whether to enable the reset function or the target function based on the first level signal and the third level signal. Thus, the reset function and the target function are both controlled by a button module SW1, thereby taking into account both the reset function and cost of the electronic device.

[0025] like Figure 2 The diagram shown is another structural schematic of the reset circuit in this embodiment.

[0026] The reset circuit of this embodiment further includes: a pull-up module 30; the first terminal of the button module SW1 in this embodiment is grounded, the second terminal of the button module SW1 is connected to the first terminal of the open-drain control module 10, the second terminal of the open-drain control module 10 is connected to the function pin GPIO of the main control module 40; the third terminal of the button module SW1 is connected to the first terminal of the delayed open-drain control module 20, the second terminal of the delayed open-drain control module 20 is connected to the reset pin RESET of the main control module 40; the first terminal of the pull-up module 30 is connected to the power supply VCC, and the second terminal of the pull-up module 30 is connected to the second terminal of the delayed open-drain control module 20.

[0027] The open-leak control module 10 and the time-delay open-leak control module 20 are also connected to the power supply VCC, which supplies power to the open-leak control module 10 and the time-delay open-leak control module 20 respectively.

[0028] In practical applications, if the user presses button module SW1, it will turn on. When button module SW1 is on, both the first and second level signals change. The main control module 40 detects the change in the first level signal through the function pin GPIO. Since the delay open-drain control module 20 obtains the delayed third level signal based on the second level signal (e.g., the delay time is t), if the user does not press button module SW1 before the delay time t, the third level signal will not change after the delay time t. The main control module 40 detects the change in the third level signal after the delay time t through the reset pin RESET, and can execute the target function, such as taking a picture, increasing the volume, or decreasing the volume. If the user presses button module SW1 continuously within the delay time t, the third level signal will change after the delay time t. The main control module 40 detects the change in the third level signal after the delay time t through the reset pin RESET, and can execute the reset function.

[0029] In other words, if the user briefly presses button module SW1, the first and second level signals will change, while the third level signal will not change. This allows the main control module 40 to detect a change in the first level signal via the GPIO function pin and a change in the third level signal via the RESET reset pin, thus executing the target function. If the user presses button module SW1 for a long time, exceeding the delay time t, all three level signals will change. This allows the main control module 40 to detect a change in the first level signal via the GPIO function pin and a change in the third level signal via the RESET reset pin, thus executing the reset function.

[0030] like Figure 3The diagram shown is a schematic diagram of the reset circuit in this embodiment.

[0031] The open-drain control module 10 of this embodiment includes: a first resistor R1 and a first switch Q1; the first end of the first resistor R1 is connected to the power supply VCC, the second end of the first resistor R1 is connected to the control terminal of the first switch Q1 and the function pin GPIO of the main control module 40; the first end of the first switch Q1 is connected to the first end of the delay open-drain control module 20, and the second end of the first switch Q1 is grounded.

[0032] The time-delay open-drain control module 20 of this embodiment includes: a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2, and a second switch Q2; the first end of the second resistor R2 is connected to the power supply VCC, and the second end of the second resistor R2 is connected to the second end of the open-drain control module 10; the second end of the second resistor R2 is also connected to the first end of the third resistor R3, and the second end of the third resistor R3 is connected to the control terminal of the second switch Q2; the first end of the second switch Q2 is connected to the reset pin RESET of the main control module 40, and the second end of the second switch Q2 is grounded; the first end of the first capacitor C1 is connected to the first end of the third resistor R3, and the second end of the first capacitor C1 is grounded; the first end of the second capacitor C2 is connected to the second end of the third resistor R3, and the second end of the second capacitor C2 is grounded.

[0033] Specifically, the second resistor R2, the third resistor R3, the first capacitor C1, and the second capacitor C2 form the charging circuit for the control terminal of the second switch Q2. When the voltage at the control terminal of the second switch Q2 reaches the turn-on voltage, the second switch Q2 is turned on. The charging duration at the control terminal of the second switch Q2 determines the delay time t.

[0034] When button module SW1 is pressed briefly, the GPIO function pin of the main control module 40 detects that the first level signal is low. At this time, the main control module 40 begins to recognize that button module SW1 is pressed, calculates the button press duration, and simultaneously turns on the first switch Q1. The voltage VCC briefly charges the gate of the second switch Q2 through the second resistor R2, the third resistor R3, the first capacitor C1, and the second capacitor C2. Before the gate voltage of the second switch Q2 reaches the turn-on voltage, it is immediately pulled low, so that the second switch Q2 is still in the off state. The RESET pin of the main control module 40 detects that the third level signal is still high, and the main control module 40 enables the target function.

[0035] When button module SW1 is pressed and held, the GPIO function pin of the main control module 40 detects that the first level signal is low. At this time, the main control module 40 starts to recognize that button module SW1 is pressed, calculates the duration of button press, and simultaneously turns on the first switch Q1. The voltage VCC charges the gate of the second switch Q2 through the second resistor R2, the third resistor R3, the first capacitor C1, and the second capacitor C2. The voltage of the gate of the second switch Q2 rises slowly. When the voltage of the gate of the second switch Q2 rises to the turn-on voltage, the second switch Q2 turns on. The RESET pin of the main control module 40 detects that the third level signal is low, and the main control module 40 enables the reset function.

[0036] The reset circuit in this embodiment further includes a discharge module 50; the first end of the discharge module 50 is connected to the control terminal of the second switching transistor Q2, and the second end of the discharge module 50 is grounded. Specifically, the discharge module 50 includes a fourth resistor R4; the first end of the fourth resistor R4 is connected to the control terminal of the second switching transistor Q2, and the second end of the fourth resistor R4 is grounded.

[0037] When the end user presses and releases the button module SW1, the voltage at the gate of the second switch Q2 is released to the ground terminal through the fourth resistor R4, causing the voltage at the gate of the second switch Q2 to drop rapidly. The second switch Q2 remains in the off state, and the third level signal remains at a high level. The RESET pin of the main control module 40 detects that the third level signal is always at a high level, and the main control module 40 does not enable the reset function.

[0038] The reset circuit in this embodiment further includes a discharge acceleration module 60; the first end of the discharge acceleration module 60 is connected to the control terminal of the second switch Q2, and the second end of the discharge acceleration module 60 is connected to the first end of the third resistor R3. Specifically, the discharge acceleration module 60 includes a diode D; the anode of the diode D is connected to the control terminal of the second switch Q2, and the cathode of the diode D is connected to the first end of the third resistor R3.

[0039] In this embodiment, by setting up a discharge acceleration module 60, i.e., diode D, the release speed of the gate voltage of the second switching transistor Q2 can be accelerated, the accuracy of the RESET detection of the main control module 40 can be improved, and the accuracy of the reset function control of the electronic device can be improved.

[0040] The pull-up module 30 in this embodiment includes: a fifth resistor R5; the first end of the fifth resistor R5 is connected to the power supply VCC, and the second end of the fifth resistor R5 is connected to the second end of the time-delay open-drain control module 20.

[0041] Specifically, button module SW1 is a tactile button. When button module SW1 is pressed, pins 1 and 2 of button module SW1 are shorted, and pins 3 and 4 are grounded, which improves the safety of button module SW1. When button module SW1 is released, pins 1 and 2 of button module SW1 bounce back and disconnect. When button module SW1 is disconnected, the first switch Q1 is turned on due to the pull-up resistor at its gate, i.e., the first switch Q1 is turned on. At this time, the gate voltage of the second switch Q2 is pulled low, and the second switch Q2 is turned off. Under normal circumstances, the reset pin RESET and the function pin GPIO of the main control module 40 will detect a high level.

[0042] When button module SW1 is pressed, the function pin GPIO of main control module 40 starts to detect that the first level signal is low. At this time, it starts to recognize that the button is pressed and calculates the button press duration. At the same time, the first switch Q1 is turned off, and the power supply VCC charges the gate of the second switch Q2 through the second resistor R2, the third resistor R3, the first capacitor C1, and the second capacitor C2. The voltage of the gate of the second switch Q2 rises slowly. The time it takes for the voltage of the gate of the second switch Q2 to rise to the turn-on voltage, i.e., the delay time t, depends on the charging circuit composed of the second resistor R2, the third resistor R3, the first capacitor C1, and the second capacitor C2.

[0043] When button module SW1 releases before the gate voltage of the second switch Q2 reaches the turn-on voltage (i.e., before the delay time t), the first switch Q1 is turned on due to the first gate resistor R1. The discharge circuit composed of diode D and fourth resistor R4 discharges rapidly, and the gate voltage of the second switch Q2 is quickly pulled down. The main control module 40 detects the corresponding button duration and performs the corresponding logical action. When button module SW1 has not yet released when the gate voltage of the second switch Q2 reaches the turn-on voltage, the second switch Q2 is turned on, and the RESET pin of the main control module 40 is pulled down. The main control module 40 then enters the hardware reset state until button module SW1 is released. When button module SW1 is released, the first switch Q1 is turned on due to the pull-up resistor at the gate, i.e., the first resistor R1. The discharge circuit composed of diode D and fourth resistor R4 discharges rapidly, and the gate voltage of the second switch Q2 is quickly pulled down. The second switch Q2 is turned off, thus a short press of button module SW1 achieves the target function, and a long press of button module SW1 achieves the reset function. Another aspect of this application provides a circuit board assembly, including: a reset circuit as described in any of the above embodiments.

[0044] The circuit board assembly in this embodiment, by setting the above-mentioned reset circuit, controls both the reset function and the target function through a single button module, thereby balancing the reset function and cost of the electronic device.

[0045] It is not difficult to see that this embodiment is a circuit board assembly embodiment corresponding to the circuit embodiment, and this embodiment can be implemented in conjunction with the circuit embodiment. The relevant technical details mentioned in the circuit embodiment are still valid in this embodiment, and will not be repeated here to reduce repetition. Correspondingly, the relevant technical details mentioned in this embodiment can also be applied to the circuit embodiment.

[0046] Furthermore, in order to highlight the innovative aspects of this application, no units that are not closely related to solving the technical problems proposed in this application are introduced in this embodiment, but this does not mean that there are no other units in this embodiment.

[0047] Another aspect of this application provides an electronic device, including: a circuit board assembly as described in the above embodiment.

[0048] The electronic device in this embodiment, by setting the above-mentioned circuit board assembly, controls both the reset function and the target function through a single button module, thereby balancing the reset function and cost of the electronic device.

[0049] The above division of various components is only for clarity of description. In implementation, they can be combined into one component or some components can be split into multiple components. As long as they include the same logical relationship, they are all within the scope of protection of this patent.

[0050] Those skilled in the art will understand that the above embodiments are specific embodiments for implementing this application, and in practical applications, various changes can be made to them in form and detail without departing from the spirit and scope of this application.

Claims

1. A reset circuit, characterized in that, include: Key module, open-leak control module, delayed open-leak control module, main control module; The open-drain control module is configured to output a first level signal to the main control module and a second level signal to the delayed open-drain control module according to the conduction state of the button module; The time-delay open-drain control module is configured to output a delayed third-level signal to the main control module based on the second-level signal. The main control module is configured to determine whether to enable the reset function and whether to enable the target function based on the first level signal and the third level signal.

2. The reset circuit according to claim 1, characterized in that, The reset circuit also includes a pull-up module; The first terminal of the button module is grounded, the second terminal of the button module is connected to the first terminal of the open-drain control module, and the second terminal of the open-drain control module is connected to the function pin of the main control module; the third terminal of the button module is connected to the first terminal of the delayed open-drain control module, and the second terminal of the delayed open-drain control module is connected to the reset pin of the main control module; the first terminal of the pull-up module is connected to the power supply, and the second terminal of the pull-up module is connected to the second terminal of the delayed open-drain control module.

3. The reset circuit according to claim 1, characterized in that, The open-drain control module includes: a first resistor and a first switching transistor; The first end of the first resistor is connected to the power supply, and the second end of the first resistor is connected to the control terminal of the first switching transistor and the function pin of the main control module. The first terminal of the first switching transistor is connected to the first terminal of the time-delay open-drain control module, and the second terminal of the first switching transistor is grounded.

4. The reset circuit according to claim 1, characterized in that, The time-delay open-drain control module includes: a second resistor, a third resistor, a first capacitor, a second capacitor, and a second switching transistor; The first end of the second resistor is connected to the power supply, and the second end of the second resistor is connected to the second end of the open-drain control module. The second end of the second resistor is also connected to the first end of the third resistor, and the second end of the third resistor is connected to the control terminal of the second switching transistor; the first end of the second switching transistor is connected to the reset pin of the main control module, and the second end of the second switching transistor is grounded. The first terminal of the first capacitor is connected to the first terminal of the third resistor, and the second terminal of the first capacitor is grounded. The first terminal of the second capacitor is connected to the second terminal of the third resistor, and the second terminal of the second capacitor is grounded.

5. The reset circuit according to claim 4, characterized in that, The reset circuit further includes: a discharge module; The first end of the discharge module is connected to the control end of the second switching transistor, and the second end of the discharge module is grounded. The discharge module includes: a fourth resistor; The first end of the fourth resistor is connected to the control terminal of the second switching transistor, and the second end of the fourth resistor is grounded.

6. The reset circuit according to claim 4 or 5, characterized in that, The reset circuit further includes: a discharge acceleration module; The first end of the discharge acceleration module is connected to the control end of the second switching transistor, and the second end of the discharge acceleration module is connected to the first end of the third resistor.

7. The reset circuit according to claim 6, characterized in that, The discharge acceleration module includes a diode; The anode of the diode is connected to the control terminal of the second switching transistor, and the cathode of the diode is connected to the first terminal of the third resistor.

8. The reset circuit according to claim 2, characterized in that, The pull-up module includes: a fifth resistor; The first end of the fifth resistor is connected to the power supply, and the second end of the fifth resistor is connected to the second end of the time-delay open-drain control module.

9. A circuit board assembly, characterized in that, include: The reset circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that, include: The circuit board assembly of claim 9.

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