A silicon wafer having a suede structure, a solar cell, an assembly and a photovoltaic system
Patent Information
- Application Number
- CN202522514421.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-26
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2035-11-26
AI Technical Summary
[0004]现有太阳能电池通常仅对硅片正面制绒形成光陷阱,以捕获入射光,反射率为10%~11%,仍旧有大量的入射光被直接反射出去,降低了光吸收量
[0024]本实用新型提供的一种具有绒面结构的硅片、太阳能电池、组件及光伏系统,在硅片表面形成多级绒面结构,在太阳光射入过程中,硅片表面形成的陷光沟槽与其侧面的折射楞条实现了一次光陷,类金字塔单元绒面实现了二次光陷,降低了光反射率,达到3%~5%,减少了入射光损失,有利于增加光吸收量,进而有效提升了太阳能电池的光电转换效率。
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Figure CN224875332U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of solar cells and relates to a silicon wafer with a textured surface, a solar cell, a module, and a photovoltaic system. Background Technology
[0002] Solar cells utilize the photovoltaic effect to reflect and absorb sunlight incident on their surface, converting it into electrical energy. The core of a solar cell is its semiconductor structure, typically using a silicon wafer as a substrate. This structure absorbs photons and generates photoelectron-hole pairs to produce electricity. Untreated silicon wafers have smooth surfaces, causing incident solar energy to be directly reflected and unable to penetrate the cell. Therefore, texturing is used to create a micro-textured structure on the silicon wafer surface, lengthening the refraction path of incident light, reducing reflection, and improving light absorption efficiency.
[0003] CN106340550A discloses a method for preparing a textured surface structure for crystalline silicon solar cells. The method involves pre-treating the silicon wafer surface, first removing the damaged layer with an alkaline solution, and then isotropically etching it with an acidic solution. This results in a surface structure suitable for preparing a nanotextured surface, achieving a significant advantage in photoelectric conversion efficiency. CN118825129A discloses a silicon wafer used to prepare solar cells, its preparation method, and optoelectronic devices. By performing a first polishing, a first texturing, a second polishing, and a second texturing process on the silicon wafer, the morphology and structure of the textured surface are upgraded and optimized, increasing the number of pyramids and enhancing the light-trapping effect on the front side.
[0004] Current solar cells typically only texturize the front side of the silicon wafer to create light traps and capture incident light, resulting in a reflectivity of 10% to 11%. A significant amount of incident light is still directly reflected, reducing light absorption. Therefore, to further reduce the reflectivity of incident light, the textured surface structure of the silicon wafer needs to be optimized and upgraded. Utility Model Content
[0005] In view of the shortcomings of the existing technology, the purpose of this utility model is to provide a silicon wafer, solar cell, module and photovoltaic system with a textured surface, which reduces light reflectivity and improves light absorption efficiency by adjusting the textured surface of the silicon wafer.
[0006] To achieve this objective, the present invention adopts the following technical solution:
[0007] In a first aspect, the present invention provides a silicon wafer with a textured surface, wherein the silicon wafer with the textured surface has a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface being connected to the first surface and the second surface respectively; at least one of the first surface and the second surface has a plurality of pyramid-like units distributed thereon, two adjacent pyramid-like units being spaced apart to form a light-trapping groove, and at least two protrusions being provided on the top of the pyramid-like units; and a plurality of refractive ribs are distributed on the sidewall surface.
[0008] It should be noted that the pyramid-like unit refers to a structure with a wide base and a gradually narrowing shape, including a square pyramid, a triangular pyramid, or other multi-faceted pyramidal structures. The "top of the pyramid-like unit" refers to the end of the pyramid-like unit away from the silicon wafer surface.
[0009] As a preferred technical solution of this utility model, the height of the pyramid-like unit is 1μm to 10μm, for example, it can be 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm or 10μm, but it is not limited to the listed values. Other unlisted values within this range are also applicable.
[0010] As a preferred embodiment of this utility model, the angle between the sidewall of the pyramid-like unit and the plane containing the silicon wafer surface is 15° to 90°, for example, it can be 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50°, 55°, 60°, 65°, 70°, 75°, 80° or 90°, but is not limited to the listed values, other unlisted values within this range are also applicable.
[0011] As a preferred embodiment of this utility model, the average width of the top of the pyramid-like unit is 2μm to 5μm, for example, it can be 2.0μm, 2.5μm, 3.0μm, 3.5μm, 4.0μm, 4.5μm, 5.0μm or 5.5μm, but it is not limited to the listed values. Other unlisted values within this range are also applicable.
[0012] As a preferred embodiment of this utility model, the spacing between two adjacent pyramid-like units is 0.2μm to 1.5μm, for example, it can be 0.2μm, 0.3μm, 0.4μm, 0.5μm, 0.6μm, 0.8μm, 1.0μm, 1.2μm, 1.3μm, 1.4μm or 1.5μm, but it is not limited to the listed values. Other unlisted values within this range are also applicable.
[0013] As a preferred embodiment of this invention, the distribution density of the pyramid-like units is 150,000 to 250,000 per mm. 2 For example, it could be 150,000 units / mm 2 160,000 / mm 2 170,000 / mm 2 180,000 / mm 2 190,000 / mm 2 200,000 / mm 2 210,000 / mm 2 220,000 / mm 2 230,000 / mm 2 240,000 / mm 2 Or 250,000 / mm 2 However, this does not apply to all values listed; other unlisted values within the same range also apply.
[0014] As a preferred embodiment of this utility model, the height of the protrusion is 0.5μm to 1.5μm, for example, it can be 0.5μm, 0.6μm, 0.8μm, 1.0μm, 1.2μm, 1.3μm, 1.4μm or 1.5μm, but it is not limited to the listed values. Other unlisted values within this range are also applicable.
[0015] As a preferred embodiment of this utility model, the protrusion is pyramidal in shape, and the diagonal length of the base of the protrusion is 0.5μm to 1.5μm, for example, it can be 0.5μm, 0.6μm, 0.8μm, 1.0μm, 1.2μm, 1.3μm, 1.4μm or 1.5μm, but it is not limited to the listed values. Other unlisted values within this range are also applicable.
[0016] As a preferred embodiment of this utility model, the light-trapping groove is further provided with a number of protruding units, which are pyramid-shaped.
[0017] As a preferred embodiment of this utility model, the ratio of the height of the pyramid-like unit to the height of the protruding unit is 3 to 5, for example, it can be 3.0, 3.2, 3.5, 3.8, 4.0, 4.3, 4.5, 4.8 or 5.0, but it is not limited to the listed values. Other unlisted values within this range are also applicable.
[0018] As a preferred embodiment of this utility model, the refractive ribs are in the form of a "V" shape.
[0019] As a preferred embodiment of this utility model, the distribution density of the refractive ribs is 10 to 20 ribs / μm, for example, it can be 10 ribs / μm, 11 ribs / μm, 12 ribs / μm, 13 ribs / μm, 14 ribs / μm, 15 ribs / μm, 16 ribs / μm, 17 ribs / μm, 18 ribs / μm, 19 ribs / μm or 20 ribs / μm, but it is not limited to the listed values, and other unlisted values within this range are also applicable.
[0020] Secondly, this utility model provides a solar cell, which includes the silicon wafer with a textured surface as described in the first aspect.
[0021] Thirdly, this utility model provides a battery assembly, which includes the solar cell described in the second aspect.
[0022] Fourthly, this utility model provides a photovoltaic system, which includes the battery module described in the third aspect.
[0023] Compared with the prior art, the beneficial effects of this utility model are as follows:
[0024] This invention provides a silicon wafer, solar cell, module, and photovoltaic system with a textured surface. A multi-level textured surface structure is formed on the surface of the silicon wafer. During the sunlight incident process, the light-trapping grooves formed on the surface of the silicon wafer and the refractive ribs on the side achieve primary light trapping, and the pyramid-like unit textured surface achieves secondary light trapping, reducing the light reflectivity to 3%~5%, reducing incident light loss, which is conducive to increasing light absorption, and thus effectively improving the photoelectric conversion efficiency of the solar cell. Attached Figure Description
[0025] Figure 1 This is a schematic diagram of the textured structure of the first surface of a silicon wafer provided in an embodiment.
[0026] Figure 2 A scanning electron microscope image of the textured structure of the first surface of a silicon wafer provided in the embodiment.
[0027] Figure 3 A scanning electron microscope (SEM) image of the refractive ribs provided on the sidewall of the silicon wafer in the embodiment.
[0028] Among them, 100-silicon wafer; 1-pyramid-like unit; 2-light trapping trench; 3-protrusion; 4-protruding unit; 5-refractive rib. Detailed Implementation
[0029] It should be understood that in the description of this utility model, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used solely for the convenience of describing this utility model and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this utility model, unless otherwise stated, "a plurality of" or "several" means two or more.
[0030] It should be noted that, in the description of this utility model, unless otherwise explicitly specified and limited, the terms "set," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0031] The technical solution of this utility model will be further described below with reference to the accompanying drawings and specific embodiments.
[0032] In one specific embodiment, the present invention provides a silicon wafer 100 with a textured surface, having a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface connecting the first surface and the second surface respectively. Sunlight enters through the first surface of the silicon wafer 100 and is absorbed by extending the light refraction and reflection path through the textured surface structure. At least one of the first surface and the second surface has a plurality of pyramid-like units 1 distributed thereon, and two adjacent pyramid-like units 1 are spaced apart to form light-trapping grooves 2. At least two protrusions 3 are provided on the top of the pyramid-like units 1; a plurality of refractive ribs 5 are distributed on the sidewall surface.
[0033] The silicon wafer 100 can be either a monocrystalline silicon wafer 100 or a polycrystalline silicon wafer 100.
[0034] In order to form a protrusion 3 at the top of the pyramid-like structure, the geometric shape of the pyramid-like unit 1 of this invention is usually a square pyramid, a pentagonal pyramid, a hexagonal pyramid, or other multi-faceted pyramids. "Top of pyramid-like unit 1" refers to the end of pyramid-like unit 1 away from the surface of silicon wafer 100.
[0035] The height of the pyramid-like unit 1 is 1μm to 10μm, preferably 4μm to 6μm. The sidewalls of the pyramid-like unit 1 have a structure that slopes upwards from the surface of the silicon wafer 100, with the angle between the sidewalls and the plane containing the surface of the silicon wafer 100 being 15° to 90°, preferably 40° to 65°, and more preferably 50° to 55°. This invention, by adjusting the height and slope of the pyramid-like unit 1, creates a steep structure, increases the surface area of the textured surface, ensures optimal light-trapping effect, reduces reflectivity, and also has good process compatibility.
[0036] The distribution density of pyramid-like unit 1 is 150,000 to 250,000 units / mm². 2 The spacing between two adjacent pyramid-like units 1 is 0.2μm to 1.5μm, preferably 0.3μm to 1.1μm, to ensure the size of the light-trapping trench 2, which refracts the incident light and gives the silicon wafer 100 textured surface the best light-trapping effect.
[0037] In order to form a protrusion 3 on the top of the pyramid-like unit 1 and further enhance the light trapping effect, the average width of the top of the pyramid-like unit 1 is 2μm~5μm, preferably 3μm~4μm, and the size of the protrusion 3 is the height of 0.5μm~1.5μm.
[0038] Furthermore, the protrusion 3 is pyramidal in shape, and the diagonal length of the base of the protrusion 3 is 0.5μm~1.5μm.
[0039] It should be noted that the average width in this invention is obtained as follows: Five 10mm × 10mm detection areas are randomly selected on the surface of the silicon wafer 100. The number of pyramid-like units 1 in each detection area is measured, and the maximum linear length at the top is measured. The total number of pyramid-like units 1 in the five detection areas and the total length of the maximum linear length are calculated, and the average width is obtained by using the arithmetic mean formula. The maximum linear length refers to the maximum straight-line distance connecting two points on the top edge along the length direction of the silicon wafer 100.
[0040] The light-trapping trench 2 is further provided with several protruding units 4, which are pyramid-shaped. The ratio of the height of the pyramid-like unit 1 to the height of the protruding unit 4 is 3~5. This invention forms a multi-level pyramidal textured surface with different sizes and shapes on the surface of the silicon wafer 100, achieving a double light-trapping effect and effectively reducing light reflectivity.
[0041] The refractive ribs 5 formed on the side of the silicon wafer 100 have a "V" shaped structure, and the distribution density of the refractive ribs 5 is 10~20 per μm.
[0042] For example, the method for preparing the silicon wafer 100 with a textured surface provided by this utility model includes the following steps:
[0043] S1: Perform preliminary polishing on silicon wafer 100 to remove the damaged layer and form a smooth surface.
[0044] S2: The silicon wafer 100 polished in S1 is cleaned and dehydrated to remove residual solution or dirt from the silicon wafer 100 after polishing. The cleaning process can employ at least one of the commonly used methods in the art: RCA standard solution cleaning, deionized water cleaning, acid cleaning, and ozone cleaning.
[0045] S3: A mask is prepared on the surface of silicon wafer 100 for protection, followed by etching using an alkaline solution. The alkaline solution includes, but is not limited to, at least one of NaOH, KOH, NH4OH, and TMAH, supplemented with commonly used surfactants, dispersants, and emulsifiers in the art. Simultaneously, the etching temperature is ensured to be 50~70℃, and the etching time is 200~400s.
[0046] S4: Remove the mask layer, and after cleaning with RCA standard solution again, dehydrate and dry to remove surface residue.
[0047] S5: The silicon wafer 100 is texturized, forming a pyramid structure on at least one of the first and second surfaces, and refractive ribs 5 are formed on the sidewalls, resulting in a silicon wafer 100 with a textured surface. The texturizing process uses an alkaline solution, including but not limited to at least one of NaOH, KOH, NH4OH and TMAH, and is supplemented with surfactants, dispersants and emulsifiers commonly used in the art, and is treated at 50~90°C for 300~1200s.
[0048] S6: Finally, perform RCA standard solution cleaning process, followed by dehydration and drying.
[0049] In another specific embodiment, the present invention provides a solar cell, which includes a silicon wafer 100 with a textured surface in one specific embodiment. By using the silicon wafer 100 with the above-mentioned multi-level textured surface, the light absorption of the cell is effectively increased, which is beneficial to increasing the short-circuit current of the solar cell and improving the photoelectric conversion efficiency.
[0050] Taking the TOPcon cell as an example, the solar cell also includes a passivation tunneling layer, a doped film layer, a passivation layer, and a cell electrode, which are independently stacked on the first and second surfaces of the silicon wafer 100 with a textured surface. The passivation tunneling layer is disposed close to the silicon wafer 100. The silicon wafer 100, with its textured surface containing pyramid-like units 1, strengthens the interfacial bonding strength and improves the light absorption rate, thereby effectively enhancing the photoelectric conversion efficiency of the solar cell.
[0051] Taking a BC cell as an example, the first surface of the silicon wafer 100 with a textured surface is designated as the front side, and the second surface as the back side. The solar cell also includes a passivation layer disposed on the first surface of the silicon wafer 100, which enhances the connection strength between the silicon wafer 100 and the passivation layer through the textured surface structure. The second surface of the silicon wafer 100 also has N-regions and P-regions arranged alternately along the length of the silicon wafer 100. Tunneling doped structures with opposite polarities are formed in different regions, and electrodes and the passivation layer are fabricated to obtain a back contact structure. A gap region is provided between the N-regions and the P-regions, and the aforementioned textured surface structure can be disposed within the gap region.
[0052] In another specific embodiment, the present invention provides a battery assembly, which includes the solar cell described in another specific embodiment.
[0053] In another specific embodiment, the present invention provides a photovoltaic system, which includes the battery module described in another specific embodiment.
[0054] Example 1
[0055] This embodiment provides a silicon wafer 100 with a textured surface, having a first surface and a second surface disposed opposite to each other, and a sidewall located between the first surface and the second surface, the sidewall connecting the first surface and the second surface respectively. The first surface and the second surface are distributed with a plurality of pyramid-like units 1, such as... Figure 1 and Figure 2 As shown, two adjacent pyramidal units 1 are spaced apart to form light-trapping trenches 2. The height of the pyramidal unit 1 is 6 μm, the angle θ between its sidewall and the plane containing the surface of the silicon wafer 100 is 55°, and the distribution density of the pyramidal units is 200,000 / mm². 2 The distance between the bases of two adjacent pyramid-like units 1 is 1 μm. Each pyramid-like unit 1 is pyramidal in shape, with an average width of 4 μm at the top, and its top is covered with protrusions 3, each 1 μm high, forming a pyramid shape with a diagonal length of 1 μm at the base. Multiple pyramid-shaped protrusions 4 are also provided within the light-trapping groove 2, with each protrusion 4 having a height of 2 μm. For example... Figure 3 As shown, multiple V-shaped refractive ribs 5 are distributed on the sidewall surface, with a distribution density of 15 ribs / μm. The light-trapping trenches 2 on the surface of the silicon wafer 100 and the refractive ribs 5 on the sidewall surface form a primary light trap, while the textured surface of the silicon wafer 100 forms a secondary light trap, which improves the light-trapping capability and reduces light reflection.
[0056] Example 2
[0057] This embodiment provides a silicon wafer 100 with a textured surface, having a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface connecting the first surface and the second surface respectively. Multiple pyramid-like units 1 are distributed on the first surface and the second surface, with adjacent pyramid-like units 1 spaced apart to form light-trapping trenches 2. The height of the pyramid-like unit 1 is 4 μm, the angle θ between the sidewall and the plane containing the surface of the silicon wafer 100 is 50°, and the distribution density of the pyramid-like units is 180,000 units / mm². 2 The distance between the bottoms of two adjacent pyramid-like units 1 is 0.5 μm. Each pyramid-like unit 1 is pyramidal in shape, with an average top width of 3 μm and tops covered with 0.5 μm high protrusions 3, which are pyramidal in shape, with a diagonal length of 0.8 μm at their base. Multiple pyramidal protrusions 4 are also provided within the light-trapping trench 2, with each protrusion 4 having a height of 1 μm. Multiple V-shaped refractive ribs 5 are distributed on the sidewalls at a density of 10 ribs / μm. The light-trapping trench 2 on the silicon wafer 100 surface and the refractive ribs 5 on the sidewalls form a primary light trap, while the textured surface of the silicon wafer 100 surface forms a secondary light trap, improving light capture capability and reducing light reflection.
[0058] Example 3
[0059] This embodiment provides a silicon wafer 100 with a textured surface, having a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface connecting the first surface and the second surface respectively. Multiple pyramid-like units 1 are distributed on the first surface and the second surface, with adjacent pyramid-like units 1 spaced apart to form light-trapping trenches 2. The height of the pyramid-like unit 1 is 5 μm, the angle θ between the sidewall and the plane containing the surface of the silicon wafer 100 is 65°, and the distribution density of the pyramid-like units is 150,000 units / mm². 2 The distance between the bottoms of two adjacent pyramid-like units 1 is 1.5 μm. Each pyramid-like unit 1 is pyramidal in shape, with an average top width of 2 μm and tops covered with 1.2 μm high protrusions 3, which are pyramidal in shape, with a diagonal length of 0.6 μm at their base. Multiple pyramidal protrusions 4 are also provided within the light-trapping trench 2, with each protrusion 4 having a height of 1 μm. Multiple V-shaped refractive ribs 5 are distributed on the sidewalls at a density of 20 per μm. The light-trapping trench 2 on the silicon wafer 100 surface and the refractive ribs 5 on the sidewalls form a primary light trap, while the textured surface of the silicon wafer 100 surface forms a secondary light trap, improving light capture capability and reducing light reflection.
[0060] Example 4
[0061] This embodiment provides a silicon wafer 100 with a textured surface, having a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface connecting the first surface and the second surface respectively. Multiple pyramid-like units 1 are distributed on the first surface and the second surface, with adjacent pyramid-like units 1 spaced apart to form light-trapping trenches 2. The height of the pyramid-like unit 1 is 10 μm, the angle θ between the sidewall and the plane containing the surface of the silicon wafer 100 is 65°, and the distribution density of the pyramid-like units is 200,000 / mm². 2 The distance between the bottoms of two adjacent pyramid-like units 1 is 0.2 μm. Each pyramid-like unit 1 is pyramidal in shape, with an average top width of 2.5 μm and covered with protrusions 3 each 1.5 μm thick. Multiple pyramidal protrusions 4 are also provided within the light-trapping trench 2, with each protrusion 4 having a height of 3 μm. Multiple V-shaped refractive ribs 5 are distributed on the sidewalls, with a density of 18 ribs / μm. The light-trapping trench 2 on the silicon wafer 100 surface and the refractive ribs 5 on the sidewalls form a primary light trap, while the textured surface of the silicon wafer 100 surface forms a secondary light trap, improving light capture capability and reducing light reflection.
[0062] Example 5
[0063] This embodiment provides a silicon wafer 100 with a textured surface, having a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface connecting the first surface and the second surface respectively. Multiple pyramid-like units 1 are distributed on the first surface and the second surface, with adjacent pyramid-like units 1 spaced apart to form light-trapping trenches 2. The height of the pyramid-like unit 1 is 1 μm, the angle θ between the sidewall and the plane containing the surface of the silicon wafer 100 is 45°, and the distribution density of the pyramid-like units is 250,000 units / mm². 2 The distance between the bottoms of two adjacent pyramid-like units 1 is 0.8 μm. Each pyramid-like unit 1 is pyramidal in shape, with an average top width of 5 μm and tops covered with 0.5 μm thick protrusions 3 in a pyramidal shape, the diagonal length of the base of the pyramid being 0.5 μm. Multiple pyramidal protrusions 4 are also provided within the light-trapping trench 2, with a height of 0.2 μm for each protrusion. Multiple V-shaped refractive ribs 5 are distributed on the sidewalls, with a density of 16 ribs / μm. The light-trapping trench 2 on the silicon wafer 100 surface and the refractive ribs 5 on the sidewalls form a primary light trap, while the textured surface of the silicon wafer 100 surface forms a secondary light trap, improving light capture capability and reducing light reflection.
[0064] The applicant declares that the above are only specific embodiments of this utility model, but the protection scope of this utility model is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model fall within the protection and disclosure scope of this utility model.
Claims
1. A silicon wafer with a textured surface, characterized in that, The silicon wafer with the textured surface has a first surface and a second surface disposed opposite to each other, and a sidewall surface located between the first surface and the second surface, the sidewall surface being connected to the first surface and the second surface respectively; At least one of the first surface and the second surface has a plurality of pyramid-like units distributed thereon, and two adjacent pyramid-like units are spaced apart to form a light-trapping groove. The top of the pyramid-like unit has at least two protrusions. The sidewall has a plurality of refractive ribs distributed thereon.
2. The silicon wafer with a textured surface according to claim 1, characterized in that, The height of the pyramid-like unit is 1μm to 10μm.
3. The silicon wafer with a textured surface according to claim 1 or 2, characterized in that, The angle between the sidewall of the pyramid-like unit and the plane containing the silicon wafer surface is 15° to 90°.
4. The silicon wafer with a textured surface according to claim 1, characterized in that, The average width of the top of the pyramid-like unit is 2μm to 5μm.
5. The silicon wafer with a textured surface according to claim 1, characterized in that, The distance between two adjacent pyramid-like units is 0.2 μm to 1.5 μm.
6. The silicon wafer with a textured surface according to claim 1 or 5, characterized in that, The distribution density of the pyramid-like units is 150,000 to 250,000 per mm. 2 .
7. The silicon wafer with a textured surface according to claim 1, characterized in that, The height of the protrusion is 0.5μm to 1.5μm.
8. The silicon wafer with a textured surface according to claim 1 or 7, characterized in that, The protrusion is pyramidal in shape, and the diagonal length of the base of the protrusion is 0.5μm to 1.5μm.
9. The silicon wafer with a textured surface according to claim 1, characterized in that, The light-trapping groove is also provided with several protruding units, which are pyramid-shaped.
10. The silicon wafer with a textured surface according to claim 9, characterized in that, The ratio of the height of the pyramid-like unit to the height of the protruding unit is 3 to 5.
11. The silicon wafer with a textured surface according to claim 1, characterized in that, The refractive ribs have a "V" shaped structure.
12. The silicon wafer with a textured surface according to claim 1 or 11, characterized in that, The distribution density of the refractive ribs is 10~20 ribs / μm.
13. A solar cell, characterized in that, The solar cell comprises a silicon wafer with a textured surface as described in any one of claims 1-12.
14. A battery assembly, characterized in that, The battery assembly includes the solar cell of claim 13.
15. A photovoltaic system, characterized in that, The photovoltaic system includes the battery module as described in claim 14.
Citation Information
Patent Citations
Preparation method for texture structure of crystalline silicon solar cell
CN106340550A
Silicon wafer for preparing solar cell, preparation method of silicon wafer and photoelectric device
CN118825129A