A high capacity low loss wBGA package structure

Abstract

The utility model discloses a kind of high-capacity low-loss wBGA packaging structures, it is related to wBGA packaging technical field, include substrate, the middle part of substrate is equipped with window structure, to divide open substrate, the substrate on the both sides of window structure is connected by gold wire;Flip chip, two flip chips are respectively pasted on the bottom surface of the substrate on the both sides of window structure;TSV chip has multiple, multiple TSV chips are sequentially bonded and vertically stacked, the both ends of topmost layer TSV chip are respectively connected and fixed on two flip chips;The scheme is by being provided with two flip chips, compared with traditional structure directly increases the number of chips, improves storage capacity;Adopt the mode of vertically stacked multiple TSV chips, further increase the integration of chip, greatly improve the overall capacity;And through the connecting mode of copper column and gold wire, shorten signal transmission path, reduce the delay and power consumption loss of signal transmission.

Description

Technical Field

[0001] This utility model relates to a high-capacity, low-loss wBGA packaging structure, belonging to the field of wBGA packaging technology. Background Technology

[0002] The Windows-spherical matrix arrangement structure is a relatively traditional packaging structure. The conventional process involves attaching the chip to the back of the substrate with epoxy resin, wire bonding at the Windows section of the substrate, followed by injection molding, ball placement, cutting, and separation—a single type of packaging. With the advent of the information age and the diversification of market demands, there is an increasing need for high-capacity chips of the same size.

[0003] Traditional wBGA has a relatively simple structure, normally only one chip can be placed, and they are connected by wire bonding. The longer the wire, the slower the signal transmission, the longer the delay, and the greater the power loss. Moreover, the number of chips that can be stacked is limited, which cannot meet the higher capacity requirements. Utility Model Content

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a high-capacity, low-loss wBGA packaging structure.

[0005] To achieve the above objectives, the technical solution adopted by this utility model is: a high-capacity, low-loss wBGA packaging structure, comprising:

[0006] A substrate, wherein a window structure is provided in the middle of the substrate to divide the substrate, and the substrates on both sides of the window structure are connected by gold wires.

[0007] The flip chip is provided in two parts, and the two flip chips are respectively attached to the bottom surface of the substrate located on both sides of the window structure;

[0008] The TSV chip consists of multiple TSV chips, which are bonded together and stacked vertically. The two ends of the top TSV chip are respectively connected and fixed to two flip chips. A copper pillar is provided through the middle of the multiple TSV chips, and two gold wires extend from the top of the copper pillars. The two gold wires are respectively connected to the substrates on both sides of the window structure.

[0009] A heat sink is connected and fixed to the bottommost TSV chip, and the width of the heat sink is the same as that of the bottommost TSV chip.

[0010] Epoxy resin, located below the substrate, is used to encapsulate the TSV chip and flip chip on the substrate, and the bottom surface of the epoxy resin is flush with the bottom surface of the heat sink.

[0011] Preferably, the lower surface of the flip chip is coated with thermosetting adhesive, and the uppermost TSV chip is fixed to the flip chip by the thermosetting adhesive.

[0012] Preferably, adjacent TSV chips are fixed by a chip adhesive film.

[0013] Preferably, the lower surface of the bottommost TSV chip is coated with thermal silicone, and the heat sink is attached to the bottommost TSV chip through the thermal silicone.

[0014] Preferably, the heat sink is a ceramic copper-clad heat sink.

[0015] Preferably, the upper surface of the substrate is provided with a plurality of solder balls, and the solder balls located on both sides of the window structure are symmetrically distributed.

[0016] Due to the application of the above technical solution, this utility model has the following advantages compared with the prior art:

[0017] This utility model presents a high-capacity, low-loss wBGA packaging structure. By setting two flip chips, it directly increases the number of chips and improves the storage capacity compared to the traditional structure. By vertically stacking multiple TSV chips, it further increases the chip integration and greatly improves the overall capacity. Furthermore, by using copper pillars and gold wires for connection, it shortens the signal transmission path and reduces signal transmission delay and power consumption loss. Attached Figure Description

[0018] The technical solution of this utility model will be further described below with reference to the accompanying drawings:

[0019] Appendix Figure 1 This is a schematic diagram of a high-capacity, low-loss wBGA package structure according to the present invention.

[0020] In the diagram: 1. Substrate; 11. Window structure; 2. Flip chip; 21. Thermosetting adhesive; 3. TSV chip; 31. Copper pillar; 32. Thermal silicone; 4. Heat sink; 5. Epoxy resin; 6. Gold wire; 7. Chip bonding film; 8. Solder ball. Detailed Implementation

[0021] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0022] As attached Figure 1 As shown, the high-capacity, low-loss wBGA packaging structure of this utility model includes a substrate 1, a flip chip 2, a TSV chip 3, a heat sink 4, and epoxy resin 5.

[0023] A window structure 11 is provided in the middle of the substrate 1 to divide the substrate 1 into left and right parts. The substrate 1 on both sides of the window structure 11 is electrically connected by gold wires 6. At the same time, a plurality of solder balls 8 are provided on the upper surface of the substrate 1, and the solder balls 8 on both sides of the window structure 11 are symmetrically distributed. These solder balls 8 are used to realize the electrical connection between the packaging structure and the external circuit.

[0024] Two flip chips 2 are provided, and the two flip chips 2 are respectively attached to the bottom surface of the substrate 1 located on both sides of the window structure 11.

[0025] There are multiple TSV chips 3, which are sequentially bonded and vertically stacked. Adjacent TSV chips 3 are fixed by a chip adhesive film 7. The two ends of the top TSV chip 3 are respectively connected and fixed to two flip chips 2. Specifically, the lower surface of the flip chip 2 is coated with thermosetting adhesive 21, and the top TSV chip 3 is fixed to the flip chip 2 by the thermosetting adhesive 21 to achieve electrical connection between the TSV chip 3 and the flip chip 2.

[0026] In this embodiment, a copper pillar 31 is provided through the middle of multiple TSV chips 3 to realize the electrical connection between adjacent TSV chips 3. Two gold wires 6 extend from the top of the copper pillar 31, and the two gold wires 6 are respectively connected to the substrate 1 on both sides of the window structure 11, thereby establishing an electrical path between the stacked structure of TSV chips 3 and the substrate 1.

[0027] The heat sink 4 is connected and fixed to the bottom TSV chip 3, and the width of the heat sink 4 and the bottom TSV chip 3 are the same. In this embodiment, the heat sink 4 is a ceramic copper-clad heat sink. The bottom surface of the bottom TSV chip 3 is coated with thermal silicone 32. The heat sink 4 is attached to the bottom TSV chip 3 through the thermal silicone 32, which can ensure good heat dissipation effect and make the entire packaging structure more regular.

[0028] The epoxy resin 5 is located below the substrate 1 and is used to encapsulate the TSV chip 3 and the flip chip 2 on the substrate 1. After the epoxy resin 5 is cured, its bottom surface is flush with the bottom surface of the heat sink 4, forming a complete wBGA package structure.

[0029] The processing procedure for this utility model is as follows:

[0030] ① Wafer cutting:

[0031] TSV (Through Silicon Via) chips are cut using mechanical grinding and other methods to grind the wafer to a suitable thickness. The entire wafer is then cut into individual chips using a blade, ensuring that warpage is controlled within a reasonable range. For TSV chips 3, it should be considered that the filling material (such as copper) should not be conductive to or contaminate the substrate 1.

[0032] ② Flip Chip 2-Package:

[0033] The flip chip 2 is attached to the substrate 1.

[0034] ③ Mount TSV chip 3:

[0035] Apply thermosetting adhesive 21 to the surface of flip chip 2, and then mount the underlying TSV chip 3 onto the thermosetting adhesive 21.

[0036] ④ Surface mount multilayer TSV chip 3 and copper pillar 31 interconnect:

[0037] Multiple copper pillars 31 of TSV chips 3 are interconnected under the substrate 1 by CU-CU bonding to achieve vertical electrical interconnection; multiple TSV chips 3 are stacked using chip bonding film 7.

[0038] ⑤ TSV chip 3-wire bonding:

[0039] The top-layer TSV chip 3 is connected to the substrate 1 using traditional wire bonding.

[0040] ⑥ Wire bonding

[0041] The substrates 1 located on both sides of the window structure 11 are physically connected using gold wire 6, thereby making them conductive.

[0042] ⑦ Mount ceramic copper-clad heat sink 4:

[0043] Apply thermal silicone 32 to the lower surface of the bottom TSV chip 3, and then mount the ceramic copper-clad heat sink 4.

[0044] ⑧Surface encapsulation of substrate 1:

[0045] Using epoxy resin 5 and various additives (curing agents, modifiers, release agents, colorants, flame retardants, etc.), all chips and substrate 1 are wrapped in the molten state to provide physical and electrical protection and prevent external interference.

[0046] ⑨ Sanding epoxy resin 5:

[0047] Polish the epoxy resin 5 so that the bottom surface of the ceramic copper-clad heat sink 4 is flush with the bottom surface of the epoxy resin 5.

[0048] ⑩Planting balls:

[0049] Select a suitable solder ball 8 and solder the solder ball 8 onto the substrate 1.

[0050] ⑪ Cut the order:

[0051] The strip substrate 1 is cut into individual particles using a blade.

[0052] In summary, this invention increases the number of chips and improves storage capacity by using two flip chips 2 compared to traditional structures; it further increases chip integration and significantly improves overall capacity by vertically stacking multiple TSV chips 3; and it shortens the signal transmission path and reduces signal transmission delay and power consumption through the connection of copper pillars 31 and gold wires 6; in addition, the combined use of ceramic copper-clad heat sink 4 and thermal silicone 32 effectively improves heat dissipation efficiency, ensures chip stability during operation, and extends the service life of the package structure.

[0053] The above are merely specific application examples of this utility model and do not constitute any limitation on the scope of protection of this utility model; all technical solutions formed by equivalent transformation or equivalent substitution fall within the scope of protection of this utility model.

Claims

1. A high-capacity, low-loss wBGA package structure, characterized in that: Include A substrate (1) has a window structure (11) in the middle to divide the substrate (1), and the substrates (1) on both sides of the window structure (11) are connected by gold wires (6). Two flip chips (2) are provided, and the two flip chips (2) are respectively attached to the bottom surface of the substrate (1) located on both sides of the window structure (11); The TSV chip (3) has multiple TSV chips (3) that are bonded together and stacked vertically. The two ends of the top TSV chip (3) are respectively connected and fixed to two flip chips (2). A copper pillar (31) is provided through the middle of the multiple TSV chips (3). Two gold wires (6) extend from the top of the copper pillar (31) and are respectively connected to the substrate (1) on both sides of the window structure (11). Heat sink (4), which is connected and fixed to the bottom TSV chip (3), and the width of the heat sink (4) is the same as that of the bottom TSV chip (3); Epoxy resin (5) is located below the substrate (1) and is used to encapsulate the TSV chip (3) and flip chip (2) on the substrate (1), and the bottom surface of the epoxy resin (5) is flush with the bottom surface of the heat sink (4).

2. The high-capacity, low-loss wBGA packaging structure according to claim 1, characterized in that: The lower surface of the flip chip (2) is coated with thermosetting adhesive (21), and the uppermost TSV chip (3) is fixed to the flip chip (2) by the thermosetting adhesive (21).

3. The high-capacity, low-loss wBGA packaging structure according to claim 1, characterized in that: The adjacent TSV chips (3) are fixed by a chip adhesive film (7).

4. The high-capacity, low-loss wBGA packaging structure according to claim 1, characterized in that: The bottom surface of the TSV chip (3) at the bottom layer is coated with thermal silicone (32), and the heat sink (4) is attached to the TSV chip (3) at the bottom layer through the thermal silicone (32).

5. A high-capacity, low-loss wBGA packaging structure according to claim 1 or 4, characterized in that: The heat sink (4) is a ceramic copper-clad heat sink.

6. The high-capacity, low-loss wBGA packaging structure according to claim 1, characterized in that: The upper surface of the substrate (1) is provided with a plurality of solder balls (8), and the solder balls (8) located on both sides of the window structure (11) are symmetrically distributed.

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