Lattice array package module and communication module
Patent Information
- Application Number
- CN202522175735.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-14
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2035-10-14
AI Technical Summary
[0002]目前，LGA(Land Grid Array，栅格阵列)封装模块贴装在PCBA(Printed CircuitBoard Assembly，印刷电路板组装)板上时，高速信号的谐波易通过LGA封装模块的边缘与PCBA板之间的缝隙辐射出去，导致EMC(Electro Magnetic Compatibility，电磁兼容)测试不符合要求
[0005]本申请提供的栅格阵列封装模块，通过设置所述多个第二焊盘环绕所述多个第一焊盘，当所述栅格阵列封装模块贴装在电路板上时，可利用所述多个第二焊盘以及所述电路板上的与所述第二焊盘连接的焊盘形成电磁屏障，使得高速信号不易从所述封装模块本体与所述电路板之间的缝隙辐射出去，从而使得EMC测试能够符合要求。
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Figure CN224875396U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to a grid array packaging module and a communication module. Background Technology
[0002] Currently, when LGA (Land Grid Array) packaged modules are mounted on PCBA (Printed Circuit Board Assembly) boards, harmonics of high-speed signals can easily radiate out through the gap between the edge of the LGA packaged module and the PCBA board, causing EMC (Electro Magnetic Compatibility) tests to fail to meet requirements. Utility Model Content
[0003] To address the aforementioned technical problems, this application provides a grid array packaging module and a communication module.
[0004] This application provides a grid array packaging module, comprising a packaging module body, a plurality of first pads, and a plurality of second pads. A first target surface of the packaging module body includes a first pad area and a second pad area, the second pad area surrounding the first pad area. The plurality of first pads are disposed in the first pad area, and the plurality of first pads include high-speed signal pads. The plurality of second pads are disposed in the second pad area and surround the plurality of first pads, wherein the second pads are different from the first pads.
[0005] The grid array packaging module provided in this application, by setting the plurality of second pads around the plurality of first pads, when the grid array packaging module is mounted on the circuit board, can use the plurality of second pads and the pads on the circuit board connected to the second pads to form an electromagnetic barrier, making it difficult for high-speed signals to radiate out from the gap between the packaging module body and the circuit board, thereby enabling EMC testing to meet the requirements.
[0006] The second aspect of this application provides a communication module, which includes a circuit board and a grid array packaging module provided in the first aspect, wherein the grid array packaging module is electrically connected to the circuit board.
[0007] The communication module provided in the second aspect above has the same features as the grid array encapsulation module provided in the first aspect above, and therefore can achieve the same or corresponding beneficial effects as the method provided in the first aspect, which will not be elaborated here. Attached Figure Description
[0008] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0009] Figure 1 This is a schematic diagram showing the distribution of multiple pads in an LGA package module in related technologies.
[0010] Figure 2 This is a schematic diagram of an LGA packaged module mounted on a PCBA board in related technologies.
[0011] Figure 3 This is a schematic diagram of the grid array encapsulation module in the first embodiment of this application.
[0012] Figure 4 This is a schematic diagram of the grid array encapsulation module in the second embodiment of this application.
[0013] Figure 5 This is a schematic diagram of the grid array packaging module in the third embodiment of this application.
[0014] Figure 6 This is a schematic diagram of the grid array packaging module in the fourth embodiment of this application.
[0015] Figure 7 This is a structural block diagram of the communication module in some embodiments of this application.
[0016] Figure 8 This is a schematic diagram of the circuit board structure in the first embodiment of this application.
[0017] Figure 9 This is a schematic diagram of the circuit board structure in the second embodiment of this application.
[0018] Figure 10 This is a schematic diagram of the circuit board structure in the third embodiment of this application.
[0019] Figure 11 This is a schematic diagram of the circuit board structure in the fourth embodiment of this application. Detailed Implementation
[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0021] In the description of this application, the terms "first," "second," "third," "fourth," etc., are used to distinguish different objects, rather than to describe a specific order, and therefore should not be construed as limiting this application.
[0022] In the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, a / b can mean a or b. The "and / or" in the text is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, a and / or b can mean: a exists alone, a and b exist simultaneously, and b exists alone. In addition, in the description of the embodiments of this application, "multiple" means two or more, and "multiple types" means two or more.
[0023] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The representation of this phrase in various locations throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0024] Please see Figure 1 and Figure 2 , Figure 1 This is a schematic diagram showing the distribution of multiple pads 2 in an LGA package module 1 in related technologies. Figure 2 This is a schematic diagram showing the LGA package module 1 mounted on a PCBA board 3 in the relevant technology. Figure 1 As shown, the LGA package module 1 has multiple pads 2, including multiple reference high-speed signal pads 4 and multiple other types of pads 5. Some or all of the multiple reference high-speed signal pads 4 are located at the edge of the LGA package module 1, some of the other types of pads 5 are located at the edge of the LGA package module 1, and the remaining other types of pads 5 are located in the central area of the LGA package module 1. Figure 2 As shown, when the LGA package module 1 is mounted on the PCBA board 3, since the reference high-speed signal pad 4 is located at the edge of the LGA package module 1, harmonics of high-speed signals (such as SGMII, PCIe, USB 3.0) can easily radiate out through the gap between the edge of the LGA package module 1 and the PCBA board 3. Figure 1 (As shown by the thick arrow), this caused the EMC test to fail to meet the requirements.
[0025] In related technologies, an exposed copper area is typically set at the edge of the LGA package module 1. This area is soldered to the PCBA board 3 to form a grounding barrier, preventing harmonics of high-speed signals from radiating out through the gap between the edge of the LGA package module 1 and the PCBA board 3. However, this exposed copper area at the edge of the LGA package module 1 hinders the surface routing of other types of pads 5 located at the edge of the LGA package module 1. Other types of pads 5 can only bypass this exposed copper area by drilling holes inside the LGA package module 1 and routing through the layers. This greatly limits the layout and routing of the LGA package module 1. In addition, excessive drilling will damage the integrity of the surface ground, thereby affecting the performance of the LGA package module 1 and increasing manufacturing costs.
[0026] This application provides a grid array packaging module and a communication module. The grid array packaging module and the communication module can not only prevent the harmonics of high-speed signals from radiating out through the gap between the edge of the grid array packaging module and the circuit board, but also will not affect the surface traces of the pads outside the high-speed signal pads.
[0027] The following describes the grid array encapsulation module provided in the embodiments of this application.
[0028] Please see Figure 3 , Figure 3 This is a schematic diagram of the grid array packaging module 100 in the first embodiment of this application. The grid array packaging module 100 includes a packaging module body 10, a plurality of first pads 20, and a plurality of second pads 30. The first target surface 11 of the packaging module body 10 includes a first pad area 111 and a second pad area 112, with the second pad area 112 surrounding the first pad area 111. The plurality of first pads 20 are disposed in the first pad area 111, and the plurality of first pads 20 include high-speed signal pads. The plurality of second pads 30 are disposed in the second pad area 112 and surround the plurality of first pads 20, and the plurality of second pads 30 are spaced apart from the plurality of first pads 20. The second pads 30 differ from the first pads 20, that is, the plurality of second pads 30 do not include high-speed signal pads.
[0029] The grid array packaging module 100 provided in this application embodiment, by setting the plurality of second pads 30 around the plurality of first pads 20, can utilize the plurality of second pads 30 to form an electromagnetic barrier, making it difficult for harmonics of high-speed signals to radiate out from the gap between the packaging module body 10 and the circuit board, thereby ensuring that EMC testing meets requirements. Furthermore, the grid array packaging module 100 provided in this application embodiment does not require exposed copper areas at the edges of the packaging module body 10 to form a grounding barrier, thus not affecting the surface traces of the second pads 30, giving the grid array packaging module 100 a relatively complete surface ground. If harmonics of high-speed signals radiate out, they can interfere with communication signals. For example, the frequency of the harmonic signals may be close to the WIFI 5G band or cellular band, interfering with WIFI and cellular communications.
[0030] Among them, such as Figure 3 As shown, the second pad area 112 can be closed around the first pad area 111, and the plurality of second pads 30 can be closed around the plurality of first pads 20. Alternatively, the second pad area 112 can be open around the first pad area 111, and the plurality of second pads 30 can be open around the plurality of first pads 20.
[0031] Please see Figure 4 and Figure 5 , Figure 4 This is a schematic diagram of the grid array packaging module 100 in the second embodiment of this application. Figure 5 This is a schematic diagram of the grid array packaging module 100 in the third embodiment of this application. In some embodiments, such as... Figure 4 and Figure 5 As shown, the grid array packaging module 100 further includes a first ground layer 41, which is disposed on the first target surface 11 and surrounds the plurality of first pads 20 and the first pad area 111.
[0032] In some cases, when the grid array package module 100 is mounted on a circuit board, the gap between the grid array package module 100 and the circuit board is relatively large. By setting the first ground layer 41, the high-speed signal can be electromagnetically shielded by electrically connecting the first ground layer 41 to the ground plane on the circuit board. This further prevents harmonics of the high-speed signal from radiating out from the gap between the package module body 10 and the circuit board, thereby ensuring that the EMC test meets the requirements. When the gap between the grid array package module 100 and the circuit board is small, the first ground layer 41 may not be set. However, if a better shielding effect is desired, the first ground layer 41 may be set.
[0033] Among them, such as Figure 4As shown, the first ground layer 41 encloses the plurality of first pads 20. Alternatively, as... Figure 5 As shown, the first ground layer 41 is openly surrounding the plurality of first pads 20.
[0034] In some embodiments, the first ground layer 41 is made of a conductive material, including metals such as copper or other metallic materials.
[0035] In some embodiments, such as Figure 4 and Figure 5 As shown, the first ground layer 41 is located between the first pad area 111 and the second pad area 112, and is spaced apart from the plurality of first pads 20 and the plurality of second pads 30. Therefore, the first ground layer 41 will not affect the surface traces of the second pads 30.
[0036] Please see Figure 6 , Figure 6 This is a schematic diagram of the grid array packaging module 100 in the fourth embodiment of this application. In some embodiments, the second pad area 112 is an open ring, and the second pad area 112 has a first notch 112a. The grid array packaging module 100 includes a second ground layer 42, which is disposed at the first notch 112a and spaced apart from the plurality of second pads 30. The second ground layer 42 and the second pad area 112 together enclose the first pad area 111 and the plurality of first pads 20. That is, the second ground layer 42 and the second pad area 112 together form an enclosing structure, and the plurality of first pads 20 are located within the enclosing structure.
[0037] Thus, the high-speed signal is shielded by the combination of the multiple second pads 30 and the second ground layer 42, preventing the harmonics of the high-speed signal from radiating out from the gap between the package module body 10 and the circuit board.
[0038] The second grounding layer 42 is made of a conductive material, including metals such as copper or other metallic materials.
[0039] In some embodiments, such as Figure 3 As shown, the plurality of second pads 30 are divided into a plurality of pads along a first direction (e.g., ...). Figure 3 The second pad group 30a is arranged in the Y1 direction (as shown), and each second pad group 30a includes multiple pads arranged along the second direction (e.g., Y1 direction). Figure 3 The second pads 30 arranged in the X1 direction shown are spaced apart along the first direction in the projection of the second pads 30 in two adjacent second pad groups 30a, that is, the second pads 30 in the two adjacent second pad groups 30a are staggered, and the second direction is perpendicular to the first direction.
[0040] By setting the second pads 30 in two adjacent second pad groups 30a to be staggered, the straightness and continuity of the high-speed signal radiation path can be disrupted, the tortuosity of the radiation path can be increased, and energy reflection and absorption can be enhanced, thereby increasing the difficulty and loss of the high-speed signal harmonics to radiate outward, which is beneficial to blocking the outward radiation of high-speed signal harmonics.
[0041] The number of second pads 30 in each second pad group 30a may be the same or different.
[0042] In some embodiments, the plurality of first pads 20 are divided into a plurality of first pad groups arranged along the first direction, and each first pad group includes a plurality of first pads 20 arranged along the second direction, with the projections of two adjacent first pad groups along the first direction spaced apart from each other.
[0043] In other embodiments, the projections of two adjacent first pad groups along the first direction partially or completely overlap.
[0044] The number of first pads 20 in each first pad group may be the same or different.
[0045] In some embodiments, the first pad area 111 is located in the central region of the first target surface 11, and the second pad area 112 is located in the peripheral region of the first target surface 11. The plurality of first pads 20 are located in the central region of the first target surface 11, and the plurality of second pads 30 are located in the peripheral region of the first target surface 11. Thus, the space of the packaging module body 10 can be fully utilized.
[0046] In some embodiments, the function of the first pad 20 is different from that of the second pad 30.
[0047] In some embodiments, the high-speed signal pad is used to transmit high-frequency, high-speed signals, such as SGMII signals, PCIe signals, CLK signals, USXGMII signals, USB 3.0 signals, etc. The high-speed signal pad can also be used to transmit other types of signals.
[0048] In some embodiments, the plurality of second pads 30 include one or more of the following: low-speed signal pads, power supply pads, ground pads, RF antenna pads, heat dissipation pads, NC pads, test pads, and mechanical positioning pads. Low-speed signal pads are used to transmit lower-frequency signals, general purpose input / output (GPIO), control signals, analog signals, configuration signals, etc. NC pads are connectionless pads, which are reserved pads designed on the package module body 10 and are not internally connected to any circuit. Mechanical positioning pads are not used for electrical connections; they are used to assist in positioning. The plurality of second pads 30 may also include other types of pads.
[0049] Among them, the low-speed signal pads, power supply pads, RF antenna pads, test pads and other pads transmit signals with low frequency and low energy. The grounding pads, heat dissipation pads, NC pads, mechanical positioning pads and other pads have no electrical connection. Therefore, these pads will not cause interference. Thus, these pads can be used to effectively block the harmonics of high-speed signals.
[0050] Please see Figure 7 , Figure 7 This is a structural block diagram of a communication module 300 in some embodiments of this application. The communication module 300 includes a circuit board 200 and a grid array packaging module 100 as described in any of the foregoing embodiments.
[0051] Please see Figure 8 , Figure 8 This is a schematic diagram of the circuit board 200 in the first embodiment of this application. In some embodiments, the circuit board 200 includes a substrate 50, a plurality of third pads 60, and a plurality of fourth pads 70. The second target surface 51 of the substrate 50 includes a third pad area 511 and a fourth pad area 512 surrounding the third pad area 511. The plurality of third pads 60 are disposed in the third pad area 511, and the plurality of fourth pads 70 are disposed in the fourth pad area 512 and surround the plurality of third pads 60. The plurality of fourth pads 70 are spaced apart from the plurality of third pads 60. The plurality of third pads 60 are electrically connected to the plurality of first pads 20 in a one-to-one correspondence, and the plurality of fourth pads 70 are electrically connected to at least a portion of the plurality of second pads 30 in a one-to-one correspondence.
[0052] By electrically connecting the plurality of third pads 60 to the plurality of first pads 20 in a one-to-one correspondence, and by electrically connecting the plurality of fourth pads 70 to at least a portion of the plurality of second pads 30 in a one-to-one correspondence, the corresponding electrical functions of the communication module 300 can be realized. Furthermore, the second pads 30 and the fourth pads 70 electrically connected to the second pads 30 can form an electromagnetic barrier, blocking harmonics of high-speed signals from radiating out from the gap between the grid array package module 100 and the circuit board 200.
[0053] Among them, such as Figure 8 As shown, the fourth pad area 512 can surround the third pad area 511 in a closed manner, and the plurality of fourth pads 70 can surround the plurality of third pads 60 in a closed manner. Alternatively, the fourth pad area 512 can surround the third pad area 511 in an open manner, and the plurality of fourth pads 70 can surround the plurality of third pads 60 in an open manner.
[0054] Please see Figure 9 and Figure 10 , Figure 9This is a schematic diagram of the circuit board 200 in the second embodiment of this application. Figure 10 This is a schematic diagram of the circuit board 200 in the third embodiment of this application. In some embodiments, such as... Figure 9 and Figure 10 As shown, the circuit board 200 includes a third ground layer 81, which is disposed on the second target surface 51 and surrounds the plurality of third pads 60 and the third pad area 511. The third ground layer 81 is electrically connected to the first ground layer 41 in the aforementioned second or third embodiment. Specifically, the third ground layer 81 in both the second and third embodiments can be electrically connected to the first ground layer 41 in the aforementioned second or third embodiment.
[0055] By electrically connecting the first ground layer 41 and the third ground layer 81 to form a closed loop, the harmonics of the high-speed signal can be conducted to ground, thereby shielding the high-speed signal and preventing its harmonics from radiating out from the gap between the grid array packaging module 100 and the circuit board 200. As mentioned above, when the gap between the grid array packaging module 100 and the circuit board 200 is small, the third ground layer 81 may not be provided; however, for better shielding, the third ground layer 81 may be provided.
[0056] Among them, such as Figure 9 As shown, the third ground layer 81 encloses the plurality of third pads 60 and the third pad area 511 in a closed manner. Alternatively, as... Figure 10 As shown, the third ground layer 81 is openly surrounding the plurality of third pads 60 and the third pad area 511.
[0057] In some embodiments, the third ground layer 81 is made of a conductive material, including metals such as copper or other metallic materials.
[0058] The circuit board 200 can be a PCBA board or other types of circuit boards.
[0059] In some embodiments, such as Figure 9 and Figure 10 As shown, the third ground layer 81 is located between the third pad area 511 and the fourth pad area 512, and is spaced apart from the plurality of third pads 60 and the plurality of fourth pads 70, thereby facilitating the electrical connection between the third ground layer 81 and the first ground layer 41.
[0060] In some embodiments, as previously described, the second pad area 112 is an open ring shape, the second pad area 112 has a first notch 112a, and the second ground layer 42 is disposed at the first notch 112a and spaced apart from the plurality of second pad areas 112. The second ground layer 42 and the second pad areas 112 together enclose the first pad area 111 and the plurality of first pads 20. Please refer to [link to previous document]. Figure 11 , Figure 11 This is a schematic diagram of the circuit board 200 in the fourth embodiment of this application. Figure 11 As shown, the fourth pad area 512 is an open ring shape, and has a second notch 512a. The circuit board 200 includes a fourth ground layer 82, which is located at the second notch 512a and spaced apart from the plurality of fourth pads 70. The fourth ground layer 82 and the fourth pad area 512 together enclose the third pad area 511 and the plurality of third pads 60, that is, the fourth ground layer 82 and the fourth pad area 512 together form an enclosing structure, and the plurality of third pads 60 are located within this enclosing structure. The second ground layer 42 is electrically connected to the fourth ground layer 82 to form a closed loop.
[0061] By electrically connecting the second ground layer 42 and the fourth ground layer 82 to form a closed loop, the harmonics of the high-speed signal can be conducted to the ground, thereby shielding the high-speed signal and preventing the harmonics of the high-speed signal from radiating out from the gap between the grid array packaging module 100 and the circuit board 200.
[0062] In some embodiments, such as Figure 8 As shown, the plurality of fourth pads 70 are divided into a plurality of third-direction (e.g.) Figure 8 The fourth pad group 70a is arranged in the Y2 direction (as shown), and each fourth pad group 70a includes multiple pads arranged along the fourth direction (e.g., Y2 direction). Figure 3 The fourth pads 70 arranged in the X2 direction (as shown) are spaced apart from each other along the third direction, i.e., the fourth pads 70 in adjacent groups of four fourth pads 70a are staggered. The fourth direction is perpendicular to the third direction. This facilitates a one-to-one electrical connection between the plurality of fourth pads 70 and some or all of the plurality of second pads 30.
[0063] The number of fourth pads 70 in each fourth pad group 70a may be the same or different.
[0064] In some embodiments, the plurality of third pads 60 are divided into a plurality of third pad groups 60a arranged along the first direction, each third pad group 60a including a plurality of third pads 60 arranged along the fourth direction, and adjacent third pad groups 60a are spaced apart from each other by projection along the third direction.
[0065] In other embodiments, the projections of two adjacent third pad groups 60a along the third direction partially or completely overlap.
[0066] The number of third pads 60 in each third pad group 60a may be the same or different.
[0067] In some embodiments, the third pad area 511 is located in the central region of the second target surface 51, and the fourth pad area 512 is located in the peripheral region of the second target surface 51. The plurality of third pads 60 are located in the central region of the second target surface 51, and the plurality of fourth pads 70 are located in the peripheral region of the second target surface 51. This facilitates electrical connection between the first pad 20 and the third pad 60, and between the second pad 30 and the fourth pad 70.
[0068] It should be noted that a more detailed description of the communication module 300 can be found in the various embodiments of the aforementioned grid array packaging module 100, and the contents of the communication module 300 and the aforementioned grid array packaging module 100 can also be referred to each other.
[0069] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the grid array packaging module 100, the circuit board 200, and the communication module 300. In other embodiments of this application, the grid array packaging module 100, the circuit board 200, and the communication module 300 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware. In the above method embodiments, the execution order of the steps may be adjusted as needed.
[0070] The above are the implementation methods of the embodiments of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the embodiments of this application, and these improvements and modifications are also considered to be within the protection scope of this application.
Claims
1. A grid array packaging module, characterized in that, The grid array encapsulation module includes: The packaging module body has a first target surface including a first pad area and a second pad area, wherein the second pad area surrounds the first pad area. A plurality of first pads are provided in the first pad area, the plurality of first pads including high-speed signal pads; A plurality of second pads are provided in the second pad area and surround the plurality of first pads, wherein the second pads are different from the first pads.
2. The grid array packaging module according to claim 1, characterized in that, The grid array packaging module further includes a first ground layer, which is disposed on the first target surface and surrounds the plurality of first pads.
3. The grid array packaging module according to claim 2, characterized in that, The first grounding layer is located between the first pad area and the second pad area.
4. The grid array packaging module according to claim 1, characterized in that, The second pad area is an open ring shape and has a first notch. The grid array package module also includes a second ground layer. The second ground layer is located at the first notch and is spaced apart from the plurality of second pads. The second ground layer and the second pad area together enclose the first pad area and the plurality of first pads.
5. The grid array packaging module according to any one of claims 1-4, characterized in that, The plurality of second pads are divided into a plurality of second pad groups arranged along a first direction. Each second pad group includes a plurality of second pads arranged along a second direction. The projections of the second pads in two adjacent second pad groups along the first direction are spaced apart from each other. The second direction is perpendicular to the first direction.
6. A communication module, characterized in that, The communication module includes a circuit board and a grid array packaging module as described in any one of claims 1-5, wherein the grid array packaging module is electrically connected to the circuit board.
7. The communication module according to claim 6, characterized in that, The circuit board includes a substrate, a plurality of third pads and a plurality of fourth pads. The second target surface of the substrate includes a third pad area and a fourth pad area surrounding the third pad area. The plurality of third pads are disposed in the third pad area, and the plurality of fourth pads are disposed in the fourth pad area and surround the plurality of third pads. The plurality of third pads are electrically connected to the plurality of first pads in a one-to-one correspondence, and the plurality of fourth pads are electrically connected to at least a portion of the plurality of second pads in a one-to-one correspondence.
8. The communication module according to claim 7, characterized in that, The grid array packaging module includes a first ground layer, which is disposed on the first target surface and surrounds the plurality of first pads. The circuit board includes a third ground layer, which is disposed on the second target surface and surrounds the plurality of third pads. The third ground layer is electrically connected to the first ground layer.
9. The communication module according to claim 8, characterized in that, The third grounding layer is located between the third pad area and the fourth pad area.
10. The communication module according to claim 7, characterized in that, The second pad area is an open ring shape with a first notch. The grid array packaging module further includes a second ground layer, which is located at the first notch and spaced apart from the plurality of second pads. The second ground layer and the second pad area together enclose the first pad area and the plurality of first pads. The fourth pad area is an open ring shape with a second notch. The circuit board includes a fourth ground layer, which is located at the second notch and spaced apart from the plurality of fourth pads. The fourth ground layer and the fourth pad area together enclose the third pad area and the plurality of third pads. The second ground layer and the fourth ground layer are electrically connected.