A fault simulation quantity injection test circuit and an ESSD test device

Abstract

The utility model discloses a kind of fault analog quantity injection test circuit and ESSD testing device, wherein, fault analog quantity injection test circuit is used to access the loop between target input source and target receiving end, it includes: voltage bias module, access the loop between target input source and target receiving end, for the loop voltage between target input source and target receiving end is pulled up or pulled down;Switching tube device, its first end is accessed the loop between target input source and target receiving end by voltage bias module, its second end is grounded;Signal generation module is connected to the third end of switching tube device, for generating driving signal to drive switching tube device to be on-off to make target input source and target receiving end between loop form target fault waveform signal.The circuit of the application can carry out fault analog quantity injection test to circuit or device, so as to verify the receiving capacity and performance of the measured object to fault signal injection, test is convenient and high efficiency.

Description

Technical Field

[0001] This utility model relates to the field of analog signal injection testing technology, and in particular to a fault analog signal injection test circuit and an ESSD test device. Background Technology

[0002] Currently, in circuit systems, signal variations can sometimes cause irreversible damage to devices. Therefore, some circuits often require testing the devices' ability to withstand signal variations. This typically involves verifying the signal input and output of the equipment to evaluate the ability of each device in the circuit to receive analog signals. However, existing practices often involve manually measuring the voltage or current of devices, which is a complex testing process and is susceptible to interference that can lead to inaccurate test data. Therefore, traditional methods have many limitations and it is difficult to guarantee the accuracy of the tests. Utility Model Content

[0003] This utility model provides a fault analog injection test circuit and an ESSD test device, which solves the problems of complexity and poor accuracy of traditional test methods.

[0004] In a first aspect, this utility model provides a fault analog quantity injection test circuit for connecting to the loop between a target input source and a target receiver. The circuit includes: a voltage biasing module connected to the loop between the target input source and the target receiver, used to pull up or down the loop voltage between the target input source and the target receiver; a switching device, with its first terminal connected to the loop between the target input source and the target receiver, and its second terminal grounded; and a signal generation module connected to the third terminal of the switching device, used to generate a driving signal to drive the switching device to switch on and off, thereby forming a target fault waveform signal on the loop between the target input source and the target receiver.

[0005] Furthermore, the voltage bias module includes a pull-up unit and a first switch. The first end of the pull-up unit is connected between the target input source and the target receiver through the first switch, and the second end of the pull-up unit is connected to a power supply.

[0006] Furthermore, the pull-up unit includes a first variable resistor, one end of which is connected to the power supply, and the other end is connected to the loop between the target input source and the target receiver.

[0007] Furthermore, the voltage bias module also includes a pull-down unit, the first end of which is connected between the target input source and the target receiver, and the second end of which is connected to the first end of the switching device.

[0008] Furthermore, the pull-down unit includes a second variable resistor, one end of which is connected to the first terminal of the switching transistor device, and the other end is connected to the loop between the target input source and the target receiver.

[0009] Furthermore, the switching device is configured as a MOS transistor, with the first terminal of the switching device being the drain, the second terminal being the source, and the third terminal being the drain.

[0010] Furthermore, the switching device is configured as a HEMT transistor, with the first terminal being the drain, the second terminal being the source, and the third terminal being the gate.

[0011] Furthermore, the switching device is configured as a transistor, with the first terminal being the collector, the second terminal being the emitter, and the third terminal being the base.

[0012] Furthermore, the signal generation module is a signal generator.

[0013] Secondly, embodiments of the present invention provide an ESSD testing device, which includes the fault analog quantity injection test circuit described in the first aspect above.

[0014] This utility model provides a fault analog signal injection test circuit and an ESSD test device. The fault analog signal injection test circuit is used to connect to the loop between a target input source and a target receiver. It includes: a voltage bias module connected to the loop between the target input source and the target receiver, used to pull up or down the loop voltage between the target input source and the target receiver; a switching device, with its first terminal connected to the loop between the target input source and the target receiver, and its second terminal grounded; and a signal generation module connected to the third terminal of the switching device, used to generate a drive signal to drive the switching device to switch on and off, so that a target fault waveform signal is formed on the loop between the target input source and the target receiver. The circuit of this application can perform fault analog signal injection tests on circuits or devices, thereby verifying the receiving capability and performance of the tested object to fault signal injection. Compared with traditional testing methods, it is more convenient and has higher testing efficiency. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 A circuit diagram of a fault analog quantity injection test circuit provided in an embodiment of this utility model; Figure 2 A circuit diagram of a fault analog quantity injection test circuit provided for another embodiment of this utility model; The labels for the attached figures are as follows: 1. Target input source; 2. Target receiver; 10. Voltage bias module; 11. Pull-up unit; 12. Pull-down unit; 20. Signal generation module. Detailed Implementation

[0017] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0018] The directional terms used in this invention, such as "up," "down," "front," "back," "left," "right," "inner," "outer," and "side," are merely for reference to the accompanying drawings. Therefore, the directional terms used are for explanation and understanding of this invention, and not for limiting it. Furthermore, in the accompanying drawings, structures that are similar or identical are indicated by the same reference numerals.

[0019] Reference Figure 1 and Figure 2 This utility model provides a fault analog quantity injection test circuit, which is used to connect to the loop between the target input source 1 and the target receiver 2. The fault analog quantity injection test circuit includes: a voltage bias module 10, which is connected to the loop between the target input source 1 and the target receiver 2, and is used to pull up or pull down the loop voltage between the target input source 1 and the target receiver 2; a switching device Q1, the first terminal of which is connected to the loop between the target input source 1 and the target receiver 2, and the second terminal of which is grounded; and a signal generation module 20, which is connected to the third terminal of the switching device Q1, and is used to generate a driving signal to drive the switching device Q1 to switch on and off so that a target fault waveform signal is formed on the loop between the target input source 1 and the target receiver 2.

[0020] In practical implementation, this circuit is mainly used to perform fault analog signal injection tests on circuits or devices with analog inputs, verifying the ability of the tested object to receive fault analog signals and evaluating its performance when receiving fault analog signals. For example, the tested object can be an ESSD (Enterprise Solid-State Drive) product. ESSD products with DDR4 typically require a VIH (Voltage Input High) of 700mV for the address signal pin. This circuit can verify whether the ESSD product can still operate normally when a voltage of VIH of 750mV, 700mV, or lower is input to this address signal pin, thereby evaluating its performance. The fault analog signal injection test circuit is connected to the loop between target input source 1 and target receiver 2. Target input source 1 can be the front-end analog output circuit or device of the tested object, and target receiver 2 can be the port of the tested object that receives analog signals. For example, when the tested object is an ESSD product, target input source 1 can be a circuit or device that outputs analog test signals to the pins, and target receiver 2 can be a pin of an inner module.

[0021] Specifically, the fault analog signal injection test circuit mainly consists of a voltage bias module 10, a switching device Q1, and a signal generation module 20. The voltage bias module 10 is connected to the loop between the target input source 1 and the target receiver 2, used to pull up or down the loop voltage between them. Depending on the requirements, pulling up the voltage achieves the purpose of raising the analog signal and injecting a fault waveform, while pulling down the voltage achieves the purpose of lowering the analog signal and injecting a fault waveform. The switching device Q1 has three terminals, which are three different pins. The first terminal of the switching device Q1 is connected to the loop between the target input source 1 and the target receiver 2, and the second terminal is connected to ground. The switching device Q1 can be a MOSFET, bipolar junction transistor (BJT), HEMT, or other transistor capable of high-speed or low-speed switching. The third terminal of the switching device Q1 serves as a control terminal and is connected to the signal generation module 20. The signal generation module 20 can generate a drive signal to drive the switching device Q1 to switch on and off, thereby forming a target fault waveform signal on the loop between the target input source 1 and the target receiver 2. Specifically, the drive signal generated by the signal generation module 20 is typically a PWM signal. When the switching device Q1 is turned on, the loop between the target input source 1 and the target receiver 2 can be grounded through the switching device Q1. When the switching device Q1 is turned on, the loop voltage between the target input source 1 and the target receiver 2 is floating. Therefore, by configuring the target frequency or duty cycle of the drive signal, the switching device Q1 can be controlled to be grounded according to the configured frequency or duty cycle, thereby forming a corresponding target fault waveform signal on the loop between the target input source 1 and the target receiver 2. This signal acts on the object under test. Furthermore, by cooperating with the voltage bias module 10 to pull up and pull down the loop voltage, three types of fault analog quantity injection tests can be achieved: injected analog signal ground fault input, injected analog signal level high + ground fault input, and injected analog signal level low + ground fault input. This verifies the receiving capability and performance of the object under test to the injected fault analog quantity signal.

[0022] In one embodiment, reference is made to Figure 1 and Figure 2The voltage biasing module 10 includes a pull-up unit 11 and a first switch S1. The first terminal of the pull-up unit 11 is connected between the target input source 1 and the target receiving terminal 2 via the first switch S1. The second terminal of the pull-up unit 11 is connected to the power supply VDD. The pull-up unit 11 is used to cooperate with the closing of the first switch S1 and the opening of the switching device Q1 to pull up the loop voltage between the target input source 1 and the target receiving terminal 2. In specific implementations, the pull-up unit 11 can be designed with a fixed resistor or a variable resistor. The power supply VDD is a low-voltage DC power supply, and a suitable voltage value can be set according to test requirements. The first switch S1 can be a relay or other type of switch. When the first switch S1 is closed, the loop between the target input source 1 and the target receiving terminal 2 is connected to the power supply VDD via the pull-up unit 11, thereby pulling up the loop voltage between the target input source 1 and the target receiving terminal 2.

[0023] Furthermore, referring to Figure 1 and Figure 2 The pull-up unit 11 includes a first variable resistor R1. One end of the first variable resistor R1 is connected to the power supply VDD, and the other end is connected to the loop between the target input source 1 and the target receiver 2. In a specific implementation, the first switch S1 is closed, and then the signal generation module 20 configures a drive signal of a specific frequency or duty cycle to control the switching device Q1 to be grounded according to the corresponding frequency or duty cycle, thereby achieving the purpose of pulling up the analog signal and injecting the target fault waveform signal.

[0024] In one embodiment, reference is made to Figure 1 and Figure 2 The voltage bias module 10 further includes a pull-down unit 12. The first end of the pull-down unit 12 is connected between the target input source 1 and the target receiver 2, and the second end is connected to the first end of the switching device Q1. In a specific implementation, the pull-down unit 12 can be designed using a variable resistor. When the first switch S1 is turned off and the switching device Q1 is in the on state, the loop between the target input source 1 and the target receiver 2 is grounded through the switching device Q1, which can pull down the loop voltage between the target input source 1 and the target receiver 2.

[0025] In one embodiment, reference is made to Figure 1 and Figure 2The pull-down unit 12 includes a second variable resistor R2. One end of the second variable resistor R2 is connected to the first terminal of the switching device Q1, and the other end is connected to the loop between the target input source 1 and the target receiving terminal 2. Specifically, after the first switch S1 is disconnected, when the second variable resistor R2 is set to 0, the signal generation module 20 configures a drive signal of a specific frequency or duty cycle to control the switching device Q1 to ground according to the corresponding frequency or duty cycle, achieving the purpose of injecting an analog signal into the target fault waveform signal for grounding testing. When the second variable resistor R2 is set to any value other than 0, the signal generation module 20 configures a drive signal of a specific frequency or duty cycle to control the switching device Q1 to ground according to the corresponding frequency or duty cycle, achieving the purpose of pulling an analog signal low and injecting it into the target fault waveform signal for grounding testing.

[0026] In one embodiment, reference is made to Figure 1 The switching device Q1 is a MOSFET, with its first terminal being the drain, second terminal the source, and third terminal the gate. Specifically, Q1 is designed as a MOSFET, with its first terminal being the drain, second terminal the source, and third terminal the gate. Therefore, the gate of the MOSFET is connected to the signal generation module 20, the drain is connected to the loop between the target input source 1 and the target receiver 2, and the source is grounded. The use of a MOSFET allows for analog signal injection testing in high-speed switching scenarios.

[0027] In one embodiment, reference is made to Figure 1 The switching device Q1 is configured as a HEMT (High Electron Mobility Transistor). The first terminal of Q1 is the drain, the second terminal is the source, and the third terminal is the gate. Specifically, the switching device Q1 is designed as a HEMT, where the first terminal is the drain, the second terminal is the source, and the third terminal is the gate. Therefore, the gate of the HEMT is connected to the signal generation module 20, the drain is connected to the loop between the target input source 1 and the target receiver 2, and the source is grounded. The use of an HEMT allows for analog signal injection testing under high-speed switching scenarios.

[0028] In one embodiment, reference is made to Figure 2The switching device Q1 is a transistor, with its first terminal being the collector, second terminal the emitter, and third terminal the base. Specifically, the switching device Q1 is designed as a transistor, with its first terminal being the collector, second terminal the emitter, and third terminal the base. Therefore, the base of the transistor is connected to the signal generation module 20, the collector is connected to the loop between the target input source 1 and the target receiver 2, and the emitter is grounded. The use of a transistor also meets the requirements for analog signal injection testing in low-speed switching scenarios.

[0029] In one embodiment, the signal generation module 20 is a signal generator. Specifically, the signal generation module 20 uses a signal generator, which can generate waveform signals according to user-defined parameters. The signals are stable and reliable, and can reliably drive switching devices to turn on and off, ensuring they are grounded according to a set frequency or duty cycle, thus meeting the requirements for fault analog quantity injection testing.

[0030] To further understand the fault analog injection test circuit, the following will be combined with... Figure 1 Its working principle is explained. In practical applications, fault simulation injection testing can be divided into the following three types: (1) Ground fault test of injected analog signal level: Disconnect the first switch S1, set the resistance value of the second variable resistor R2 to 0, so that the signal generation module 20 outputs the drive signal according to the configured frequency or duty cycle, thereby driving the switching device Q1 to ground according to the configured frequency or duty cycle, thereby achieving the purpose of injecting fault waveform into the analog signal.

[0031] (2) Injecting analog signal level high + ground fault: Close the first switch S1, connect the power supply VDD, set the first variable resistor R1 to a suitable resistance value, close the first switch S1, set the resistance value of the second variable resistor R2 to 0, so that the signal generation module 20 outputs the drive signal according to the configured frequency or duty cycle, thereby driving the switching device Q1 to ground according to the configured frequency or duty cycle, so as to realize the purpose of pulling the analog signal high and injecting fault waveform.

[0032] (3) Injecting analog signal level low + ground fault: Disconnect the first switch S1, set the second variable resistor R2 to a suitable resistance value, so that the signal generation module 20 outputs a drive signal according to the configured frequency or duty cycle, thereby driving the switching device Q1 to ground according to the configured frequency or duty cycle, so as to achieve the purpose of pulling the analog signal low and injecting fault waveform.

[0033] In summary, the fault analog quantity injection test circuit provided by this utility model embodiment can perform fault analog quantity injection tests on circuits or devices, thereby verifying the receiving capability and performance of the tested object to fault signal injection. The test is convenient and efficient.

[0034] This utility model also provides an ESSD testing device, which includes the fault analog signal injection test circuit in the above embodiments. The fault analog signal injection test circuit is integrated into the device. The device is mainly used to perform fault analog signal injection tests on ESSD (Enterprise Solid-State Drive) products, such as testing ESSD products with DDR4 or DDR5, thereby verifying the ability of the ESSD product to receive fault analog signals, analyzing and judging the limit of the analog level received by the ESSD product, and thus enabling better product improvement. Since the specific structure and working principle of the fault analog signal injection test circuit have been described in detail in the previous specification, they will not be repeated here for the sake of brevity.

[0035] The ESSD testing device of this invention, by employing the fault analog signal injection testing circuit provided in the embodiments of this invention, can realize the fault analog signal input test of ESSD products, thereby verifying the performance of ESSD products and has broad application prospects.

[0036] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this utility model, and these modifications or substitutions should all be covered within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.

Claims

1. A fault analog quantity injection test circuit, used to connect to the loop between a target input source and a target receiver, characterized in that, include: A voltage bias module is connected to the loop between the target input source and the target receiver, and is used to pull up or pull down the loop voltage between the target input source and the target receiver; A switching transistor device, the first terminal of which is connected to the loop between the target input source and the target receiver, and the second terminal of which is grounded; A signal generation module, connected to the third terminal of the switching device, is used to generate a drive signal to drive the switching device to switch on and off so that a target fault waveform signal is formed on the loop between the target input source and the target receiver.

2. The fault analog quantity injection test circuit according to claim 1, characterized in that, The voltage bias module includes a pull-up unit and a first switch. The first end of the pull-up unit is connected between the target input source and the target receiver through the first switch, and the second end of the pull-up unit is connected to a power supply.

3. The fault analog quantity injection test circuit according to claim 2, characterized in that, The pull-up unit includes a first variable resistor, one end of which is connected to the power supply, and the other end is connected to the loop between the target input source and the target receiver.

4. The fault analog quantity injection test circuit according to claim 2, characterized in that, The voltage bias module further includes a pull-down unit, the first end of which is connected between the target input source and the target receiver, and the second end of which is connected to the first end of the switching device.

5. The fault analog quantity injection test circuit according to claim 4, characterized in that, The pull-down unit includes a second variable resistor, one end of which is connected to the first terminal of the switching device, and the other end is connected to the loop between the target input source and the target receiver.

6. The fault analog quantity injection test circuit according to any one of claims 1-5, characterized in that, The switching device is a MOS transistor, with the first terminal being the drain, the second terminal being the source, and the third terminal being the drain.

7. The fault analog quantity injection test circuit according to any one of claims 1-5, characterized in that, The switching device is a HEMT transistor, with the first terminal being the drain, the second terminal being the source, and the third terminal being the gate.

8. The fault analog quantity injection test circuit according to any one of claims 1-5, characterized in that, The switching device is configured as a transistor, with the first terminal being the collector, the second terminal being the emitter, and the third terminal being the base.

9. The fault analog quantity injection test circuit according to any one of claims 1-5, characterized in that, The signal generation module is a signal generator.

10. An ESSD testing device, characterized in that, Includes the fault analog quantity injection test circuit as described in any one of claims 1-9.

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