A sequential start transient high inrush power supply circuit

CN224890334UActive Publication Date: 2026-10-23GUANGZHOU BAOLUN ELECTRONICS CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202521807105.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-08-22
Publication Date
2026-10-23
Estimated Expiration
2035-08-22

AI Technical Summary

Technical Problem

由于开关电源的浪涌承受能力有限,当需要供电的容性负载数量较多时,在设备瞬间开机的过程中,大量容性负载会瞬间产生较大的充电电流,极易导致开关电源触发过流保护机制,进而造成会议主机系统无法正常工作,影响整体运行稳定性

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224890334U_ABST
    Figure CN224890334U_ABST
Patent Text Reader

Abstract

The utility model relates to a kind of sequentially started anti-transient high surge power supply circuit, including main power supply and auxiliary power supply, and N level anti-transient high surge power supply circuit, wherein N is greater than or equal to 1, the i level anti-transient high surge power supply circuit includes the i level power supply circuit and the i level control circuit;Over use comparator and set reference voltage comparison, produce level control triode conduction and then control MOS tube conduction, only when i-1 level anti-transient high surge power supply circuit is powered on, i level anti-transient high surge power supply circuit will be turned on, the load of i-1 level anti-transient high surge power supply circuit and the load of i level anti-transient high surge power supply circuit sequentially power supply effect is realized, weaken the problem that capacitive load leads to surge current big in power-on transient.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to the field of power supply circuit design technology, and in particular to a sequential start-up anti-transient high surge power supply circuit. Background Technology

[0002] In the application scenarios of conference host products, it is usually necessary to provide power support for multiple external unit devices. These external units typically include various auxiliary devices such as conference microphones, audio processing modules, display terminals, and voting devices. Since these devices often contain electronic components such as capacitors and integrated circuits, their overall load characteristics exhibit obvious capacitive bias. That is, when the device is powered on, the internal capacitors quickly enter a charging state, generating an instantaneous charging current that is much larger than the normal operating current.

[0003] Currently, the commonly used power supply solution in the industry is to directly supply power to external devices via a switching power supply. This solution is not specifically optimized for transient surges during startup. Due to the limited surge capacity of switching power supplies, when there are a large number of capacitive loads requiring power, a large charging current will be generated instantaneously during the momentary startup of the device. This can easily trigger the overcurrent protection mechanism of the switching power supply, causing the conference host system to malfunction and affecting the overall operational stability. Utility Model Content

[0004] A sequentially activated transient surge protection power supply circuit includes a main power supply and an auxiliary power supply, and N-stage transient surge protection power supply circuits, where N≥1, 1≤i≤N, and the i-th stage transient surge protection power supply circuit includes:

[0005] The i-th stage control circuit includes an i-th stage comparator and an i-th stage pull-up resistor R. i 3 and an output terminal; the inverting input terminal of the i-th stage comparator is connected to the auxiliary power supply, its ground terminal is grounded, its power supply terminal is connected to the main power supply, and its output terminals are respectively connected to the i-th stage pull-up resistor R. i 3 is connected to the auxiliary power supply, and the voltage is transmitted to the output terminal of the i-th stage control circuit; when i is greater than or equal to 2, the non-inverting input terminal of the i-th stage comparator obtains the voltage of the output terminal of the (i-1)th stage power supply circuit; when i is equal to 1, the non-inverting input terminal of the i-th stage comparator obtains the voltage of the main power supply.

[0006] The i-th stage power supply circuit includes the first i-th stage voltage divider resistor R. i 1. Second i-stage voltage divider resistor R i 2. i-stage transistor Q i 2. i-stage MOSFET Q i 1 and an output terminal; the i-stage MOS transistor Q iThe drain of resistor 1 is connected to the main power supply, and its source is connected to one end of the i-th stage load and simultaneously serves as the output terminal of the i-th stage power supply circuit. The other end of the i-th stage load is grounded; the first i-th stage voltage divider resistor R i One end of 1 is connected to the main power supply, and the other end is connected to the i-stage MOSFET Q. i The gate of 1 and the second i-th stage voltage divider resistor R i One end of 2 is connected to the second i-th stage voltage divider resistor R. i The other end of 2 is connected to the i-stage transistor Q. i The collector connection of 2; the i-stage transistor Q i The base of 2 is connected to the output terminal of the i-th stage control circuit, and its emitter is grounded.

[0007] By comparing the voltage with a pre-set reference voltage using a comparator, a level-controlled transistor Q is generated. i 2. Turning on the MOSFET and thus controlling the Q transistor i 1. When the i-1 level transient surge protection circuit is powered on, the i-level transient surge protection circuit will be turned on. This achieves the effect of sequential power supply to the loads of the i-1 level transient surge protection circuit and the i-level transient surge protection circuit, thus reducing the problem of large surge current caused by capacitive loads at the moment of power-on.

[0008] Furthermore, the i-level control circuit also includes an i-level current-limiting resistor R. i 6. The output terminal of the i-th stage comparator U2A is connected to the i-th stage current-limiting resistor R. i 6 is connected to the output terminal of the i-stage control circuit to limit the transmission to the i-stage transistor Q. i 2. Base current.

[0009] Furthermore, the i-level control circuit also includes an i-level pull-down resistor R. i 7. The i-th stage pull-down resistor R i 7 One end is connected to the i-th stage current-limiting resistor R i The other end is grounded between the output terminal of the i-th stage control circuit and the output terminal of the i-th stage control circuit. This serves to reduce the input impedance of the output terminal of the i-th stage control circuit, thereby avoiding interference from transistor Q in the i-th stage power supply circuit 12. i 2. The situation where the circuit is accidentally triggered by external interference when the circuit is in a static state.

[0010] Furthermore, the i-stage control circuit also includes a third i-stage voltage divider resistor R. i 4. Fourth i-stage voltage divider resistor R i 5. The third i-th stage voltage divider resistor R i 4. One end is connected to the main power supply, and the other end is connected to the non-inverting input of the i-stage comparator U2A, while also being connected through the fourth i-stage voltage divider resistor R.i 5. Grounding.

[0011] Furthermore, the main power supply voltage is 36V, and the auxiliary power supply voltage is 5V; the i-stage comparator U2A is an open-drain output comparator, and its reference voltage is 5V; the third i-stage voltage divider resistor R... i 4 and the fourth i-th stage voltage divider resistor R i The resistors of the five stages are the same; the first i-th stage voltage divider resistor R i 1 and the second i-th stage voltage divider resistor R i The resistance ratio of 2 is 1:2.

[0012] To better understand and implement this invention, the following detailed description is provided in conjunction with the accompanying drawings. Attached Figure Description

[0013] Figure 1 A schematic diagram of the transient surge protection power supply circuit structure for sequential startup of this utility model;

[0014] Figure 2 This is a circuit diagram of the first-stage sequentially activated anti-transient high surge power supply circuit and the i-stage sequentially activated anti-transient high surge power supply circuit of this utility model. Detailed Implementation

[0015] Please see Figure 1 This is a schematic diagram of the circuit structure of a sequentially started anti-transient surge power supply circuit according to the present invention. The sequentially started anti-transient surge power supply circuit of the present invention includes a main power supply VCC_36V, an auxiliary power supply VCC_5V, and N-stage anti-transient surge power supply circuits, where N≥1, 1≤i≤N; the output terminal of the (i-1)th stage anti-transient surge power supply circuit is connected to its load and in parallel with the input terminal of the i-th stage anti-transient surge power supply circuit; the main power supply VCC_36V and the auxiliary power supply VCC_5V are respectively connected to each node of the N-stage anti-transient surge power supply circuit to provide power. A comparator in the (i-1)th stage anti-transient surge power supply circuit compares the voltage with a pre-set reference voltage to generate a level-controlled transistor Q. i 2. Turning on the MOSFET and thus controlling the Q transistor i When stage 1 is turned on, the output voltage of the (i-1)th stage transient surge protection power supply circuit is supplied to the (i-1)th stage load, and at the same time, the voltage is provided to the (i)th stage transient surge protection power supply circuit. This achieves the sequential turn-on of the loads of the (i-1)th stage transient surge protection power supply circuit and the (i)th stage transient surge protection power supply circuit, so as to suppress the high surge current under high load conditions.

[0016] Specifically, please refer to Figure 2 The i-th stage anti-transient high surge power supply circuit includes an i-th stage power supply circuit and an i-th stage control circuit.

[0017] The i-th stage power supply circuit 12 includes a first i-th stage voltage divider resistor R. i 1. Second i-stage voltage divider resistor R i 2. i-stage transistor Q i 2. i-stage MOSFET Q i 1 and an output terminal; specifically, the i-stage MOS transistor Q i Pin 2 (drain) of circuit 1 is connected to the main power supply VCC_36V, and pin 3 (source) is connected to one end of the i-th stage load and also serves as the output terminal of the i-th stage power supply circuit 12. The other end of the i-th stage load is grounded; the first i-th stage voltage divider resistor R i One end of 1 is connected to the main power supply VCC_36V, and the other end is connected to the i-stage MOSFET Q. i Pin 1 (gate) of 1 and the second i-th stage voltage divider resistor R i One end of 2 is connected to the second i-th stage voltage divider resistor R. i The other end of 2 is connected to the transistor Q. i Pin 3 (collector) of transistor Q is connected. i Pin 1 (base) of 2 is connected to the output terminal of the i-th stage control circuit 14, and pin 2 (emitter) is grounded.

[0018] When the output of the i-th stage control circuit 14 outputs a high level to the i-th stage transistor Q i When pin 1 of transistor 2 is open, the transistor Q... i Pins 2 and 3 of circuit 2 are connected, and the main power supply VCC_36V is supplied through the first i-stage voltage divider resistor R. i 1. Second i-stage voltage divider resistor R i 2 and i-stage transistor Q i 2. Grounded; at this time, the i-stage MOS transistor Q i Pin 1 of 1 receives voltage through the first i-th stage voltage divider resistor R. i 1 and the second i-th stage voltage divider resistor R i The voltage after voltage division causes the i-stage MOS transistor Q to... i Pins 2 and 3 of transistor 1 are turned on, thereby allowing the main power supply VCC_36V to flow through the i-stage MOSFET Q. i Pins 2 and 3 of circuit 1 and the i-th level load are grounded to form a circuit, and the i-th level load is energized and simultaneously supplies power to the output terminal of the i-th level power supply circuit 12.

[0019] In this embodiment, the first i-th stage voltage divider resistor R i 1 and the second i-th stage voltage divider resistor R i The resistance ratio of 2 is 1:2.

[0020] The i-th stage control circuit 14 includes an i-th stage pull-up resistor R. i3. Third-stage voltage divider resistor R i 4. Fourth i-stage voltage divider resistor R i 5. Class i current-limiting resistor R i 6. i-stage pull-down resistor R i 7. The i-stage comparator U2A and an output terminal. Pin 2 (inverting input) of the i-stage comparator U2A is connected to the auxiliary power supply VCC_5V, pin 4 (ground terminal) is grounded, and pin 8 (power supply terminal) is connected to the main power supply VCC_36V. Pin 1 (output terminal) of the i-stage comparator U2A is connected to the i-stage pull-up resistor R. i 3 is connected to the auxiliary power supply VCC_5V, and through the i-th stage current-limiting resistor R i 6 is connected to the output terminal of the i-th stage control circuit 14 to transmit voltage to the output terminal of the i-th stage control circuit 14. The i-th stage pull-down resistor R i 7 One end is connected to the i-th stage current-limiting resistor R i The third i-th stage voltage divider resistor R is connected between the output terminal of the i-th stage control circuit 14 and the output terminal of the i-th stage control circuit 14, with the other end grounded. When i is greater than or equal to 2, the third i-th stage voltage divider resistor R... i One end of the 4-pin connector is connected to the output of the (i-1)th stage power supply circuit to obtain the voltage of the (i-1)th stage power supply circuit output. The other end is connected to pin 3 (non-inverting input) of the i-th stage comparator U2A and simultaneously connected through the fourth i-th stage voltage divider resistor R. i 5. Grounding. When i equals 1, the third i-th stage voltage divider resistor R... i One end of the 4 is connected to the main power supply VCC_36V, and the other end is connected to pin 3 (non-inverting input) of the i-stage comparator U2A, while also being connected through the fourth i-stage voltage divider resistor R. i 5. Grounding.

[0021] Specifically, in this embodiment, the i-stage comparator U2A is an open-drain output comparator with a reference voltage set to 5V, and the third i-stage voltage divider resistor R... i 4 and the fourth i-th stage voltage divider resistor R i The resistors in pins 5 and 6 are the same. After the main power supply VCC_36V is powered on, pin 3 (non-inverting input) of the i-stage comparator U2A receives the main power supply VCC_36V through the third i-stage voltage divider resistor R. i 4 and the fourth i-th stage voltage divider resistor R i The 18V voltage after voltage division by 5 is greater than the 5V voltage of the auxiliary power supply VCC_5V obtained at its pin 2 (inverting input terminal). At this time, pin 1 (output terminal) of the i-stage comparator U2A is connected to the i-stage pull-up resistor R. i 3 is pulled up to the auxiliary power supply VCC_5V voltage of 5V and passes through the i-stage current limiting resistor R. iAfter current limiting, a high-level output is sent to the output terminal of the i-th stage control circuit to limit the transmission to the i-th stage transistor Q. i The base current. The i-th stage pull-down resistor R i 7 serves to reduce the input impedance at the output terminal of the i-th stage control circuit 14, thereby avoiding interference from the i-th stage transistor Q in the i-th stage power supply circuit 12. i 2. The situation where the circuit is accidentally triggered by external interference when the circuit is in a static state.

[0022] According to the above circuit structure, the i-th stage of the transient surge protection circuit will only conduct after the (i-1)-th stage of the transient surge protection circuit is energized. This achieves the effect of sequentially powering the loads within the N-stage transient surge protection circuit, mitigating the problem of large inrush current caused by capacitive loads at power-on.

[0023] In summary, compared with the prior art, the sequential start-up anti-transient high surge power supply circuit of this utility model does not require additional chips. It solves the problem of large surge current generated when multi-level capacitive loads are turned on at the moment of power-on through a simple circuit structure design. The circuit structure is simple, does not require dedicated chips or complex programming, saves costs, and is easy to mass-produce and maintain.

[0024] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the embodiments of this application. The singular forms “a,” “the,” and “the” used in the embodiments and claims of this application are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that, unless otherwise stated, “a plurality” means two or more; the terms “first,” “second,” “third,” etc., are used only to distinguish and not to describe a particular order or sequence, nor should they be construed as indicating or implying relative importance. The term “and / or” as used herein refers to and includes any or all possible combinations of one or more associated listed items. When the above description relates to drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. In the description of this application, those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0025] The above-described embodiments are merely one specific implementation of this utility model, and while the descriptions are detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these modifications and improvements all fall within the protection scope of this utility model.

Claims

1. A sequentially startable surge protection power supply circuit, comprising a main power supply and an auxiliary power supply, and an N-level surge protection power supply circuit, wherein N≥1, 1≤i≤N, characterized in that: The i-th level transient surge protection power supply circuit includes: The i-th stage control circuit includes an i-th stage comparator and an i-th stage pull-up resistor R. i 3 and one output terminal; the inverting input terminal of the i-th stage comparator is connected to the auxiliary power supply, its ground terminal is grounded, its power supply terminal is connected to the main power supply, and its output terminals are respectively connected to the i-th stage pull-up resistor R. i 3 is connected to the auxiliary power supply, and the voltage is transmitted to the output terminal of the i-th stage control circuit; when i is greater than or equal to 2, the non-inverting input terminal of the i-th stage comparator obtains the voltage of the output terminal of the (i-1)th stage power supply circuit; when i is equal to 1, the non-inverting input terminal of the i-th stage comparator obtains the voltage of the main power supply. The i-th stage power supply circuit includes the first i-th stage voltage divider resistor R. i 1. Second i-stage voltage divider resistor R i 2. i-stage transistor Q i 2. i-stage MOSFET Q i 1 and an output terminal; the i-stage MOS transistor Q i The drain of resistor 1 is connected to the main power supply, and its source is connected to one end of the i-th stage load and simultaneously serves as the output terminal of the i-th stage power supply circuit. The other end of the i-th stage load is grounded; the first i-th stage voltage divider resistor R i One end of 1 is connected to the main power supply, and the other end is connected to the i-stage MOSFET Q. i The gate of 1 and the second i-th stage voltage divider resistor R i One end of 2 is connected to the second i-th stage voltage divider resistor R. i The other end of 2 is connected to the i-stage transistor Q. i The collector connection of 2; the i-stage transistor Q i The base of 2 is connected to the output terminal of the i-th stage control circuit, and its emitter is grounded.

2. The sequentially started anti-transient surge power supply circuit according to claim 1, characterized in that: The i-level control circuit also includes an i-level current-limiting resistor R. i 6. The output terminal of the i-th stage comparator U2A is connected to the i-th stage current-limiting resistor R. i 6 is connected to the output terminal of the i-th stage control circuit.

3. The sequentially started anti-transient surge power supply circuit according to claim 2, characterized in that: The i-level control circuit also includes an i-level pull-down resistor R. i 7. The i-th stage pull-down resistor R i 7 One end is connected to the i-th stage current-limiting resistor R i The other end is grounded between 6 and the output terminal of the i-level control circuit.

4. The sequentially started anti-transient surge power supply circuit according to claim 3, characterized in that: The i-level control circuit also includes a third i-level voltage divider resistor R. i 4. Fourth i-stage voltage divider resistor R i 5. The third i-th stage voltage divider resistor R i 4. One end is connected to the main power supply, and the other end is connected to the non-inverting input of the i-stage comparator U2A, while also being connected through the fourth i-stage voltage divider resistor R. i 5. Grounding.

5. The sequentially started anti-transient high surge power supply circuit according to claim 4, characterized in that: The main power supply voltage is 36V, and the auxiliary power supply voltage is 5V; the i-stage comparator U2A is an open-drain output comparator with a reference voltage of 5V; the third i-stage voltage divider resistor R... i 4 and the fourth i-th stage voltage divider resistor R i The resistors of the five stages are the same; the first i-th stage voltage divider resistor R i 1 and the second i-th stage voltage divider resistor R i The resistance ratio of 2 is 1:2.