Highly compatible charging circuit and power bank

Abstract

The application relates to the technical field of charging, and discloses a high-compatibility charging circuit and a power bank. The high-compatibility charging circuit comprises a micro control unit (MCU), a CC line control circuit and a load identification circuit. The CC line control circuit is electrically connected with the micro control unit (MCU), and is used for identifying signal changes of CC1 and CC2. The load identification circuit is electrically connected with the micro control unit (MCU) and the CC line control circuit, and is used for identifying load access and controlling power supply output. The micro control unit (MCU) is used for receiving feedback signals of the CC line control circuit, outputting an enable signal to the load identification circuit, and controlling the load identification circuit to start power supply output. Through the design of the CC line control circuit and the load identification circuit, the application dynamically supports charging of devices without CC1 / CC2 identification lines and devices with CC1 / CC2 identification lines, effectively improves the charging application range, and further improves the user experience.

Description

Technical Field

[0001] This application belongs to the field of charging technology, specifically relating to a highly compatible charging circuit and a power bank. Background Technology

[0002] With the widespread use of portable electronic devices, power banks, as mobile power supply devices, need to adapt their external interfaces to various device types. Currently, commonly used interfaces in the industry include USB-A, Type-C, USB-B, and Lightning ports. The load identification logic of different interfaces varies significantly. USB-A ports rely on voltage division of the D+ / D- lines to determine the device type. Lightning ports use a dedicated chip for encrypted communication with Apple devices for identification. Type-C ports, with their reversible insertion convenience and high power transmission capabilities, have gradually become the mainstream interface, and their load identification is primarily achieved through the CC1 / CC2 pins. In the power supply logic of the Type-C interface, the power bank, acting as the downstream port DFP, needs to detect the pull-down resistor Rd signal of the upstream port UFP via the CC1 / CC2 pins. When a load device is plugged in, the power bank's CC1 / CC2 pins form a voltage divider with the device's pull-down resistor Rd through the pull-up resistor Rp. Only after detecting this voltage divider signal will the power bus VBUS output be activated, thus supplying power to the load device. This identification mechanism is a core component of the Type-C interface specification, ensuring power supply security and the accuracy of protocol negotiation. However, many older or low-power Type-C port devices on the market today, such as early smartphones that did not support fast charging, electric toothbrushes, shavers, and TWS Bluetooth earphones, etc., are small electronic devices. To simplify circuit design and reduce production costs, these devices did not integrate the CC1 / CC2 identification lines and corresponding pull-down resistors Rd according to the Type-C specification. When such devices are connected to power banks that require CC1 / CC2 identification before power supply, the power bank cannot detect the voltage divider signal on the CC1 / CC2 pins, keeping VBUS in a constantly off state. This prevents the device from charging properly, resulting in serious compatibility issues. To address these issues, the industry has proposed an improvement by adding CC1 / CC2 lines to charging devices. However, this solution requires a unified interface standard across the industry, which is difficult to coordinate and has a long implementation period. Furthermore, adding extra CC1 / CC2 lines significantly increases the hardware cost of power banks, reducing their market competitiveness. More importantly, this solution only works with new devices that have added CC1 / CC2 lines and cannot meet the charging needs of the large number of older devices without CC1 / CC2 recognition lines already on the market. This results in incompatibility between existing devices and current Type-C power banks, greatly reducing the universality of power banks and the user experience. Utility Model Content

[0003] To address the shortcomings of the prior art, this application provides a highly compatible charging circuit and power bank. Through the design of the CC line control circuit and the load identification circuit, it dynamically supports charging of both devices without CC1 / CC2 identification lines and devices with CC1 / CC2 identification lines, effectively improving the charging applicability and thus enhancing the user experience.

[0004] The technical effects to be achieved in this application are realized through the following aspects: In a first aspect, this application provides a highly compatible charging circuit, comprising: Microcontroller Unit (MCU) The CC line control circuit is electrically connected to the microcontroller unit (MCU), and the CC line control circuit is used to identify signal changes in CC1 and CC2; and The load identification circuit is electrically connected to the microcontroller unit (MCU) and the CC line control circuit. The load identification circuit is used to identify the load connection and control the power output. The microcontroller unit (MCU) is used for: Based on the feedback signal from the CC line control circuit, an enable signal is output to the load identification circuit to control it to turn on the power output.

[0005] In some implementations, the load identification circuit includes a path control module and a load identification module, wherein the load identification module is electrically connected to the path control module, and the load identification module is used to control the on / off state of the path control module.

[0006] In some implementations, the load identification module includes an enable control unit, a voltage divider sampling unit, and a signal conditioning and detection unit; The output terminal of the enable control unit is connected to the input terminal of the voltage divider sampling unit; the output terminal of the voltage divider sampling unit is connected to the signal conditioning and detection unit; the path control module is connected between the enable control unit and the signal conditioning and detection unit.

[0007] In some implementations, the enable control unit includes an enable signal input terminal VBUS_EN and a transistor Q1. The base of the transistor Q1 is connected to the enable signal input terminal VBUS_EN, the emitter of the transistor Q1 is grounded, and the collector of the transistor Q1 is connected to the voltage divider sampling unit and the enable control unit.

[0008] In some implementations, the voltage divider sampling unit includes resistors R1 and R2, one end of resistor R1 is connected to the input terminal of the enable control unit, the other end of resistor R1 is connected to one end of resistor R2, and the other end of resistor R2 is connected to the signal conditioning and detection unit. The output terminal of the voltage divider sampling unit is provided with an output voltage divider signal terminal VC.

[0009] In some implementations, the signal conditioning and detection unit includes a diode D1, a resistor R4, a resistor R3, a transistor Q3, a high-level terminal Ph_DET, and a signal feedback terminal VC_IN; The cathode of diode D1 is connected to the output voltage divider signal terminal VC, and the anode of diode D1 is connected to one end of resistor R4. The other end of resistor R4 is connected to the high-level terminal Ph_DET through resistor R3; The other end of the resistor R4 is connected to the base of the transistor Q3, the emitter of the transistor Q3 is connected to the high-level terminal Ph_DET, and the collector of the transistor Q3 is connected to the signal feedback terminal VC_IN.

[0010] In some implementations, the path control module includes a transistor Q2, a power input terminal VBUS1, and a power output terminal VBUS2; the gate of the transistor Q2 is connected to the enable control unit, the source of the transistor Q2 is connected to the output terminal of the voltage divider sampling unit, and the drain of the transistor Q2 is connected between the power input terminal VBUS1 and the power output terminal VBUS2.

[0011] In some implementations, the load identification module further includes an overvoltage protection unit, which includes a Zener diode Z1, the anode of which is connected to the gate of the transistor Q2, and the cathode of which is connected to the source of the transistor Q2.

[0012] In some implementations, the CC line control circuit includes a signal input port CCC, a control signal terminal CCC_EN, a resistor R5, and a transistor Q4; The base of transistor Q4 is connected to the control signal terminal CCC_EN, the collector of transistor Q4 is connected to the signal input port CCC through the resistor R5, and the emitter of transistor Q4 is grounded.

[0013] Secondly, this application provides a power bank, including the highly compatible charging circuit described above.

[0014] In summary, this application has at least the following advantages: The highly compatible charging circuit provided in this application, by combining the design of a CC line control circuit and a load identification circuit, enables the microcontroller unit (MCU) to identify the load connection through the load identification circuit and, in conjunction with the CC line control circuit, to identify the CC1 and CC2 signals to determine whether the device does not support CC triggering. If the device is determined to be a device that does not support CC triggering (i.e., the device itself does not have CC1 / CC2 design and does not support the PD protocol), the MCU then controls CC1 and CC2 to actively pull down and induce the protocol IC to open the TYPE C port for external output. This achieves dynamic compatibility charging for both devices that support the PD protocol and those that do not, effectively improving the charging applicability and thus enhancing the user experience. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the high-compatibility charging circuit in Embodiment 1 of this application.

[0016] Figure 2 This is a schematic diagram of the load identification circuit in Embodiment 1 of this application.

[0017] Figure 3 This is a schematic diagram of the CC line control circuit in Embodiment 1 of this application.

[0018] Figure 4 This is a schematic diagram of the load identification module in Embodiment 2 of this application.

[0019] Figure 5 This is a schematic diagram of the power bank structure in Embodiment 3 of this application.

[0020] Markings in the image: 100. High-compatibility charging circuit; 1. Microcontroller unit (MCU); 2. CC line control circuit; 3. Load identification circuit; 31. Path control module; 321. Enable control unit; 322. Voltage divider sampling unit; 323. Signal conditioning and detection unit; 200. Power bank. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. The described embodiments are only some embodiments of this application, not all embodiments.

[0022] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0023] Example 1: Please see the appendix Figure 1 The high-compatibility charging circuit of this application includes a microcontroller unit MCU1, a CC line control circuit 2, and a load identification circuit 3.

[0024] The CC line control circuit 2 is electrically connected to the microcontroller unit MCU1. The CC line control circuit 2 is used to identify signal changes in CC1 and CC2. The load identification circuit 3 is electrically connected to both the microcontroller unit MCU1 and the CC line control circuit 2. The load identification circuit 3 is used to identify the load connection and control the power output. The microcontroller unit MCU1 receives the feedback signal from the CC line control circuit 2 and outputs an enable signal to the load identification circuit 3, controlling it to turn on the power output. Specifically, the microcontroller unit MCU1 is responsible for collecting signals, performing logical judgments to determine whether the charging cable has CC1 or CC2 signals or whether the charging cable does not have CC1 or CC2 identification lines connected, and then deciding whether to actively open the port for external charging based on the logical processing.

[0025] In this embodiment, the highly compatible charging circuit 100 uses a microcontroller unit (MCU1) to identify the load connection via a load identification circuit 3, and then uses a CC line control circuit 2 to identify the CC1 and CC2 signals to determine whether the device does not support CC triggering. If so, the MCU1 controls CC1 and CC2 to actively pull down the TYPE C port to induce the protocol IC to open the TYPE C port for external output, thereby achieving dynamic compatibility charging for both devices that support the PD protocol and those that do not.

[0026] The above technical solution solves the problem of devices without CC1 and CC2 failing to charge properly on PD chargers, or devices charged via charging cables without CC1 and CC2 failing to charge properly on PD chargers. This effectively expands the charging applicability range, achieves high compatibility of the charging circuit, and greatly enhances the user experience.

[0027] In some embodiments, the load identification circuit 3 includes a path control module 31 and a load identification module, which are electrically connected to the path control module 31. The load identification module is used to control the on / off state of the path control module 31. The load identification module includes an enable control unit 321, a voltage divider sampling unit 322, and a signal conditioning and detection unit 323. The output terminal of the enable control unit 321 is connected to the input terminal of the voltage divider sampling unit 322. The output terminal of the voltage divider sampling unit 322 is connected to the signal conditioning and detection unit 323. The path control module 31 is connected between the enable control unit 321 and the signal conditioning and detection unit 323.

[0028] Through the above settings, the load identification circuit 3 achieves efficient control through the coordinated operation of the load identification module and the path control module 31 via signal interaction. Specifically, the enable control unit 321 outputs a drive signal to the voltage divider sampling unit 322, enabling it to accurately acquire voltage signals. After processing by the signal conditioning and detection unit 323, this signal can quickly distinguish between PD protocol devices with CC1 / CC2 signals and devices without CC1 / CC2 signals or connected via a non-CC cable, effectively solving the problem of poor compatibility of traditional charging circuits with non-standard Type-C loads and significantly expanding the range of rechargeable loads. It can also trigger the path control module 31 to switch on and off in real time, improving the agility of charging startup. At the same time, under the precise control of the load identification module, the path control module 31 only conducts power supply circuits for legitimate loads, ensuring power supply reliability and safety.

[0029] For some specific embodiments, please refer to the appendix. Figure 2-3 The enable control unit 321 includes an enable signal input terminal VBUS_EN and a transistor Q1. The base of transistor Q1 is connected to the enable signal input terminal VBUS_EN, the emitter of transistor Q1 is grounded, and the collector of transistor Q1 is connected to the voltage divider sampling unit 322 and the enable control unit 321.

[0030] The voltage divider sampling unit 322 includes resistors R1 and R2. One end of resistor R1 is connected to the input terminal of the enable control unit 321, and the other end of resistor R1 is connected to one end of resistor R2. The other end of resistor R2 is connected to the signal conditioning and detection unit 323. The output terminal of the voltage divider sampling unit 322 is provided with an output voltage divider signal terminal VC.

[0031] The signal conditioning and detection unit 323 includes a diode D1, resistors R4 and R3, a transistor Q3, a high-level terminal Ph_DET, and a signal feedback terminal VC_IN. The cathode of diode D1 is connected to the output voltage divider signal terminal VC, and the anode of diode D1 is connected to one end of resistor R4. The other end of resistor R4 is connected to the high-level terminal Ph_DET through resistor R3. The other end of resistor R4 is connected to the base of transistor Q3, the emitter of transistor Q3 is connected to the high-level terminal Ph_DET, and the collector of transistor Q3 is connected to the signal feedback terminal VC_IN.

[0032] The path control module 31 includes transistor Q2, power input terminal VBUS1 and power output terminal VBUS2; the gate of transistor Q2 is connected to enable control unit 321, the source of transistor Q2 is connected to the output terminal of voltage divider sampling unit 322, and the drain of transistor Q2 is connected between power input terminal VBUS1 and power output terminal VBUS2.

[0033] The CC line control circuit 2 includes a signal input port CCC, a control signal terminal CCC_EN, a resistor R5, and a transistor Q4. The base of transistor Q4 is connected to the control signal terminal CCC_EN, the collector of transistor Q4 is connected to the signal input port CCC through the resistor R5, and the emitter of transistor Q4 is grounded.

[0034] Specifically, the high-level terminal Ph_DET continuously outputs a high level, which can be pulled up by an external resistor or the internal resistor of the microcontroller MCU1. The enable signal input terminal VBUS_EN outputs a low level, and transistor Q2 is in the off state, that is, the path control module 31 is disconnected. At this time, the signal feedback terminal VC_IN is at a low level.

[0035] When a CC1 / CC2 device is connected via a charging cable with CC1 / CC2 signal lines, the output voltage divider signal terminal VC forms a loop through the load and ground GND. At this time, the voltage divider resistor R3 turns on transistor Q3, and the high level of the high-level terminal Ph_DET reaches the signal feedback terminal VC_IN through transistor Q3. The microcontroller unit MCU1 recognizes the load connection through the level change of the signal feedback terminal VC_IN. At the same time, the protocol IC uses the CC line control circuit 2 to identify whether CC1 / CC2 is pulled low to determine the load connection. When the microcontroller unit MCU1 determines through the protocol IC that a device with CC1 / CC2 identification is connected, in this case, the control signal terminal CCC_EN remains at a low level and does not turn on transistor Q4. Only the enable signal input terminal VBUS_EN is controlled to output a high level to turn on transistor Q2, so that the power input terminal VBUS1 and the power output terminal VBUS2 are connected, realizing normal external discharge.

[0036] When a device without CC1 / CC2 is connected or a charging cable with or without CC1 / CC2 signal lines is connected, the output voltage divider signal terminal VC forms a loop through the load and ground GND. At this time, the voltage divider through resistor R3 turns on transistor Q3. The high level of the high-level terminal Ph_DET reaches the signal feedback terminal VC_IN through transistor Q3. The microcontroller unit MCU1 recognizes the load connection through the level change of the signal feedback terminal VC_IN. At the same time, the microcontroller unit MCU1 determines through the protocol IC that no CC1 / CC2 is pulled low. In this case, the control signal terminal CCC_EN outputs a high level to turn on transistor Q4, so that CC1 / CC2 form a 5.1K resistor to pull down to ground to force the Type C port output. It also controls the enable signal input terminal VBUS_EN to output a high level to turn on transistor Q2, so that the power input terminal VBUS1 and the power output terminal VBUS2 are connected, realizing normal external discharge.

[0037] Through the above technical solution, by adding a load identification circuit 3, the microcontroller unit MCU1 first identifies the load connection through this circuit, and then, combined with the recognition results of the CC1 / CC2 signals by the protocol IC, automatically distinguishes between devices that support CC triggering and those that do not. For devices that support CC triggering, charging is achieved by directly controlling the circuit to open; for devices that do not support CC triggering, the microcontroller unit MCU1 controls the CC line control circuit 2 to form a 5.1K resistor between CC1 / CC2 and ground, inducing the protocol IC to open the Type-C port output, and simultaneously opening the power supply path. This effectively solves the problem that devices without CC1 / CC2 or connected through a CC line cannot be charged normally on a PD charger, achieving dynamic compatible charging for both PD protocol-supporting and non-PD protocol-supporting devices.

[0038] Example 2: The difference between this embodiment and Embodiment 1 is that, please refer to... Figure 4 The load identification module in this embodiment also includes an overvoltage protection unit, which includes a Zener diode Z1. The anode of the Zener diode Z1 is connected to the gate of the transistor Q2, and the cathode of the Zener diode Z1 is connected to the source of the transistor Q2.

[0039] In this embodiment, the overvoltage protection unit of the load identification module can be connected in reverse parallel between the gate and source of transistor Q2 via a Zener diode Z1. This precisely clamps the voltage between the gate and source of transistor Q2, preventing excessively high gate voltage caused by power fluctuations, transient high voltages, or other abnormal conditions. This prevents transistor Q2 from being damaged by breakdown and ensures the stable operation of the path control module 31. Furthermore, when an overvoltage occurs at the power input terminal VBUS1, the Zener diode Z1 can quickly shunt current through reverse breakdown, suppressing abnormal increases in the source voltage of transistor Q2. Simultaneously, it prevents the overvoltage signal from being transmitted to the power output terminal VBUS2, thereby protecting the connected load equipment from overvoltage surges. This effectively achieves dynamic compatibility charging for different types of equipment and further enhances the power supply safety and reliability of the circuit.

[0040] Example 3: This embodiment is based on the above embodiment; please refer to [link / reference]. Figure 5 A power bank 200 is provided, including the highly compatible charging circuit 100 as described above.

[0041] The power bank 200 provided in this application, which includes a highly compatible charging circuit 100, solves the problem that traditional power banks 200 rely solely on the protocol IC to identify CC1 / CC2 signals and cannot adapt to scenarios without CC1 / CC2 devices or CC line access through the collaborative design of the load identification module, the path control module 31, and the CC line control circuit 2. By accurately detecting the load access through the load identification module and combining the collaborative judgment of the microcontroller unit MCU1 and the protocol IC, the power supply path is directly turned on for PD devices that support CC triggering. For devices that do not support CC triggering, the CC line control circuit 2 forms a 5.1K resistor to pull the CC1 / CC2 to ground, inducing the protocol IC to open the Type-C port output. This greatly expands the range of rechargeable devices, adapts to diverse daily charging needs, has good compatibility, and effectively improves the user experience.

[0042] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0043] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this application is in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0044] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0045] In this application, unless otherwise expressly specified and limited, "above or below" a first feature may include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on" a first feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" a first feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0046] Although the description of this application has been made in conjunction with the specific embodiments described above, it is obvious to those skilled in the art that many substitutions, modifications, and variations can be made based on the above description. Therefore, all such substitutions, modifications, and variations are included within the spirit and scope of the appended claims.

Claims

1. A highly compatible charging circuit, characterized in that, include: Microcontroller Unit (MCU) The CC line control circuit is electrically connected to the microcontroller unit (MCU) and is used to identify signal changes in CC1 and CC2. as well as The load identification circuit is electrically connected to the microcontroller unit (MCU) and the CC line control circuit. The load identification circuit is used to identify the load connection and control the power output. The microcontroller unit (MCU) is used for: Based on the feedback signal from the CC line control circuit, an enable signal is output to the load identification circuit to control it to turn on the power output.

2. The high-compatibility charging circuit according to claim 1, characterized in that, The load identification circuit includes a path control module and a load identification module. The load identification module is electrically connected to the path control module and is used to control the on / off state of the path control module.

3. The high-compatibility charging circuit according to claim 2, characterized in that, The load identification module includes an enable control unit, a voltage divider sampling unit, and a signal conditioning and detection unit; The output terminal of the enable control unit is connected to the input terminal of the voltage divider sampling unit; the output terminal of the voltage divider sampling unit is connected to the signal conditioning and detection unit; the path control module is connected between the enable control unit and the signal conditioning and detection unit.

4. The high-compatibility charging circuit according to claim 3, characterized in that, The enable control unit includes an enable signal input terminal VBUS_EN and a transistor Q1. The base of the transistor Q1 is connected to the enable signal input terminal VBUS_EN, the emitter of the transistor Q1 is grounded, and the collector of the transistor Q1 is connected to the voltage divider sampling unit and the enable control unit.

5. The high-compatibility charging circuit according to claim 3, characterized in that, The voltage divider sampling unit includes resistor R1 and resistor R2. One end of resistor R1 is connected to the input terminal of the enable control unit, and the other end of resistor R1 is connected to one end of resistor R2. The other end of resistor R2 is connected to the signal conditioning and detection unit. The output terminal of the voltage divider sampling unit is provided with an output voltage divider signal terminal VC.

6. The high-compatibility charging circuit according to claim 5, characterized in that, The signal conditioning and detection unit includes diode D1, resistor R4, resistor R3, transistor Q3, high-level terminal Ph_DET, and signal feedback terminal VC_IN; The cathode of diode D1 is connected to the output voltage divider signal terminal VC, and the anode of diode D1 is connected to one end of resistor R4. The other end of resistor R4 is connected to the high-level terminal Ph_DET through resistor R3; The other end of the resistor R4 is connected to the base of the transistor Q3, the emitter of the transistor Q3 is connected to the high-level terminal Ph_DET, and the collector of the transistor Q3 is connected to the signal feedback terminal VC_IN.

7. The high-compatibility charging circuit according to claim 3, characterized in that, The path control module includes a transistor Q2, a power input terminal VBUS1, and a power output terminal VBUS2; the gate of the transistor Q2 is connected to the enable control unit, the source of the transistor Q2 is connected to the output terminal of the voltage divider sampling unit, and the drain of the transistor Q2 is connected between the power input terminal VBUS1 and the power output terminal VBUS2.

8. The high-compatibility charging circuit according to claim 7, characterized in that, The load identification module further includes an overvoltage protection unit, which includes a Zener diode Z1. The anode of the Zener diode Z1 is connected to the gate of the transistor Q2, and the cathode of the Zener diode Z1 is connected to the source of the transistor Q2.

9. The high-compatibility charging circuit according to claim 8, characterized in that, The CC line control circuit includes a signal input port CCC, a control signal terminal CCC_EN, a resistor R5, and a transistor Q4; The base of transistor Q4 is connected to the control signal terminal CCC_EN, the collector of transistor Q4 is connected to the signal input port CCC through the resistor R5, and the emitter of transistor Q4 is grounded.

10. A power bank, characterized in that, Includes a highly compatible charging circuit as described in any one of claims 1-9.

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