An ATS intelligent controller

Abstract

The utility model relates to ATS controller technical field, concretely relates to an ATS intelligent controller, including mains sampling circuit, generator sampling circuit and a monitoring circuit containing voltage amplitude monitoring branch and harmonic monitoring branch. Through a switch group, the system can switch between two modes: in first working mode, two way sampling voltage is respectively connected monitoring circuit and carries out normal comparison monitoring, in second working mode, the same way sampling voltage is connected two big branch of monitoring circuit simultaneously, and the self -checking of monitoring circuit itself is completed through comparison output. The utility model realizes the dual function of power comparison and self -checking with a set of circuit, and greatly improves the reliability and security of automatic transfer switch under the prerequisite of not increasing hardware complexity.

Description

Technical Field

[0001] This utility model relates to the field of ATS controller technology, specifically to an ATS intelligent controller. Background Technology

[0002] In the field of ATS-based intelligent controllers, real-time and accurate monitoring of the output voltage of the mains power and standby generator is a core function to ensure the reliability of power supply to critical loads. The common practice in existing technologies is to employ a parallel dual-channel sampling and monitoring circuit architecture: one channel dedicated to monitoring the mains power, and the other dedicated to monitoring the generator. Each monitoring circuit typically includes an amplitude comparison circuit to determine whether the voltage is normal, and a harmonic detection circuit for analyzing power quality.

[0003] However, this "dedicated route" fixed parallel architecture has two inherent and long-overlooked technical contradictions: First, the reliability of the monitoring circuit constitutes a single point of failure in the system: analog components such as voltage comparators, operational amplifiers, and filters experience parameter drift due to temperature and time aging, and may even be damaged by transient high-voltage surges. When one of the monitoring circuits experiences performance degradation (such as a subtle shift in the comparison threshold), the controller will make decisions based on erroneous monitoring results. This could lead to serious consequences such as failing to disconnect faulty power supplies or failing to connect normal power supplies, and this type of fault caused by "referee blindness" is latent and difficult for the system itself to detect.

[0004] Second, the rigidity of hardware resources hinders functional collaboration and reconfiguration: the existing architecture permanently binds monitoring circuits to specific sampling signals, resulting in low system resource utilization and a lack of flexibility. Specifically, when one power source (such as mains power) completely fails, its corresponding dedicated monitoring circuit becomes idle, unable to provide any assistance in monitoring the other normal power source (such as a generator). Conversely, in special scenarios requiring in-depth diagnostics of a single power source, the system cannot simultaneously utilize the resources of both monitoring circuits for that signal to achieve more comprehensive analysis. This "each doing their own thing" architecture deprives the system of the opportunity to maintain or enhance monitoring capabilities through resource reconfiguration when facing partial failures.

[0005] To address the first reliability issue mentioned above, an intuitive approach is to add complete hardware redundancy circuitry to key monitoring points and use a "voting" mechanism to determine faults. However, this would undoubtedly significantly increase the number of system components, circuit board area, and overall cost, which is often unacceptable for civilian and industrial products that need to control costs and size.

[0006] Therefore, there is an urgent need in this field for a power monitoring solution that can perform online verification of its own monitoring circuits without significantly increasing hardware costs and complexity, and can also flexibly reconfigure and back up monitoring functions when necessary, so as to fundamentally improve the reliability, security and resource utilization of ATS intelligent controllers. Utility Model Content

[0007] The purpose of this invention is to provide an ATS intelligent controller that, by introducing a reconfigurable monitoring circuit and a switching group, achieves online self-testing of the monitoring circuit and mutual backup of the two monitoring functions, thereby fundamentally solving the problems of low reliability and low security caused by latent faults in the monitoring circuit of existing ATS intelligent controllers.

[0008] To achieve the above objectives, an ATS intelligent controller is provided, comprising a housing and a controller body located within the housing, the controller body comprising: The mains sampling circuit is used to obtain the mains sampling voltage; Generator sampling circuit, used to obtain generator sampling voltage; The monitoring circuit includes a voltage amplitude monitoring branch and a harmonic monitoring branch. A switching group is connected to the mains power sampling circuit, the generator sampling circuit, and the monitoring circuit, respectively; The switching group has a first operating mode and a second operating mode: In the first operating mode, the switching switch group is configured to connect the mains sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch, and to connect the generator sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch for comparison monitoring; In the second operating mode, the switching group is configured to simultaneously connect the same one of the mains sampling voltage and the generator sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch, so as to realize the self-test of the monitoring circuit.

[0009] Furthermore, the voltage amplitude monitoring branch includes one or more voltage comparators connected in series, with the inverting input of each voltage comparator connected to an adjustable reference voltage source.

[0010] Furthermore, the harmonic monitoring branch includes a bandpass filter amplifier, a peak detector, and a voltage comparator connected in sequence.

[0011] Furthermore, the switching group includes a relay or MOSFET controlled by a microprocessor unit in the controller body, and switches its connection state by a control signal from the microprocessor unit to realize the first working mode and the second working mode.

[0012] Furthermore, the switching group includes a double-pole double-throw switch. The first stationary terminal of the double-pole double-throw switch is connected to the output node of the mains sampling circuit, and the second stationary terminal is connected to the output node of the generator sampling circuit. The two moving terminals of the double-pole double-throw switch are respectively connected to the input terminal of the voltage amplitude monitoring branch and the input terminal of the harmonic monitoring branch.

[0013] Furthermore, the mains sampling circuit and / or the generator sampling circuit are also provided with a resistor switching network containing voltage dividing resistors with different voltage division ratios. The resistor switching network is used to adapt to the standard voltages of different countries, so that the amplitude range of the mains sampling voltage and the generator sampling voltage are similar under different country voltages.

[0014] Furthermore, it also includes a controller health status monitoring circuit, which includes: A temperature sensor mounted on the heat source area of ​​the power device on the circuit board of the controller body; A humidity sensor located inside the housing; A hardware watchdog circuit connected to the reset pin of the microprocessor unit in the controller body.

[0015] Furthermore, it also includes a key control hardware logic circuit, which is connected in parallel with the monitoring circuit and the microprocessor unit. Its input terminal is connected to the mains sampling voltage and generator sampling voltage nodes, its output terminal is connected to the drive terminal of the switching actuator, and it has an enable terminal controlled by the microprocessor unit. The key control hardware logic circuit consists of a high-speed voltage comparator, a reference voltage source, and basic logic gate circuits, and is configured so that its output is valid only when the enable terminal is valid.

[0016] Furthermore, it also includes a hardware linkage circuit, the input of which is connected to the output of the temperature sensor and the humidity sensor, and the output of which is connected to the enable terminal of the key control hardware logic circuit; the hardware linkage circuit is configured to block the output of the key control hardware logic circuit when the temperature or humidity exceeds a preset threshold.

[0017] Furthermore, the monitoring circuit also includes an output comparison circuit, the input terminal of which is connected to the output terminal of the voltage amplitude monitoring branch and the output terminal of the harmonic monitoring branch, respectively, and the output terminal of the output comparison circuit is used to indicate the consistency of the output signals of the two branches; the output comparison circuit includes an XOR gate or an XNOR gate.

[0018] Principles and advantages: 1. Achieving a leap from "one-way judgment" to "self-testing closed loop": The core effect of this invention lies in transforming the traditional open architecture of "two inputs to two fixed monitoring circuits" into a closed-loop architecture of "two inputs to one reconfigurable monitoring circuit" by introducing a configurable switching switch group. Through the second operating mode (self-testing mode), the system can periodically or simultaneously send the same known signal (mains power or generator) into the same monitoring circuit. By comparing the output result with the expected value, the system can accurately diagnose online whether the amplitude judgment accuracy and harmonic detection sensitivity of the monitoring circuit itself have drifted or malfunctioned, achieving periodic "check-ups" of the "judge" and eliminating the risk of hidden system faults.

[0019] 2. Achieving "One Circuit, Dual Functions" through Architectural Innovation, Optimizing Resource Utilization: This solution breaks away from the conventional thinking that independent hardware must be used to monitor independent signals. Through resource sharing and time-division multiplexing, the same set of high-precision voltage amplitude monitoring branches and harmonic monitoring branches not only undertake the task of comparing and monitoring the two power supplies under normal conditions, but also undertake the task of verifying its own reliability. This endows the system with self-diagnostic capabilities without increasing the number of core monitoring circuits, achieving a "1+1>2" effect and achieving an excellent balance between high reliability, high integration, and low cost.

[0020] 3. Provides clear fault location capabilities, facilitating maintenance: When the self-test mode detects an anomaly, it can immediately determine that the problem lies in the shared monitoring circuit section, rather than a specific independent sampling circuit at the front end. This provides maintenance personnel with clear fault location information, greatly shortening on-site troubleshooting and repair time.

[0021] 4. Enhanced system flexibility and adaptability: This architecture allows the controller to flexibly switch between normal monitoring and self-test modes without affecting core business operations. Furthermore, as a high-level system architecture, this solution is independent of specific comparator models and filter types at the lower levels, exhibiting good technical inclusiveness and product adaptability, making it easy to implement in various specifications of automatic transfer switch products.

[0022] 5. Compared to PLC controllers, this solution has a lower cost. Attached Figure Description

[0023] Figure 1 This is a logic block diagram of an ATS intelligent controller according to an embodiment of the present utility model; Figure 2 This is a schematic diagram of the circuit principle of an isolation sampling scheme based on a voltage transformer; Figure 3 This is a schematic diagram of the circuit principle of a non-isolated sampling scheme based on a resistor voltage divider network; Figure 4A schematic diagram of the circuit principle for voltage amplitude monitoring branch under DC generator conditions; Figure 5 A schematic diagram of the circuit principle for voltage amplitude monitoring branch under AC generator conditions; Figure 6 The logic block diagram for the harmonic monitoring branch; Figure 7 A schematic diagram of the mains power status judgment channel in the key control hardware logic circuit; Figure 8 A schematic diagram of the circuit principle for the generator state judgment channel in the key control hardware logic circuit; Figure 9 A schematic diagram of the core decision logic in the critical control hardware logic circuit; Figure 10 This is a schematic diagram of the hardware linkage circuit. Figure 11 A schematic diagram of a circuit that effectively blocks low-level signals. Detailed Implementation

[0024] The following detailed description illustrates the specific implementation method: Example An ATS intelligent controller, basically as follows Figure 1 As shown, the device includes a housing and a controller body located inside the housing. The controller body includes: a mains power sampling circuit, a generator sampling circuit, a monitoring circuit, a switching switch group, a controller health status monitoring circuit, a key control hardware logic circuit, and a hardware linkage circuit. The mains sampling circuit is used to obtain the mains sampling voltage; Generator sampling circuit, used to obtain generator sampling voltage; The mains sampling circuit is used to safely and accurately obtain a low-voltage, low-current mains sampling voltage signal from high-voltage mains power (such as 220V AC) for processing by subsequent circuits. In one or more embodiments of this invention, the circuit can be implemented in various ways: 1. Isolation sampling scheme based on voltage transformer: such as Figure 2 As shown, the mains sampling circuit includes a voltage transformer T1. Its primary coil is connected to the live wire (L) and neutral wire (N) of the mains power supply through a current-limiting resistor R1. The secondary coil is connected in parallel with a sampling resistor R2. A low-voltage AC signal proportional to the mains voltage and electrically isolated from the high-voltage mains power can be obtained across the sampling resistor, which serves as the mains sampling voltage. This scheme has the advantages of good isolation and high safety.

[0025] 2. Non-isolated sampling scheme based on resistor divider network: In another embodiment, such as Figure 3As shown, the mains sampling circuit consists of a high-precision, high-stability resistor voltage divider network. This network includes multiple resistors R3 and R4 connected in series between the live wire (L) and ground. By selecting an appropriate resistor ratio, a significantly reduced voltage signal is obtained from across resistor R4, which serves as the mains sampling voltage. To further improve safety and anti-interference capabilities, a voltage follower U1 composed of an operational amplifier can be connected after the voltage divider network for impedance transformation and buffering.

[0026] 3. Integrated Voltage Sensor Solution: In another embodiment, the mains sampling circuit can also employ an integrated linear optocoupler (such as HCNR200) ​​or a dedicated voltage sensing chip. These devices integrate voltage division, isolation, and signal conditioning functions into one unit, and can output a DC or AC voltage signal that is linearly proportional to the input mains voltage as the mains sampling voltage. They have the advantages of high integration and simple design.

[0027] The generator sampling circuit is used to obtain the generator sampling voltage. Its circuit is essentially the same as or similar to the mains sampling circuit. It can also be implemented using any of the above-mentioned voltage transformers, resistor divider networks or integrated sensors, which will not be described in detail here.

[0028] Preferably, to adapt to standard voltages of different countries (e.g., 100V, 120V, 220V, 230V, etc.), the resistor voltage divider network (whether independently constructed or as a load of a voltage transformer) in the mains sampling circuit and / or the generator sampling circuit is specifically designed as a switchable resistor network (resistor switching network, containing voltage divider resistors with different voltage division ratios). The resistor switching network is used to adapt to standard voltages of different countries, ensuring that the amplitude range of the mains sampling voltage and the generator sampling voltage is similar under different national voltage conditions. For example, a relay or analog switch controlled by a microprocessor unit can switch the resistors connected to the voltage divider network with different resistance values, thereby ensuring that the amplitude of the output sampling voltage always falls within the optimal operating range of the subsequent monitoring circuit under different input voltages. This ensures that the amplitude range of the mains sampling voltage and the generator sampling voltage remains similar under normal conditions, guaranteeing the accuracy of the comparison monitoring.

[0029] The monitoring circuit includes a voltage amplitude monitoring branch and a harmonic monitoring branch. The voltage amplitude monitoring branch includes one or more voltage comparators connected in series, with the inverting input of each comparator connected to an adjustable reference voltage source. The harmonic monitoring branch includes a bandpass filter amplifier, a peak detector, and a voltage comparator connected in sequence.

[0030] In this embodiment, the voltage amplitude monitoring branch includes a voltage comparator U2. Its non-inverting input receives the sampled voltage (V_in) sent through a switching switch, and its inverting input is connected to an adjustable reference voltage source Vref1. This adjustable reference voltage source can be composed of a precision resistor divider network and a voltage buffer, or its voltage value can be dynamically set by a microprocessor unit via a digital-to-analog converter (DAC). When the sampled voltage is higher than Vref1, the comparator outputs a high level, indicating normal voltage (or overvoltage); conversely, it outputs a low level. This scheme can be used for single overvoltage or undervoltage protection.

[0031] In other embodiments, the voltage amplitude monitoring branch is a multi-stage series voltage comparator: such as... Figure 4 As shown, Figure 5 As shown, to achieve complete voltage window monitoring (i.e., simultaneously determining undervoltage and overvoltage), the voltage amplitude monitoring branch uses two-stage voltage comparators (first comparator U2A and second comparator U2B) to form a window comparator. Wherein: The inverting input of the first comparator is connected to the first adjustable reference voltage source Vref_low (set to the undervoltage threshold).

[0032] The non-inverting input of the second comparator is connected to the second adjustable reference voltage source Vref_high (set to the overvoltage threshold).

[0033] The other input of both comparators receives the sampled voltage (V_in). Considering that the mains power is alternating current and the generator may be an AC generator, the sampled voltage (V_in) needs to be rectified by a precision rectifier circuit. The subsequent rectification of the sampled voltage (V_in) will not be described in detail.

[0034] The outputs of the two comparators are logically combined using subsequent basic logic gates (such as AND gates and NOR gates) to ultimately generate a clear digital signal indicating "normal voltage," "undervoltage," or "overvoltage." This design can accurately determine whether the voltage is within a preset safety window.

[0035] To prevent repeated output jumps due to minute signal fluctuations near the threshold, the voltage comparator U2 can be configured as a hysteresis comparator (Schmitt trigger). This is achieved by connecting a positive feedback resistor Rfb in parallel between the comparator's output and non-inverting input. This significantly enhances noise immunity.

[0036] The harmonic monitoring branch is used to monitor whether the content of specific harmonics (such as the third and fifth harmonics) in the voltage waveform exceeds the standard. Figure 6 As shown, its signal processing flow includes three steps: extraction, conversion, and judgment.

[0037] Bandpass filter amplifier: This can be achieved using existing structures and is used to extract specific harmonic components from the fundamental voltage. In one embodiment, it consists of an active bandpass filter circuit centered around an operational amplifier U3A. Its center frequency f0 is precisely set to the frequency of the harmonic to be monitored (e.g., 150Hz for the third harmonic). The values ​​of resistors R5, R6, R7 and capacitors C1, C2 in the circuit collectively determine the center frequency and bandwidth. This circuit not only filters out the fundamental and other harmonics but also preliminarily amplifies the target harmonic components, improving monitoring sensitivity.

[0038] Peak Detector: Existing structures are sufficient. It converts the extracted AC harmonic signal into a DC voltage that reflects its amplitude. It consists of an operational amplifier U3B, a rectifier diode D1, and a holding capacitor C3. The DC voltage at its output (V_peak) is proportional to the peak value of the input AC harmonic signal. In a more modern embodiment, a true RMS converter chip (such as AD736) can be used to replace the traditional peak detector circuit, directly outputting a DC voltage proportional to the RMS value of the harmonics. This approach provides more accurate measurements and is unaffected by waveform variations.

[0039] Voltage comparator: An existing structure can be used to determine if harmonic content exceeds the limit. Its circuit configuration is similar to the comparator in the amplitude monitoring branch. It compares the DC voltage (V_peak) output from the peak detector with a harmonic threshold reference voltage Vref_thd. Vref_thd is also provided by an adjustable reference voltage source. When V_peak is higher than Vref_thd, the comparator flips, outputting a harmonic exceedance alarm signal.

[0040] A switching group is connected to the mains power sampling circuit, the generator sampling circuit, and the monitoring circuit, respectively; The switching group has a first operating mode and a second operating mode: In the first operating mode, the switching switch group is configured to connect the mains sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch, and to connect the generator sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch, so as to perform comparison monitoring through the controller; In the second operating mode, the switching group is configured to simultaneously connect the same voltage from the mains sampling voltage and the generator sampling voltage to both the voltage amplitude monitoring branch and the harmonic monitoring branch to achieve self-testing of the monitoring circuit. In other embodiments, an output comparison circuit can be provided, with its input terminals connected to the output terminals of the voltage amplitude monitoring branch and the harmonic monitoring branch, respectively. The output terminal of the output comparison circuit is used to automatically verify the consistency between the voltage amplitude monitoring branch and the harmonic monitoring branch in the second operating mode (self-test mode). The output comparison circuit includes an XOR gate or an XNOR gate. Since the input signals are the same, the output signals of the two branches should logically be consistent. The output comparison circuit (such as the XOR gate) compares the two outputs in real time. If a difference occurs, a high-level valid fault signal is output, thereby achieving online and automatic diagnosis of the health status of the monitoring circuit itself.

[0041] The output comparator circuit is configured as follows: The core of the output comparator circuit can be a digital logic chip, such as a two-input XOR gate. The two inputs of the XOR gate are connected to: The final output signal of the voltage amplitude monitoring branch (e.g., V_Monitor_Out).

[0042] The final output signal of the harmonic monitoring branch (e.g., H_Monitor_Out).

[0043] The output of the XOR gate generates a self-test result signal (Self_Test_Result).

[0044] Work logic: When the outputs of the two branches are the same (both are high or both are low), the XOR gate outputs a low level (Self_Test_Result = 0), indicating that the self-test has passed and the internal consistency of the monitoring circuit is good.

[0045] When the outputs of the two branches are different (one high and one low), the XOR gate outputs a high level (Self_Test_Result = 1), indicating that the self-test has failed and there is a fault or drift inside the monitoring circuit.

[0046] The Self_Test_Result signal can be directly connected to an interrupt pin or a general I / O port of the microprocessor unit so that the microprocessor unit can obtain the self-test status in real time and take corresponding alarm or protection measures.

[0047] Alternative: An XNOR gate can also be used, which has the opposite logic to an XOR gate, with a high output indicating agreement and a low output indicating disagreement. Those skilled in the art can choose flexibly based on the design requirements of subsequent logic circuits.

[0048] The switching group includes relays or MOSFETs controlled by a microprocessor unit within the controller body. Its connection state is switched via control signals from the microprocessor unit to achieve the first operating mode and the second operating mode. The switching group can be connected to a programmable, intelligent system. Directly controlled by the I / O ports of the microprocessor unit (microcontroller MCU), it can implement complex automatic switching logic, remote control, etc. It is a preferred solution for achieving electronic and automated operation.

[0049] The aforementioned switch group also offers a low-cost, high-reliability, hardware-through solution. It is a purely mechanical switch, potentially manually operated, with a simple structure and strong anti-interference capability. It is simple, economical, and reliable. The switch group includes a double-pole double-throw switch. The first stationary terminal of the double-pole double-throw switch is connected to the output node of the mains sampling circuit, and the second stationary terminal is connected to the output node of the generator sampling circuit. The two moving terminals of the double-pole double-throw switch are respectively connected to the input terminals of the voltage amplitude monitoring branch and the harmonic monitoring branch.

[0050] The controller health status monitoring circuit includes: A temperature sensor is mounted on the power device's heat source area on the circuit board of the controller body; the temperature sensor can be a negative temperature coefficient (NTC) thermistor RT1. It is directly soldered onto the circuit board using surface mount technology (SMD) and is close to or located in the heat source area of ​​the power device (such as a power management chip or a driver MOSFET).

[0051] The humidity sensor is located inside the housing; its purpose is to monitor the moisture content inside the controller housing and prevent circuit corrosion, leakage or short circuit caused by condensation or excessive ambient humidity.

[0052] A hardware watchdog circuit is connected to the reset pin of the microprocessor unit in the controller body. This hardware watchdog circuit can be a dedicated watchdog timer chip (such as MAX706 or TPL5010). The microprocessor unit needs to send a "feed" pulse signal to this chip via a GPIO port within a set timeout interval. If the watchdog is not fed in time due to a program malfunction, the chip's reset output pin will generate a low-level or high-level active pulse of at least 20ms, directly acting on the microprocessor unit's reset pin to force it to restart.

[0053] A key control hardware logic circuit is configured in parallel with the monitoring circuit and the microprocessor unit. Its input is connected to the mains sampling voltage and generator sampling voltage nodes, and its output is connected to the drive terminal of the switching actuator. It also has an enable terminal controlled by the microprocessor unit. The key control hardware logic circuit consists of a high-speed voltage comparator, a reference voltage source, and basic logic gates, and is configured so that its output is only valid when the enable terminal is active. The key control hardware logic circuit has an enable terminal (EN). This enable terminal is directly connected to a GPIO pin of the microprocessor unit. Under system power-on or normal conditions, the microprocessor unit sets this enable terminal to an inactive state (e.g., low level), thereby blocking the final output of the hardware logic circuit. Only after the microprocessor unit analyzes and determines that the generator has successfully started and the voltage has stabilized will it set this enable terminal to an active state (e.g., high level). Once enabled, the key control hardware logic circuit immediately begins real-time comparison of the mains and generator voltages and determines whether to output a switching drive signal based on its hardware safety logic. When mains power is restored, the generator needs to be shut down, or the controller detects any abnormality, the microprocessor unit will immediately disable the enable pin and re-block the output. This circuit serves as a hardware redundancy backup for the microprocessor unit software. Its design goal is that even if the microprocessor unit (MCU) completely fails due to program crashes or damage, this circuit can still make safe switching decisions based on the basic voltage states of the mains power and the generator, and directly drive the actuator.

[0054] Mains power status determination channel: like Figure 7 As shown, the channel contains a window comparator consisting of high-speed voltage comparators U1A and U1B (such as LM339).

[0055] The inverting input of U1A and the non-inverting input of U1B are connected to the first reference voltage source Vref1 and the second reference voltage source Vref2, respectively. Vref1 is set to the undervoltage threshold (e.g., the sampling voltage corresponding to 185V AC), and Vref2 is set to the overvoltage threshold (e.g., the sampling voltage corresponding to 250V AC). These two reference voltage sources are preferably generated using a precision reference source chip (e.g., TL431) to ensure stability.

[0056] The non-inverting and inverting inputs of U1A and U1B both receive the mains sampling voltage.

[0057] The outputs of the two comparators are combined through a basic logic gate (e.g., an AND gate G1). The logic is as follows: if and only if the mains sampling voltage is between Vref1 and Vref2, it indicates that the mains is normal, and the AND gate G1 outputs a high level (logic "1"); otherwise (undervoltage or overvoltage), it outputs a low level (logic "0").

[0058] like Figure 8 As shown, the generator status determination channel: Its circuit structure is exactly the same as that of the mains power channel, consisting of high-speed voltage comparators U1C and U1D and AND gate G2.

[0059] The input of this channel is connected to the generator sampling voltage, and its reference voltages Vref3 and Vref4 can be set to thresholds that are the same as or different from the mains voltage.

[0060] The final output is the generator normal signal (active high).

[0061] Core decision logic: The final drive signal of the switching actuator (such as the drive relay coil) is generated by the output of the above two channels through another basic logic gate circuit. Its core safety logic is: "The action of switching to the generator is only executed when the mains power is abnormal and the generator is normal."

[0062] Specific circuit implementation: such as Figure 9 As shown, this logic can be implemented using an AND gate G3 and a NOT gate.

[0063] The normal mains power signal (from G1) is inverted by an NOT gate G4 to obtain the "normal mains power" signal.

[0064] Connect the "Main Power Abnormal" signal and the "Generator Normal" signal (from G2) to AND gate G3.

[0065] The output of AND gate G3 is the final switching drive signal: when it is high, it drives the power transistor or MOSFET in the subsequent stage to turn on, causing the switching actuator to operate and switch the load from the mains power to the generator.

[0066] The input terminal of the hardware linkage circuit is connected to the output terminals of the temperature sensor and the humidity sensor, and the output terminal of the hardware linkage circuit is connected to the enable terminal of the key control hardware logic circuit. The hardware linkage circuit is configured to block the output of the key control hardware logic circuit when the temperature or humidity exceeds a preset threshold.

[0067] This embodiment uses "active low" blocking: this is the most common and reliable blocking method. For example... Figure 10 As shown, the final output stage of the key control hardware logic circuit is provided with an AND gate G5, one of which is a switching logic signal and the other is an enable terminal (EN). The enable terminal is active low (i.e., output is blocked when EN=0 and output is enabled when EN=1).

[0068] Circuit configuration: such as Figure 11 As shown, the hardware linkage circuit includes: Two voltage comparators (U4A, U4B): used to determine temperature and humidity respectively.

[0069] An OR gate (G6): Used to implement logic for exceeding the "temperature or humidity" limit.

[0070] Work process: The outputs (analog voltage signals) of the temperature sensor and humidity sensor are sent to the non-inverting inputs of comparators U4A and U4B, respectively, and compared with the temperature threshold Vref_T and humidity threshold Vref_H set at the inverting inputs.

[0071] When either temperature or humidity is normal, the corresponding comparator outputs a low level. At this time, both inputs of OR gate G6 are low, so its output is also low. This low-level signal will not trigger a blocking mechanism.

[0072] When either temperature or humidity exceeds the limit, the corresponding comparator output will toggle to a high level. At this time, OR gate G6 receives at least one high-level input, and its output immediately toggles to a high level.

[0073] This high-level active fault signal from OR gate G6 can be used directly, or a transistor switching circuit can be used to force the enable terminal (EN, active low) of the critical control logic circuit to a low level.

[0074] Once the enable pin EN is pulled low, its internal AND gate G5 is blocked. No matter how the switching logic signal changes, the final drive output will remain in an invalid state (e.g., low level), thus achieving hardware-level output blocking.

[0075] The above descriptions are merely embodiments of this utility model. Commonly known structures and characteristics are not described in detail here. Those skilled in the art are aware of all common technical knowledge in the field prior to the application date or priority date, are capable of accessing all existing technologies in that field, and possess the ability to apply conventional experimental methods prior to that date. Therefore, those skilled in the art can, based on the guidance provided in this application, improve and implement this solution in conjunction with their own capabilities. Typical known structures or methods should not be obstacles for those skilled in the art to implement this application. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of this utility model. These modifications and improvements should also be considered within the scope of protection of this utility model, and will not affect the effectiveness of the implementation of this utility model or the practicality of the patent. The scope of protection claimed in this application should be determined by the content of its claims, and the specific embodiments described in the specification can be used to interpret the content of the claims.

Claims

1. An ATS intelligent controller, characterized in that: Includes a housing and a controller body located within the housing, the controller body comprising: The mains sampling circuit is used to obtain the mains sampling voltage; Generator sampling circuit, used to obtain generator sampling voltage; The monitoring circuit includes a voltage amplitude monitoring branch and a harmonic monitoring branch. A switching group is connected to the mains power sampling circuit, the generator sampling circuit, and the monitoring circuit, respectively; The switching group has a first operating mode and a second operating mode: In the first operating mode, the switching switch group is configured to connect the mains sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch, and to connect the generator sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch for comparison monitoring; In the second operating mode, the switching group is configured to simultaneously connect the same one of the mains sampling voltage and the generator sampling voltage to the voltage amplitude monitoring branch and the harmonic monitoring branch, so as to realize the self-test of the monitoring circuit.

2. The ATS intelligent controller according to claim 1, characterized in that: The voltage amplitude monitoring branch includes one or more voltage comparators connected in series, with the inverting input of each voltage comparator connected to an adjustable reference voltage source.

3. The ATS intelligent controller according to claim 1, characterized in that: The harmonic monitoring branch includes a bandpass filter amplifier, a peak detector, and a voltage comparator connected in sequence.

4. An ATS intelligent controller according to claim 1, characterized in that: The switching group includes relays or MOSFETs controlled by the microprocessor unit in the controller body, and switches their connection state by a control signal from the microprocessor unit to realize the first working mode and the second working mode.

5. An ATS intelligent controller according to claim 1, characterized in that: The switching group includes a double-pole double-throw switch. The first stationary terminal of the double-pole double-throw switch is connected to the output node of the mains sampling circuit, and the second stationary terminal is connected to the output node of the generator sampling circuit. The two moving terminals of the double-pole double-throw switch are respectively connected to the input terminal of the voltage amplitude monitoring branch and the input terminal of the harmonic monitoring branch.

6. An ATS intelligent controller according to claim 1, characterized in that: The mains sampling circuit and / or the generator sampling circuit are further provided with a resistor switching network containing voltage dividing resistors with different voltage division ratios. The resistor switching network is used to adapt to the standard voltage of different countries, so that the amplitude range of the mains sampling voltage and the generator sampling voltage are similar under different country voltages.

7. An ATS intelligent controller according to claim 1, characterized in that: It also includes a controller health status monitoring circuit, which includes: A temperature sensor mounted on the heat source area of ​​the power device on the circuit board of the controller body; A humidity sensor located inside the housing; A hardware watchdog circuit connected to the reset pin of the microprocessor unit in the controller body.

8. An ATS intelligent controller according to claim 7, characterized in that: It also includes a key control hardware logic circuit, which is connected in parallel with the monitoring circuit and the microprocessor unit. Its input terminal is connected to the mains sampling voltage and the generator sampling voltage node, its output terminal is connected to the drive terminal of the switching actuator, and it has an enable terminal controlled by the microprocessor unit. The key control hardware logic circuit consists of a high-speed voltage comparator, a reference voltage source and basic logic gate circuits, and is configured so that its output is valid only when the enable terminal is valid.

9. An ATS intelligent controller according to claim 8, characterized in that: It also includes a hardware linkage circuit, the input of which is connected to the output of the temperature sensor and the humidity sensor, and the output of which is connected to the enable terminal of the key control hardware logic circuit; the hardware linkage circuit is configured to block the output of the key control hardware logic circuit when the temperature or humidity exceeds a preset threshold.

10. An ATS intelligent controller according to claim 1, characterized in that: The monitoring circuit further includes an output comparison circuit. The input terminal of the output comparison circuit is connected to the output terminal of the voltage amplitude monitoring branch and the output terminal of the harmonic monitoring branch, respectively. The output terminal of the output comparison circuit is used to indicate the consistency of the output signals of the two branches. The output comparison circuit includes an XOR gate or an XNOR gate.

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