Circuit structure and power converter

Abstract

The application relates to a circuit structure and a power converter. The circuit structure comprises a conversion circuit, a capacitor, a first pin and a second pin, the first pin and the second pin are arranged at one end of a capacitor body and are electrically connected with the capacitor body, the capacitor body is connected in parallel with the conversion circuit through the first pin and the second pin, wherein the first pin is provided with a first end point and a second end point at two ends along an extension direction, the straight-line distance between the first end point and the second end point is less than the extension length of the first pin, and the second pin is provided with a third end point and a fourth end point at two ends along the extension direction, the straight-line distance between the third end point and the fourth end point is less than the extension length of the second pin. Therefore, the circuit structure and the power converter provided by the application are beneficial to prolonging the service life of the conversion circuit.

Description

Technical Field

[0001] This application relates to the field of power converter technology, and in particular to circuit structure and power converter. Background Technology

[0002] The power converters involved in this application are power conversion devices used to convert electrical energy from one form to another, realizing energy transmission and control under different power requirements. Common examples include photovoltaic inverters, energy storage converters, optimizers, microinverters, and uninterruptible power supplies (UPS). For example, a power converter can convert DC direct current to AC alternating current. The DC input terminal of the power converter is connected to a DC source (photovoltaic module), and the AC output terminal can be connected to the AC power grid and the load.

[0003] In a power converter, the power converter includes a circuit board, which comprises a primary side region and a secondary side region. The primary side region is where the primary circuitry of the power converter is located, and the secondary side region is where the secondary circuitry of the power converter is located. The primary side circuitry includes transistors and electrolytic capacitors.

[0004] However, the parasitic inductance generated by the aforementioned electrolytic capacitors can lead to a shorter lifespan for the transistors. Utility Model Content

[0005] Therefore, it is necessary to provide a circuit structure and power converter that can help extend the service life of the conversion circuit.

[0006] In a first aspect, embodiments of this application provide a circuit structure, the circuit structure including:

[0007] Conversion circuit;

[0008] A capacitor includes a capacitor body, a first pin, and a second pin. Both the first pin and the second pin are located at one end of the capacitor body and are electrically connected to the capacitor body. The capacitor body is connected in parallel to the conversion circuit through the first pin and the second pin.

[0009] The first pin has a first endpoint and a second endpoint at both ends along the extension direction, and the straight-line distance between the first endpoint and the second endpoint is less than the extension length of the first pin; the second pin has a third endpoint and a fourth endpoint at both ends along the extension direction, and the straight-line distance between the third endpoint and the fourth endpoint is less than the extension length of the second pin.

[0010] The circuit structure provided in this application embodiment sets the first and second pins to non-linear extensions, thus reducing the linear distance between the first and second endpoints of the first pin and the third and fourth endpoints of the second pin. This reduces the area of ​​the quadrilateral formed by connecting the first, second, fourth, and third endpoints sequentially, thereby reducing the area of ​​the current loop enclosed by the first and second pins. This reduces parasitic inductance and weakens the resonant energy of the LC resonant circuit formed by the parasitic inductance and the transistor's junction capacitance, significantly suppressing voltage overshoot and ringing at the drain and source, extending the lifespan of the conversion circuit, and improving the reliability, efficiency, and stability of the circuit structure. Furthermore, by reducing parasitic inductance by only changing the wiring of the first and second pins, no separate buffer circuit is needed, and no additional losses are introduced, resulting in a simpler circuit structure and reducing circuit cost.

[0011] In one embodiment, the first pin includes at least one first bend, the second pin includes at least one second bend, the at least one first bend and the at least one second bend are correspondingly disposed, and the first bend and the corresponding second bend are disposed opposite to each other and spaced apart along a first direction;

[0012] The distance between the first bend and the corresponding second bend in the first direction gradually decreases and then gradually increases along the second direction, and the first and second directions intersect.

[0013] In one embodiment, in the corresponding first bend and second bend, the first bend includes a first extension segment and a second extension segment that are connected and have different extension directions, and the second bend includes a third extension segment and a fourth extension segment that are connected and have different extension directions. The first extension segment and the third extension segment are opposite to each other and spaced apart along the first direction, and the second extension segment and the fourth extension segment are opposite to each other and spaced apart along the first direction.

[0014] The distance between the first extension segment and the third extension segment along the first direction gradually decreases as they approach the second extension segment, while the distance between the second extension segment and the fourth extension segment along the first direction gradually increases as they move away from the first extension segment.

[0015] In one embodiment, the number of first bends of the first pin is multiple, and the multiple first bends are arranged along the second direction; the number of second bends of the second pin is multiple, and the multiple second bends are arranged along the second direction.

[0016] In one embodiment, the extension length of the first pin is less than the extension length of the second pin;

[0017] In the corresponding first bend and second bend, the dimension of the first bend along the first direction is less than or equal to the dimension of the second bend along the first direction.

[0018] In one embodiment, the first pin and the second pin intersect each other. The first pin includes a fifth extension segment, a first intersection point, and a sixth extension segment connected in sequence. The second pin includes a seventh extension segment, a second intersection point, and an eighth extension segment connected in sequence. The distance between the first intersection point and the second intersection point along the first direction is 0. The distance between the fifth extension segment and the seventh extension segment along the first direction gradually increases in the direction away from the first intersection point. The distance between the sixth extension segment and the eighth extension segment along the first direction gradually increases in the direction away from the first intersection point.

[0019] In one embodiment, the conversion circuit includes a transistor, one of a first pin and a second pin being electrically connected to a first terminal of the conversion circuit, and the other of the first pin and the second pin being electrically connected to a second terminal of the conversion circuit.

[0020] In one embodiment, the distance between the capacitor and the transistor ranges from 11.7 mm to 14.3 mm.

[0021] In one embodiment, the first pin includes a first sub-pin and a second sub-pin that are connected and extend in different directions. The second sub-pin is located on the side of the first sub-pin that is away from the capacitor body. The second pin also includes a third sub-pin and a fourth sub-pin that are connected and extend in different directions. The fourth sub-pin is located on the side of the third sub-pin that is away from the capacitor body. The first sub-pin and the third sub-pin are positioned opposite each other and spaced apart along a first direction.

[0022] The maximum distance between the first sub-pin and the third sub-pin along the first direction is greater than the maximum distance between the second sub-pin and the fourth sub-pin along the first direction; and / or,

[0023] The first bend is located on the second sub-pin, and the second bend is located on the fourth sub-pin.

[0024] In one embodiment, the extension length of at least one of the first sub-pin and the third sub-pin ranges from 3.15 mm to 3.85 mm; and / or,

[0025] The distance between the first sub-pin and the third sub-pin along the first direction ranges from 7.35mm to 9mm; and / or,

[0026] The minimum distance between the second and fourth sub-pins along the first direction ranges from 2.7mm to 3.3mm; and / or,

[0027] The dimensions of at least one of the second and fourth sub-pins along the second direction range from 9mm to 11mm.

[0028] Secondly, embodiments of this application provide a power converter, which includes the circuit structure of the first aspect. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the circuit structure provided in the embodiments of this application.

[0030] Figure 2a This is a schematic diagram of the capacitor provided in an embodiment of this application.

[0031] Figure 2b This is a schematic diagram of the structure of the first pin before and after straightening, provided for an embodiment of this application.

[0032] Figure 3 This is another structural schematic diagram of the capacitor provided in an embodiment of this application.

[0033] Figure 4 This is another structural schematic diagram of the capacitor provided in an embodiment of this application.

[0034] Figure 5 This is another structural schematic diagram of the capacitor provided in an embodiment of this application.

[0035] Figure 6 This is another structural schematic diagram of the capacitor provided in an embodiment of this application.

[0036] Figure 7 This is another structural schematic diagram of the capacitor provided in an embodiment of this application.

[0037] Figure 8 A schematic diagram of the structure of an electrolytic capacitor is provided for relevant examples.

[0038] Explanation of reference numerals in the attached figures:

[0039] 100. Circuit structure; 101. Conversion circuit; 103. Capacitor; 104. Capacitor body; 110. First pin; 110a. First sub-pin; 110b. Second sub-pin; 111. First bend; 120. Second pin; 120c. Third sub-pin; 120d. Fourth sub-pin; 122. Second bend; 131. First extension segment; 132. Second extension segment; 133. Third extension segment; 134. Fourth extension segment; 135. Fifth extension segment; 136. Sixth extension segment; 137. Seventh extension segment; 138. Eighth extension segment; 141. First intersection point; 142. Second intersection point; 200. Capacitor; 210. First pin; 220. Second pin. Detailed Implementation

[0040] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0041] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0042] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0043] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0044] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0045] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0046] In related technologies, a power converter may include a primary-side circuit and a secondary-side circuit. The primary-side circuit includes a DC-DC converter circuit and an electrolytic capacitor. The electrolytic capacitor has two pins, which are connected in parallel to the DC-DC converter circuit. The DC-DC converter circuit includes a MOS (metal oxide semiconductor) transistor.

[0047] In the relevant examples, the two pins of capacitor 200 may include a first pin 210 and a second pin 220, and the first pin 210 and the second pin 220 may be bent outwards, such as... Figure 8 As shown. In this way, the length of the two pins inserted downwards can be limited when soldering capacitor 200 onto the circuit board.

[0048] However, experiments revealed that the large distance between the two pins in the aforementioned bending method introduces a significant parasitic inductance. At the moment the MOS transistor is turned off, the resonant energy of the resonant circuit formed by this parasitic inductance and the junction capacitance of the MOS transistor is high, causing severe voltage overshoot and ringing at the drain and source of the MOS transistor. The overshoot voltage spike may cause the MOS transistor to operate beyond its rated safe operating area, even leading to avalanche breakdown and threatening the device's lifespan. Furthermore, the ringing process, accompanied by repeated energy exchange, increases additional switching losses and reduces the efficiency of the circuit structure.

[0049] To address the aforementioned issues, embodiments of this application provide a circuit structure and a power converter that can extend the service life of the conversion circuit.

[0050] The following will combine Figures 1-7 The circuit structure and power converter provided in the embodiments of this application will be described.

[0051] See Figure 1 This application provides a circuit structure 100, which includes a conversion circuit 101 and a capacitor 103, with the capacitor 103 connected to the conversion circuit 101.

[0052] For example, the conversion circuit 101 can be a DC-DC conversion circuit or other conversion circuits.

[0053] In some embodiments, see Figure 1 and Figure 2a The capacitor 103 includes a capacitor body 104, a first pin 110, and a second pin 120. The capacitor body 104 is connected in parallel to the conversion circuit 101 through the first pin 110 and the second pin 120. One of the first pin 110 and the second pin 120 is electrically connected to the first terminal of the conversion circuit 101, and the other of the first pin 110 and the second pin 120 is electrically connected to the second terminal of the conversion circuit 101.

[0054] For example, the conversion circuit 101 includes a plurality of transistors, which may be MOS transistors or other transistors.

[0055] See Figure 2a and Figure 2bBoth the first pin 110 and the second pin 120 are located at one end of the capacitor body 104, and both ends of the first pin 110 and the second pin 120 are electrically connected to the capacitor body 104. The first pin 110 has a first endpoint A1 and a second endpoint A2 at its two ends along the extension direction. The straight-line distance between the first endpoint A1 and the second endpoint A2 (i.e., the length of the line connecting A1 and A2) is less than the extension length L1 of the first pin 110. The second pin 120 has a third endpoint A3 and a fourth endpoint A4 at its two ends along the extension direction. The straight-line distance between the third endpoint A3 and the fourth endpoint A4 (i.e., the length of the line connecting A3 and A4) is less than the extension length of the second pin 120. Thus, by configuring the first pin 110 and the second pin 120 as non-linear extensions, the first endpoint of the first pin 110... The smaller straight-line distance between A1 and the second endpoint A2 also results in a smaller straight-line distance between the third endpoint A3 and the fourth endpoint A4 of the second pin 120. This reduces the area of ​​the quadrilateral formed by connecting the first endpoint A1, the second endpoint A2, the fourth endpoint A4, and the third endpoint A3 sequentially, thereby reducing parasitic inductance. This weakens the resonant energy of the LC resonant circuit formed by the parasitic inductance and the transistor's junction capacitance, significantly suppressing voltage overshoot and ringing at the drain and source, thus extending the lifespan of the converter circuit 101 and improving the reliability, efficiency, and stability of the circuit structure 100. Furthermore, by reducing parasitic inductance by only changing the wiring of the first pin 110 and the second pin 120, no separate buffer circuit is needed, and no additional losses are introduced, making the circuit structure 100 simpler and reducing its cost.

[0056] It should be noted that any point on the end face of one end of the first pin 110 along the extension direction can be the first endpoint A1, and any point on the end face of the other end of the first pin 110 along the extension direction can be the second endpoint A2. For example, the midpoint of the end face of one end of the first pin 110 along the extension direction can be the first endpoint A1, and the midpoint of the end face of the other end of the first pin 110 along the extension direction can be the second endpoint A2. Similarly, any point on the end face of one end of the second pin 120 along the extension direction can be the third endpoint A3, and any point on the end face of the other end of the second pin 120 along the extension direction can be the fourth endpoint A4. For example, the midpoint of the end face of one end of the second pin 120 along the extension direction can be the third endpoint A3, and the midpoint of the end face of the other end of the second pin 120 along the extension direction can be the fourth endpoint A4. The extension length of the first pin 110 can refer to the length after the first pin 110 is stretched into a straight line. The extension length of the second pin 120 can also refer to the length after the first pin 110 is stretched into a straight line. Figure 2b The left-side first pin 110 shows the structure of the first pin 110 before it is straightened. Figure 2bThe right-side first pin 110 shows the structure after the first pin 110 is straightened.

[0057] See Figure 2a In some embodiments, the first pin 110 includes at least one first bend 111, and the number of first bends 111 can be any number of 1, 2, 3, or greater than or equal to 4. In embodiments where the number of first bends 111 of the first pin 110 is multiple, the multiple first bends 111 are arranged along the second direction Y.

[0058] See Figure 2a In some embodiments, the second pin 120 includes at least one second bend 122, and the number of second bends 122 can be any number of 1, 2, 3, or greater than or equal to 4. In embodiments where the number of second bends 122 of the second pin 120 is multiple, the multiple second bends 122 are arranged along the second direction Y.

[0059] See Figure 2a At least one first bend 111 and at least one second bend 122 are correspondingly provided. The first bend 111 and the corresponding second bend 122 are arranged opposite to each other and spaced apart along the first direction X. The distance W1 between the first bend 111 and the corresponding second bend 122 in the first direction X gradually decreases and then gradually increases along the second direction Y. In this way, by setting the corresponding first bend 111 and second bend 122, and both the first bend 111 and the second bend 122 are bent inward, the distance W1 between the middle part of the first bend 111 and the middle part of the second bend 122 along the second direction Y is small, which helps to reduce parasitic inductance, thereby extending the service life of the conversion circuit 101 and improving the reliability, efficiency and stability of the circuit structure 100. The principle has been explained and will not be repeated here.

[0060] See Figure 2aIn some embodiments, in the corresponding first bend 111 and second bend 122, the first bend 111 includes a first extension segment 131 and a second extension segment 132 that are connected and have different extending directions, and the second bend 122 includes a third extension segment 133 and a fourth extension segment 134 that are connected and have different extending directions. The first extension segment 131 and the third extension segment 133 are opposite to each other and spaced apart along the first direction X, and the second extension segment 132 and the fourth extension segment 134 are opposite to each other and spaced apart along the first direction X. The distance W1 between the first extension segment 131 and the third extension segment 133 along the first direction X gradually decreases in the direction closer to the second extension segment 132, so that the first extension segment 131 is closer to the second extension segment 132. The distance along the first direction X between the end of the second extension segment 132 and the end of the third extension segment 133 near the fourth extension segment 134 is relatively small, which helps to reduce parasitic inductance. In addition, the distance W1 between the second extension segment 132 and the fourth extension segment 134 along the first direction X gradually increases in the direction away from the first extension segment 131, making the distance along the first direction X between the end of the second extension segment 132 near the first extension segment 131 and the end of the fourth extension segment 134 near the third extension segment 133 relatively small, which helps to reduce parasitic inductance, thereby extending the service life of the conversion circuit 101 and improving the reliability, efficiency and stability of the circuit structure 100. The principle has been explained and will not be repeated here.

[0061] It should be noted that the voltage spike V = L * di / dt, where di / dt is the rate of change of current when the MOS transistor is turned off (extremely high), and L is the total parasitic inductance of the high-frequency switching current loop. By setting the first bend and the second bend, the parasitic inductance can be reduced to 1 / 3 or even less of its original value, thereby significantly reducing the core parameter L that generates the voltage spike. This weakens the resonant energy of the LC resonant circuit, thus significantly reducing the voltage overshoot and high-frequency oscillation experienced by the power MOS transistor at the moment of turn-off, providing a cleaner bus voltage, and improving the reliability, efficiency, and stability of the circuit structure 100.

[0062] For example, at least one of the first extension segment 131, the second extension segment 132, the third extension segment 133, and the fourth extension segment 134 may be a straight line. Alternatively, at least one of the first extension segment 131, the second extension segment 132, the third extension segment 133, and the fourth extension segment 134 may be an arc.

[0063] In embodiments where adjacent first extension segments 131 and second extension segments 132 are both straight lines, the transition between adjacent first extension segments 131 and second extension segments 132 is smooth to prevent the connection between adjacent first extension segments 131 and second extension segments 132 from being too sharp and causing stress concentration.

[0064] In embodiments where adjacent third extension segments 133 and fourth extension segments 134 are both straight lines, the transition between adjacent third extension segments 133 and fourth extension segments 134 is smooth to prevent the connection between adjacent third extension segments 133 and fourth extension segments 134 from being too sharp and causing stress concentration.

[0065] In some embodiments, the extension length of the first pin 110 is equal to the extension length of the second pin 120.

[0066] See Figure 4 In other embodiments, the extension length of the first pin 110 is less than the extension length of the second pin 120. This makes the extension lengths of the first pin 110 and the second pin 120 different. The first pin 110 and the second pin 120 can be quickly distinguished by observing the difference in their extension lengths. Assemblers do not need to rely on the polarity markings on the capacitor body 104, avoiding pin reversal problems caused by unclear polarity markings or obstructed vision during assembly, thus improving assembly accuracy.

[0067] See Figure 5 In some embodiments, the dimension W4 of the first pin 110 along the second direction Y is smaller than the dimension W5 of the second pin 120 along the second direction Y. This makes it easier to quickly distinguish the first pin 110 and the second pin 120 by observing the dimensions of the first pin 110 and the second pin 120 along the second direction Y, which can improve assembly accuracy. The principle has been explained and will not be repeated here.

[0068] See Figure 6 In other embodiments, the dimension W4 of the first pin 110 along the second direction Y is equal to the dimension W5 of the second pin 120 along the second direction Y. This makes the end of the first pin 110 away from the capacitor body 104 and the end of the second pin 120 away from the capacitor body 104 flush, which can reduce the difficulty of inserting the first pin 110 and the second pin 120 at the same time.

[0069] See Figure 5 In some embodiments, in the corresponding first bend 111 and second bend 122, the dimension W2 of the first bend 111 along the first direction X is equal to the dimension W3 of the second bend 122 along the first direction X. This makes the dimensions of the first bend 111 and the second bend 122 consistent along the first direction X, which helps to reduce the design difficulty of the first bend 111 and the second bend 122.

[0070] See Figure 6In other embodiments, in the corresponding first bend 111 and second bend 122, the dimension W2 of the first bend 111 along the first direction X is smaller than the dimension W3 of the second bend 122 along the first direction X. Thus, the degree of bending of the second bend 122 is greater than that of the first bend 111, resulting in a significant difference between the first bend 111 and the second bend 122. By observing the difference between the first bend 111 and the second bend 122, the first pin 110 and the second pin 120 can be quickly distinguished, which can improve assembly accuracy. The principle has been explained and will not be repeated here. In addition, in the embodiment where the extension length of the first pin 110 is less than the extension length of the second pin 120, the bending degree of the second bending portion 122 is greater than that of the first bending portion 111. This makes it easier to make the dimension W2 of the first pin 110 along the second direction Y equal to the dimension W3 of the second pin 120 along the second direction Y. This makes the end of the first pin 110 away from the capacitor body 104 and the end of the second pin 120 away from the capacitor body 104 flush, which can reduce the difficulty of simultaneous insertion of the first pin 110 and the second pin 120.

[0071] See Figure 3 In some embodiments, the first pin 110 and the second pin 120 intersect each other. The first pin 110 includes a fifth extension segment 135, a first intersection point 141, and a sixth extension segment 136 connected in sequence. The second pin 120 includes a seventh extension segment 137, a second intersection point 142, and an eighth extension segment 138 connected in sequence. The distance W1 between the first intersection point 141 and the second intersection point 142 along the first direction X is 0. The distance W1 between the fifth extension segment 135 and the seventh extension segment 137 along the first direction X gradually increases in the direction away from the first intersection point 141. The sixth extension segment 138... The distance W1 between extension segment 136 and eighth extension segment 138 along the first direction X gradually increases in the direction away from the first intersection point 141. Thus, by intersecting the first pin 110 and the second pin 120, the distance between the first pin 110 near the first intersection point 141 and the second pin 120 near the second intersection point 142 along the first direction X is reduced, which better reduces parasitic inductance, further extends the service life of the conversion circuit 101, and improves the reliability, efficiency, and stability of the circuit structure 100. The principle has been explained and will not be repeated here. The intersection of the first pin 110 and the second pin 120 can mean that, from a viewpoint perpendicular to the XY plane, the first pin 110 and the second pin 120 intersect; from a viewpoint along either the first direction X or the second direction Y, the first pin 110 and the second pin 120 are spaced apart and do not intersect.

[0072] In some embodiments, the circuit structure 100 may include an insulating element disposed between the first intersection 141 and the second intersection 142, the first intersection 141 and the second intersection 142 being isolated by the insulating element to prevent the first intersection 141 and the second intersection 142 from being too close to each other and making contact.

[0073] See Figure 7 In some embodiments, the first pin 110 includes a first sub-pin 110a and a second sub-pin 110b that are connected and extend in different directions, thereby helping to reduce the size of the first pin 110 along the second direction Y. The second sub-pin 110b is located on the side of the first sub-pin 110a away from the capacitor body 104. The second pin 120 includes a third sub-pin 120c and a fourth sub-pin 120d that are connected and extend in different directions, thereby helping to reduce the size of the second pin 120 along the second direction Y. The fourth sub-pin 120d is located on the side of the third sub-pin 120c away from the capacitor body 104. The first sub-pin 110a and the third sub-pin 120c are positioned opposite each other and spaced apart along the first direction X. The maximum distance between the first sub-pin 110a and the third sub-pin 120c along the first direction X is greater than the maximum distance between the second sub-pin 110b and the fourth sub-pin 120d along the first direction X. This makes the maximum distance between the second sub-pin 110b and the fourth sub-pin 120d along the first direction X smaller, which helps to reduce parasitic inductance, extend the service life of the conversion circuit 101, and improve the reliability, efficiency and stability of the circuit structure 100. The principle has been explained and will not be repeated here.

[0074] See Figures 4-6 In the embodiment with the first bending portion 111, the first bending portion 111 is located on the second sub-pin 110b. Thus, by placing the first bending portion 111 on the second sub-pin 110b, which is farther from the capacitor body 104, rather than on the first sub-pin 110a, excessive mechanical stress at the connection between the capacitor body 104 and the first pin 110 can be prevented from causing seal damage and subsequent leakage of the capacitor 103 during the process of bending the first pin 110 with external force to form the first bending portion 111.

[0075] See Figures 4-6 In the embodiment with the second bending portion 122, the second bending portion 122 is located at the fourth sub-pin 120d. By placing the second bending portion 122 at the fourth sub-pin 120d, which is farther away from the capacitor body 104, rather than on the third sub-pin 120c, the mechanical stress at the connection between the capacitor body 104 and the second pin 120 can be prevented from being too great, which could lead to seal damage and subsequent leakage of the capacitor 103.

[0076] In an embodiment where the first pin 110 and the second pin 120 intersect, the second sub-pin 110b and the fourth sub-pin 120d may intersect.

[0077] In some embodiments, see Figure 7 The extension length of at least one of the first sub-pin 110a and the third sub-pin 120c is in the range of 3.15mm-3.85mm. This allows the bending point between the first sub-pin 110a and the second sub-pin 110b to be far from the capacitor body 104. During the process of bending the first pin 110 with external force to make the second sub-pin 110b intersect with the first sub-pin 110a, the mechanical stress at the connection between the capacitor body 104 and the first pin 110 can be prevented from being too great, which could lead to seal damage and subsequent leakage of the capacitor 103.

[0078] For example, the extension length of at least one of the first sub-pin 110a and the third sub-pin 120c can be 3.15mm, 3.3mm, 3.5mm, 3.85mm or any value between 3.15mm and 3.85mm.

[0079] For example, see Figure 2a The distance W6 between the first sub-pin 110a and the third sub-pin 120c along the first direction X ranges from 7.35mm to 9mm. This avoids the maximum distance between the first sub-pin 110a and the third sub-pin 120c being too small, which helps reduce the difficulty of assembling the first sub-pin 110a and the third sub-pin 120c onto the capacitor body 104. In addition, it avoids the maximum distance between the first sub-pin 110a and the third sub-pin 120c being too large, which helps reduce parasitic inductance. For example, the distance W6 can be 7.35mm, 7.6mm, 8mm, 8.16mm, 8.5mm, 9mm, or any value between 7.35mm and 9mm.

[0080] For example, the minimum distance (i.e., the minimum distance W1) between the second sub-pin 110b and the fourth sub-pin 120d along the first direction X is in the range of 2.7mm-3.3mm. This avoids the minimum distance between the second sub-pin 110b and the fourth sub-pin 120d being too small, which helps to prevent the second sub-pin 110b and the fourth sub-pin 120d from contacting each other and short-circuiting. For example, this minimum distance can be 2.7mm, 2.9mm, 3mm, 3.1mm, 3.3mm, or any value between 2.7mm and 3.3mm.

[0081] For example, see Figure 6The dimensions of at least one of the second and fourth sub-pins along the second direction range from 9mm to 11mm, meaning that at least one of W4 and W5 is within the range of 9mm to 11mm. This avoids at least one of W4 and W5 being too small, which facilitates bending of the second and fourth sub-pins. Additionally, it avoids at least one of W4 and W5 being too large, which helps reduce parasitic inductance. For example, at least one of W4 and W5 can be 9mm, 9.5mm, 10mm, 10.5mm, 11mm, or any value between 9mm and 11mm.

[0082] The power converter provided in the embodiments of this application will be described below.

[0083] This application provides a power converter, which includes the circuit structure 100 described in the above embodiments. The power converter is a power conversion device that can convert DC direct current into AC alternating current. The DC input terminal of the power converter is connected to a DC source (photovoltaic module), and the AC output terminal can be connected to an AC power grid and AC equipment.

[0084] In some embodiments, the power converter may include a primary-side circuit and a secondary-side circuit, where the primary-side circuit is the DC-side circuit and the secondary-side circuit is the AC-side circuit. The primary-side circuit may include the circuit structure 100 in the above embodiments.

[0085] It should be noted that in high-speed switching circuits (especially topologies using SiC / GaN devices), if the capacitor of circuit structure 100 is close to the MOS transistor of circuit structure 100, the high resonant energy of the resonant circuit formed by the parasitic inductance of the bus loop and the junction capacitance of the MOS transistor at the moment of turn-off will generate severe voltage overshoot and ringing at the drain and source of the MOS transistor. The overshoot voltage spike may cause the MOS transistor to operate beyond its rated safe operating area, or even lead to avalanche breakdown, threatening the device life of the MOS transistor. Furthermore, the ringing process, accompanied by repeated energy exchange, will increase additional switching losses and reduce the efficiency of the circuit structure. The voltage spike V = L*di / dt, where di / dt is the rate of change of current when the MOS transistor is turned off (extremely high), and L is the total parasitic inductance of the high-frequency switching current loop. By setting the first bend and the second bend, the parasitic inductance can be reduced to 1 / 3 or even less of the original value, thereby significantly reducing the core parameter L that generates voltage spikes. This weakens the resonant energy of the LC resonant circuit, thereby significantly reducing the voltage overshoot and high-frequency oscillation experienced by the power MOS transistor at the moment of turn-off, providing a cleaner bus voltage, and improving the reliability, efficiency and stability of the circuit structure 100.

[0086] For example, the distance between capacitor 103 and transistor ranges from 11.7mm to 14.3mm. This avoids an excessively large distance between capacitor 103 and transistor, which helps to reduce the layout area of ​​circuit structure 100 and facilitates its miniaturization. Furthermore, it can mitigate voltage overshoot and ringing caused by the close proximity of capacitor 103 and transistor. For instance, the distance between capacitor 103 and transistor can be 11.7mm, 12mm, 13mm, 14mm, 14.3mm, or any value between 11.7mm and 14.3mm.

[0087] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0088] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A circuit structure, characterized in that, The circuit structure includes: Conversion circuit; The capacitor includes a capacitor body, a first pin, and a second pin. The first pin and the second pin are both located at one end of the capacitor body and are electrically connected to the capacitor body. The capacitor body is connected in parallel to the conversion circuit through the first pin and the second pin. Wherein, the first pin has a first endpoint and a second endpoint respectively at both ends along the extension direction, and the straight-line distance between the first endpoint and the second endpoint is less than the extension length of the first pin; the second pin has a third endpoint and a fourth endpoint respectively at both ends along the extension direction, and the straight-line distance between the third endpoint and the fourth endpoint is less than the extension length of the second pin.

2. The circuit structure according to claim 1, characterized in that, The first pin includes at least one first bend, and the second pin includes at least one second bend. At least one first bend and at least one second bend are correspondingly arranged, and the first bend and the corresponding second bend are arranged opposite to each other and spaced apart along a first direction. The distance between the first bend and the corresponding second bend in the first direction gradually decreases and then gradually increases along the second direction, and the first direction and the second direction intersect.

3. The circuit structure according to claim 2, characterized in that, In the corresponding first bend and second bend, the first bend includes a first extension segment and a second extension segment that are connected and have different extension directions, and the second bend includes a third extension segment and a fourth extension segment that are connected and have different extension directions. The first extension segment and the third extension segment are opposite to each other and spaced apart along the first direction, and the second extension segment and the fourth extension segment are opposite to each other and spaced apart along the first direction. The distance between the first extension segment and the third extension segment along the first direction gradually decreases as it approaches the second extension segment, while the distance between the second extension segment and the fourth extension segment along the first direction gradually increases as it moves away from the first extension segment.

4. The circuit structure according to claim 2 or 3, characterized in that, The first pin has multiple first bends, which are arranged along a second direction. The second pin has multiple second bends, which are arranged along a second direction.

5. The circuit structure according to claim 2 or 3, characterized in that, The extension length of the first pin is less than the extension length of the second pin; In the corresponding first bend and second bend, the dimension of the first bend along the first direction is less than or equal to the dimension of the second bend along the first direction.

6. The circuit structure according to claim 1, characterized in that, The first pin and the second pin intersect each other. The first pin includes a fifth extension segment, a first intersection point, and a sixth extension segment connected in sequence. The second pin includes a seventh extension segment, a second intersection point, and an eighth extension segment connected in sequence. The distance between the first intersection point and the second intersection point along the first direction is 0. The distance between the fifth extension segment and the seventh extension segment along the first direction gradually increases in the direction away from the first intersection point. The distance between the sixth extension segment and the eighth extension segment along the first direction gradually increases in the direction away from the first intersection point.

7. The circuit structure according to any one of claims 1-3, characterized in that, The conversion circuit includes a transistor, one of the first pin and the second pin is electrically connected to a first terminal of the conversion circuit, and the other of the first pin and the second pin is electrically connected to a second terminal of the conversion circuit.

8. The circuit structure according to claim 7, characterized in that, The distance between the capacitor and the transistor ranges from 11.7 mm to 14.3 mm.

9. The circuit structure according to claim 2 or 3, characterized in that, The first pin includes a first sub-pin and a second sub-pin that are connected and extend in different directions. The second sub-pin is located on the side of the first sub-pin that is away from the capacitor body. The second pin includes a third sub-pin and a fourth sub-pin that are connected and extend in different directions. The fourth sub-pin is located on the side of the third sub-pin that is away from the capacitor body. The first sub-pin and the third sub-pin are arranged opposite to each other and spaced apart along a first direction. The maximum distance between the first sub-pin and the third sub-pin along the first direction is greater than the maximum distance between the second sub-pin and the fourth sub-pin along the first direction; and / or, The first bend is located at the second sub-pin, and the second bend is located at the fourth sub-pin.

10. The circuit structure according to claim 9, characterized in that, The extension length of at least one of the first sub-pin and the third sub-pin ranges from 3.15mm to 3.85mm; and / or, The distance between the first sub-pin and the third sub-pin along the first direction ranges from 7.35mm to 9mm; and / or, The minimum distance between the second sub-pin and the fourth sub-pin along the first direction ranges from 2.7mm to 3.3mm; and / or, The dimension of at least one of the second sub-pin and the fourth sub-pin along the second direction is in the range of 9mm-11mm.

11. A power converter, characterized in that, The power converter includes the circuit structure described in any one of claims 1-10.

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