Embedded system and terminal device

Abstract

The application discloses an embedded system and a terminal device, and relates to the technical field of embedded communication, wherein the embedded system is used for establishing a communication connection with an external device, and comprises: a system-level chip used for communicating with the external device in a wireless communication mode or used for communicating with the external device through at least a network; a wireless communication module connected with the system-level chip and used for providing a wireless communication path; and a wired communication module used for providing a wired communication path. The application replaces the combination of a traditional master control chip and an independent module chip with a highly integrated system-level chip, and directly connects the system-level chip with the wired communication module to access the network, and directly connects the wireless communication module with the system-level chip to establish the wireless communication path, so that the hardware connection relationship among the chips in the system is simplified, and the integration, reliability and communication flexibility of the embedded system are improved.

Description

Technical Field

[0001] This application relates to the field of embedded communication technology, and in particular to an embedded system and terminal device. Background Technology

[0002] With the rapid development of IoT technology, embedded systems are increasingly being used in complex scenarios such as industrial control, smart homes, and asset tracking. These scenarios often place comprehensive and high demands on the communication capabilities and location services of devices. Not only do devices need to support short-range Bluetooth communication, long-range low-power WiFi Halow connectivity, and high-precision indoor and outdoor positioning, but they also need to have stable and reliable wired network access as a redundancy backup or high-speed data transmission channel.

[0003] However, existing embedded systems are often designed with a main control chip and multiple module chips, all of which need to be electrically connected to the main control chip. This results in a large number of chips used in the system, complex interconnections, and difficulties in maintenance. For example, because the signals from the main control chip and network signals use different signal types, a separate switch chip is needed to match these two signals to connect the main control chip to the network. Furthermore, the communication functions of existing embedded systems are usually relatively simple, failing to meet the comprehensive data transmission requirements of modern complex embedded systems, thus limiting the performance and reliability of embedded systems. Utility Model Content

[0004] The main purpose of this application is to propose an embedded system and terminal device, which aims to solve the technical problems of complex internal hardware structure and limited communication methods in current embedded systems.

[0005] To achieve the above objectives, the embedded system proposed in this application is used to establish a communication connection with external devices, and the embedded system includes: A system-on-a-chip (SoC) for communicating with the external device wirelessly, or for communicating with the external device at least via a network; A wireless communication module, which is connected to the system-on-a-chip (SoC) and is used to provide a wireless communication path between the SoC and the external device. A wired communication module is connected to the system-on-a-chip (SoC) and is used to provide a wired communication path between the SoC and the network, so as to communicate with the external device through the network.

[0006] In one embodiment, the wireless communication module includes: The HaLow module is connected to the first general-purpose serial data interface and the first secure digital input / output interface of the system-on-a-chip, respectively, and is used to provide a WiFi communication path in the first frequency band between the system-on-a-chip and the external device. The WiFi and Bluetooth modules are respectively connected to the third general-purpose serial data interface and the second secure digital input / output interface of the system-on-a-chip (SoC), and are used to provide WiFi communication paths and Bluetooth communication paths in a second frequency band between the SoC and the external device, wherein the second frequency band is greater than the first frequency band.

[0007] In one embodiment, the HaLow module includes: The HaLow unit is connected to the first general-purpose serial data interface and the first secure digital input / output interface of the system-on-a-chip, respectively. A first antenna is connected to the HaLow unit and is used to transmit and receive WiFi communication data in the first frequency band for the HaLow unit. A storage unit, which is connected to the HaLow unit via a serial peripheral interface, is used to store the data file of the HaLow module unit; A first power source is connected to both the HaLow unit and the storage unit, and is used to supply power to the HaLow unit and the storage unit. A first debugging interface is connected to the third general-purpose serial data interface of the HaLow unit and is used to debug the HaLow unit.

[0008] In one embodiment, the second frequency band includes a third frequency band and a fourth frequency band, and the WiFi and Bluetooth module includes: WiFi and Bluetooth unit, wherein the WiFi and Bluetooth unit are respectively connected to the second universal serial data interface and the second secure digital input / output interface of the system-on-a-chip, wherein the third universal serial data interface is used to transmit Bluetooth data and the second secure digital input / output interface is used to transmit WiFi data; A second antenna is connected to the WiFi and Bluetooth unit and is used to transmit and receive WiFi communication data in a third frequency band for the WiFi and Bluetooth unit, wherein the third frequency band is greater than the first frequency band; A third antenna is connected to the WiFi and Bluetooth unit and is used to transmit and receive WiFi communication data in a fourth frequency band for the WiFi and Bluetooth unit, wherein the fourth frequency band is greater than the third frequency band; A second power source is connected to the WiFi and Bluetooth unit and is used to supply power to the WiFi and Bluetooth unit.

[0009] In one embodiment, the wired communication module includes a network transformer connected to the system-on-a-chip for transmitting Ethernet data and / or providing power for the operation of the embedded system.

[0010] In one embodiment, the embedded system further includes a positioning module connected to the system-on-a-chip (SoC) and used to provide position data to the SoC. The positioning module includes: A positioning unit is connected to the fourth and fifth universal serial data interfaces of the system-on-a-chip (SoC) respectively, and is used to provide position data to the SoC. A fourth antenna, connected to the positioning unit, is used to receive satellite signals for the positioning unit to determine location data. A third power source is connected to both the positioning unit and the fourth antenna, and is used to supply power to the positioning unit and the fourth antenna. The second debugging interface is connected to the serial interface of the positioning unit and is used to debug the positioning unit.

[0011] In one embodiment, the embedded system further includes: A mask read-only memory button, which is connected to the system-on-a-chip (SoC) and is used to trigger the SoC to enter the mask read-only memory mode; A recovery button, which is connected to the system-on-a-chip (SoC), is used to trigger the SoC to enter recovery mode.

[0012] In one embodiment, the embedded system further includes: A Universal Serial Bus (USB) programming port is connected to the system-on-a-chip (SoC) and is used to program the SoC.

[0013] In one embodiment, the embedded system further includes: A debug serial interface, connected to the system-on-a-chip (SoC), is used for debugging the SoC; and / or A rate indicator light, connected to the system-on-a-chip (SoC), is used to display the network transmission rate status of the SoC; and / or Link indicator light, connected to the system-on-a-chip (SoC), is used to display the network connection status of the SoC; and / or A clock module is connected to the integrated circuit bus interface of the system-on-a-chip (SoC) and is used to provide real-time clock information to the SoC.

[0014] This application also proposes a terminal device, which is equipped with an embedded system and a power management system as described above. The power management system is connected to the system-on-a-chip and the wireless communication module in the embedded system, respectively, and is used to provide power to the system-on-a-chip and the wireless communication module.

[0015] This application significantly reduces the number of chips required for the embedded system by replacing the traditional combination of main control chip and independent module chips with a highly integrated system-on-a-chip (SoC). The SoC's built-in interface allows direct connection to a wired communication module for network access, while the wireless communication module directly connects to the SoC to establish a wireless communication path. This simplifies the hardware connections between chips within the system, thereby resolving the complexity and maintenance difficulties caused by multi-chip collaboration in existing embedded systems. Furthermore, it enables the embedded system to flexibly choose between direct wireless communication or network communication with external devices based on scenario requirements, improving the integration, reliability, and communication flexibility of the embedded system. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0017] Figure 1 A schematic diagram of the structure of an embodiment of the embedded system provided in this application; Figure 2 A schematic diagram of the positioning module structure of an embodiment of the embedded system provided in this application; Figure 3 A schematic diagram of the WiFi and Bluetooth module structure of an embodiment of the embedded system provided in this application; Figure 4 A schematic diagram of the HaLow module structure of an embodiment of the embedded system provided in this application; Figure 5 This is a schematic diagram of the overall system framework of an embodiment of the embedded system provided in this application.

[0018] Explanation of icon numbers:

[0019] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0021] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a specific posture. If the specific posture changes, the directional indicators will also change accordingly.

[0022] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the use of "and / or" or "and / or" throughout the text includes three parallel solutions. For example, "A and / or B" includes solution A, solution B, or a solution that simultaneously satisfies A and B. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0023] Existing embedded systems are typically designed with a main control chip and multiple module chips. These module chips all need to be electrically connected to the main control chip, resulting in a large number of chips used in the system, complex interconnections, and difficulties in maintenance. For example, because the signals from the main control chip and network signals differ in their signal characteristics, a separate switch chip is required to match these two signals, enabling the main control chip to connect to the network. Furthermore, the communication functions of existing embedded systems are usually relatively limited, failing to meet the comprehensive data transmission requirements of modern complex embedded systems, thus restricting the performance and reliability of embedded systems.

[0024] Based on this, this application proposes an embedded system for establishing a communication connection with an external device. The embedded system includes: a system-on-a-chip (SoC) for communicating with the external device wirelessly, or for communicating with the external device at least via a network; a wireless communication module connected to the SoC for providing a wireless communication path between the SoC and the external device; and a wired communication module connected to the SoC for providing a wired communication path between the SoC and the network, so as to communicate with the external device via the network.

[0025] This application significantly reduces the number of chips required for the embedded system by replacing the traditional combination of main control chip and independent module chips with a highly integrated system-on-a-chip (SoC). The SoC's built-in interface allows direct connection to a wired communication module for network access, while the wireless communication module directly connects to the SoC to establish a wireless communication path. This simplifies the hardware connections between chips within the system, thereby resolving the complexity and maintenance difficulties caused by multi-chip collaboration in existing embedded systems. Furthermore, it enables the embedded system to flexibly choose between direct wireless communication or network communication with external devices based on scenario requirements, improving the integration, reliability, and communication flexibility of the embedded system.

[0026] This application proposes an embedded system.

[0027] Please see Figure 1 In one embodiment of this application, the embedded system is used to establish a communication connection with an external device, and the embedded system includes: The system-on-a-chip 10 is used to communicate with the external device wirelessly, or to communicate with the external device at least via a network; The wireless communication module 20 is connected to the system-on-chip 10 and is used to provide a wireless communication path between the system-on-chip 10 and the external device. A wired communication module 30 is connected to the system-on-a-chip 10 and is used to provide a wired communication path between the system-on-a-chip 10 and the network so as to communicate with the external device through the network.

[0028] It should be noted that the system-on-chip 10 is the control center and data processing core of the entire embedded system. The system-on-chip 10 connects to external functional modules through various interfaces. These interfaces include a general-purpose serial data interface, a secure digital input / output interface, and a serial peripheral interface. The system-on-chip 10 is responsible for running the main system program and, according to the needs of real-time application scenarios, performs task scheduling and coordinated control of the connected functional modules, such as starting and stopping specific modules or switching between different communication modules, thereby managing the overall system's operating status. The system-on-chip 10 is the data interaction center and functional integration core of the entire data center. In one embodiment, it uses an RK3528A Cortex-A53 64-bit quad-core processor with a clock speed of 2.0 GHz and a Mali450MP2 GPU.

[0029] The wireless communication module 20 is a collection of functional components that provide wireless data transmission paths for the system-on-a-chip (SoC) 10. For example, the geographic location data acquired by the positioning module 40, after being processed by the SoC 10, is transmitted via wireless communication module 20 to other external devices, such as mobile robots, to establish wireless data transmission paths. Specifically, the wireless communication module 20 may include, but is not limited to, HaLow modules dedicated to long-range, low-power communication, and WiFi and Bluetooth modules supporting conventional WiFi bands and short-range Bluetooth communication. These modules connect to the SoC 10 through their respective universal serial data interfaces or secure digital input / output interfaces, enabling the system to flexibly select and use the most suitable wireless communication method based on different communication distance, power consumption, or rate requirements.

[0030] The wired communication module 30 is a functional component that provides wired network access capability for the system-on-a-chip 10. Its core components typically include a network transformer and corresponding physical network cable connection interfaces. This module is responsible for converting and transmitting wired network signals such as Ethernet, providing the system-on-a-chip 10 with a stable and reliable data communication channel free from wireless interference. It is often used as an important path for high-speed data transmission or wireless communication backup.

[0031] In one embodiment, the wired communication module 30 can be used not only for data communication but also to provide power for the embedded system. The wired communication module 30 adopts PoE technology, which is a technology that transmits data and power simultaneously over an Ethernet cable. It can use the IEEE 802.3at standard to provide power to the system.

[0032] For example, the embedded system uses a system-on-a-chip (SoC) 10 as its core control hub, and physically connects to peripheral functional modules through its integrated hardware interfaces: The wireless communication module 20 connects to the SoC 10 via a universal serial data interface and a secure digital input / output interface, forming a wireless communication path; the wired communication module 30 connects to the SoC 10 via a network transformer and a network cable interface, forming a wired communication path; and the positioning module 40 connects to the SoC 10 via a universal serial data interface, forming a positioning data transmission path. These modules, through the aforementioned specific physical interfaces, together with the SoC 10, construct an integrated hardware structure, enabling the system to integrate multiple communication and positioning functions. When the embedded system is operating, the location information obtained by the positioning module 40 is uploaded to the SoC 10. The SoC 10 can then transmit this location information to other external devices via the wireless communication module 20 or the wired communication module 30, allowing these external devices to obtain the location information. These other external devices could be, for example, mobile robots.

[0033] This application significantly reduces the number of chips required for the embedded system by replacing the traditional combination of a main control chip and independent module chips with a highly integrated system-on-a-chip (SoC) 10. The SoC 10 is directly connected to the wired communication module 30 via its built-in interface to access the network, while the wireless communication module 20 is directly connected to the SoC 10 to establish a wireless communication path. This simplifies the hardware connection between chips within the system and solves the problems of complexity and maintenance difficulties caused by multi-chip collaboration in existing embedded systems. Furthermore, it enables the embedded system to flexibly choose to communicate with external devices wirelessly or via a network, depending on the scenario requirements, thereby improving the integration, reliability, and communication flexibility of the embedded system.

[0034] In one embodiment, please refer to Figure 2 The embedded system further includes a positioning module 40, which is connected to the system-on-a-chip 10 and is used to provide position data to the system-on-a-chip 10. The positioning module 40 includes: The positioning unit 41 is connected to the fourth universal serial data interface UART4 and the fifth universal serial data interface UART5 of the system-on-chip 10, respectively, and is used to provide position data for the system-on-chip 10. The fourth antenna 42 is connected to the positioning unit 41 and is used to receive satellite signals for the positioning unit 41 to determine location data. The third power supply 43 is connected to the positioning unit 41 and the fourth antenna 42 respectively, and is used to supply power to the positioning unit 41 and the fourth antenna 42. The second debugging interface 44 is connected to the serial interface SPI of the positioning unit 41 and is used to debug the positioning unit 41.

[0035] It should be noted that the positioning module 40 is a functional unit that provides accurate geographic location data to the system-on-chip 10. This module includes a high-precision positioning unit 41, which interacts with the system-on-chip 10 via a universal serial data interface to exchange commands and data. The positioning module 10 also integrates a fourth antenna 42 specifically for receiving satellite signals. By analyzing these signals, it determines its own position and uploads the generated position information to the system-on-chip 10 for use by the entire system or external devices. Specifically, the positioning module 40 uploads the generated position information to the system-on-chip 10. The system-on-chip 10 can choose to communicate with the external device (robot) wirelessly, or at least via a network. When communicating wirelessly, the system-on-chip 10 is connected to the wireless communication module 20, which provides a wireless communication path between the system-on-chip 10 and the external device. When communicating with the external device at least via a network, the system-on-chip establishes a communication connection with a router via a wired communication module 30, the router establishes a network connection with a cloud server, and the external device (robot) establishes a network connection with the cloud server.

[0036] The positioning unit 41 is a core processing chip within a high-precision positioning module, such as the main chip of an RTK positioning module. This chip connects to the fourth universal serial data interface (UART4) and the fifth universal serial data interface (UART5) of the system-on-a-chip (SoC) 10 via its two serial interfaces (different from the serial interface used to connect to the second debugging interface 44). It is responsible for processing satellite signals to generate precise position data and transmitting this data to the SoC 10 through these interfaces. This replaces the traditional method of connecting the positioning unit to the transparent chip via a set of serial ports, further simplifying the circuit structure. For example, when the second debugging interface 44 is connected to the first serial interface COM1 of the positioning unit 41 for debugging the positioning unit 41, the positioning unit 41 can connect to the fourth universal serial data interface (UART4) of the SoC 10 via the second serial interface COM2, and to the fifth universal serial data interface (UART5) of the SoC 10 via the third serial interface COM3.

[0037] The positioning unit 41 can provide a high-precision PPS (Pulse Per Second) signal to the system-on-a-chip 10 via the aforementioned serial interface for time synchronization of the system-on-a-chip 10, thereby improving the system's time accuracy. This is crucial for applications requiring time synchronization, such as data acquisition and communication synchronization. Simultaneously, the system-on-a-chip 10 can send an RST (Reset) signal to the positioning unit 41 via the same serial interface. The system-on-a-chip 10 uses this signal to reset the positioning unit 41. When the positioning unit 41 malfunctions, the system-on-a-chip 10 can send an RST signal to restart the positioning unit 41 and restore its normal operation.

[0038] The fourth antenna 42 is a physical antenna element used to receive satellite navigation signals, such as GPS or BeiDou antennas. This antenna is connected to the satellite signal input port of the positioning unit 41 via an RF transmission line and is specifically used to receive RF signals from navigation satellites and transmit them to the positioning unit 41 for processing.

[0039] The third power supply 43 is an independent power management circuit. This circuit is connected to the power input pins of the positioning unit 41 and the fourth antenna 42 via power lines. This power supply converts the system input voltage and provides a stable and clean power supply to the active circuit of the positioning unit 41 and the built-in low-noise amplifier of the fourth antenna 42.

[0040] The second debugging interface 44 is a physical connector that serves as a debugging port, connected via a wire to a serial interface COM1 (Cluster Communication Port) on the positioning unit 41. Developers can use this interface to connect external debugging devices and communicate directly with the positioning unit 41 to monitor its operational status, output raw observation data, or configure parameters. Specifically, the serial interface COM1 refers to a universal asynchronous transceiver hardware interface on the positioning unit. This hardware interface is connected to the second debugging interface 44 through pins and circuit board traces within the positioning unit 41, forming a physical communication channel between the positioning unit 41 and external debugging devices.

[0041] It is understandable that if the key hardware structure and connection relationships required for high-precision positioning within the positioning module 40 are not clearly defined, the module may fail to achieve the expected accuracy or be difficult to maintain in practical applications due to poor signal reception quality, unstable power supply, or lack of debugging methods. Therefore, this embodiment constructs a complete positioning subsystem by using a positioning unit 41, a fourth antenna 42, a third power supply 43, and a second debugging interface 44, and connecting these components through physical means such as radio frequency transmission lines, power supply lines, and serial interfaces. This avoids problems such as decreased positioning accuracy, unreliable data, and difficulty in troubleshooting caused by insufficient antenna performance, power supply interference, or lack of dedicated debugging ports. As a result, the positioning module 40 can stably receive satellite signals, accurately calculate its position, and provide an effective debugging channel, ensuring the reliability and maintainability of the high-precision positioning function of the embedded system.

[0042] In one feasible implementation, the wireless communication module 20 includes: HaLow module 21 is connected to the first general-purpose serial data interface UART1 and the first secure digital input / output interface SDIO1 of the system-on-chip 10, respectively, and is used to provide a WiFi communication path in the first frequency band between the system-on-chip 10 and the external device. WiFi and Bluetooth module 22 is connected to the second universal serial data interface UART2 and the second secure digital input / output interface SDIO2 of the system-on-a-chip 10, respectively, and is used to provide WiFi communication path and Bluetooth communication path in a second frequency band between the system-on-a-chip 10 and the external device, wherein the second frequency band is greater than the first frequency band.

[0043] It should be noted that the HaLow module 21 is an independent wireless communication functional unit. Its core is a HaLow unit operating in a specific low-frequency band. This module establishes two independent physical connection paths with the system-on-a-chip (SoC) through its internal circuitry for transmitting different types of data and control signals. The first universal serial data interface, UART1, is a hardware communication interface provided on the SoC 10. Its physical form is typically a UART (Universal Asynchronous Receiver and Transmitter) interface. This interface is connected to the HaLow module 21 via circuit traces and is mainly used for transmitting low-speed data such as control commands and status information between the SoC and the HaLow module. The first secure digital input / output interface, SDIO1, is another hardware communication interface provided on the SoC 10. Its physical form is typically an SDIO (Secure Digital Input and Output) interface. This interface is connected to the HaLow module 21 via circuit traces and is mainly used for high-speed wireless data exchange between the SoC 10 and the HaLow module 21.

[0044] Furthermore, the first frequency band refers to the wireless operating frequency band specified by the WiFi HaLow protocol, specifically a frequency band below 1 GHz, such as 915 MHz. This frequency band is characterized by long propagation distance and strong penetration capability, making it suitable for long-distance, low-power IoT communication scenarios.

[0045] WiFi and Bluetooth module 22 is another independent wireless communication functional unit. Its core is a composite communication unit that integrates conventional WiFi and Bluetooth functions. This module establishes two independent physical connection paths with system-on-a-chip 10 through internal circuitry to process WiFi data and Bluetooth data respectively. The second universal serial data interface (UART2) is a hardware communication interface provided on the system-on-chip (SoC) 10. Its physical form is typically a UART interface. This interface is connected to the WiFi and Bluetooth module 22 via circuit traces and is specifically used to transmit Bluetooth communication-related data between the SoC 10 and the module, such as a host wake-up signal for Bluetooth. The SoC 10 uses this signal to control the wake-up / sleep state of the Bluetooth sub-module in the WiFi and Bluetooth module 22, thus achieving power management. The second secure digital input / output interface (SDIO2) is another hardware communication interface provided on the SoC 10. Its physical form is typically an SDIO interface. This interface is connected to the WiFi and Bluetooth module 22 via circuit traces and is specifically used to transmit WiFi communication-related data between the SoC 10 and the module, such as a host wake-up signal for WiFi. The SoC 10 uses this signal to control the wake-up / sleep state of the WiFi sub-module in the WiFi and Bluetooth module 22, also achieving power management.

[0046] In addition, the second frequency band refers to the conventional WiFi operating frequency band, supported by WiFi and Bluetooth modules, which is higher than the first frequency band. These typically include bands such as 2.4GHz and 5GHz. These bands offer higher data transmission rates but have relatively smaller coverage areas.

[0047] In one embodiment, the WiFi and Bluetooth module 22 uses a WiFi 6 solution module, supports 2.4G / 5G dual-band with bandwidth of 20M / 40M / 80M, and also has BT5.3 Bluetooth functionality.

[0048] Understandably, since the wireless communication module 20 may be of a single form and cannot achieve an optimal balance between different communication requirements such as coverage, power consumption, and speed, this embodiment specifically divides the wireless communication module 20 into a low-frequency HaLow module 21 and a WiFi and Bluetooth module 22 that supports high-frequency WiFi and Bluetooth (the WiFi and Bluetooth module 22 specifically includes a WiFi module and a Bluetooth module). Both are connected to the system-on-a-chip 10 through independent universal serial data interfaces and secure digital input / output interfaces, respectively. This avoids the problem that a single communication module cannot simultaneously meet the requirements of long-distance, low-power, high-speed, and short-distance communication. Thus, the embedded system can flexibly and stably switch and coordinate between various wireless modes, such as long-distance low-power communication and short-distance high-speed communication, according to the real-time scenario. In a possible operating scenario, the system-on-a-chip 10 determines whether to use the HaLow module 21, the WiFi module, or the Bluetooth module 22 for wireless signal transmission according to a preset priority. For example, if the preset priority is signal strength, the system-on-a-chip 10 selects the module with the strongest signal strength from the HaLow module 21, the WiFi module, or the Bluetooth module 22 for wireless communication. For example, the preset priority is HaLow module 21, WiFi module or Bluetooth module 22 in sequence. The system chip 10 installs the module with the highest priority in this order to conduct wireless communication. If the currently selected module fails or becomes unresponsive, it will switch to other modules in sequence to conduct wireless communication.

[0049] In the specific implementation process, please refer to Figure 3 The HaLow module 21 includes: HaLow unit 211, which is connected to the first general-purpose serial data interface UART1 and the first secure digital input / output interface SDIO1 of the system-on-chip 10 respectively; The first antenna 212 is connected to the HaLow unit 212 and is used to transmit and receive WiFi communication data in the first frequency band for the HaLow unit 211. Storage unit 213, which is connected to the HaLow unit 212 via a serial peripheral interface SPI, is used to store the data file of the HaLow module unit 212; A first power supply 214 is connected to the HaLow unit 211 and the storage unit 213 respectively, and is used to supply power to the HaLow unit 211 and the storage unit 213. The first debugging interface 215 is connected to the third general-purpose serial data interface UART3 of the HaLow unit 211 and is used to debug the HaLow unit 211.

[0050] It should be noted that the HaLow unit 211 is the core processing chip inside the HaLow module 21. This chip has baseband and radio frequency processing capabilities that conform to the WiFi HaLow protocol standard. It is directly connected to the first general-purpose serial data interface UART1 and the first secure digital input / output interface SDIO1 of the system-on-a-chip 10 through physical circuits. It is responsible for handling all data modulation and demodulation and protocol conversion related to WiFi HaLow communication. This replaces the traditional method of HaLow unit using SPI (Serial Peripheral Interface) to connect to the main control chip. Instead, the SPI interface of HaLow unit 211 is only connected to the storage unit 213, which further simplifies the circuit structure.

[0051] The first antenna 212 is a physical antenna element connected to the radio frequency output port of the HaLow unit 211 via a radio frequency transmission line. This antenna is tuned to a first frequency band to convert the radio frequency electrical signal generated by the HaLow unit 211 into electromagnetic waves for outward radiation, and to receive first-frequency electromagnetic wave signals from the outside world.

[0052] Storage unit 213 can be a flash memory chip, which is connected to HaLow unit 211 via a physical connection of serial peripheral interface SPI. It provides non-volatile storage space for HaLow unit 211 in hardware for storing data files such as firmware, configuration information or temporary data.

[0053] The first power supply 214 is a power management circuit. This circuit is connected to the power input pins of the HaLow unit 211 and the storage unit 213 through power lines. This power supply converts the system input voltage into the operating voltage required by the HaLow unit 211 and the storage unit 213, providing a stable power supply for these two units.

[0054] The first debug interface 215 is a physical connector that serves as a debug port, connected via wires to a third universal serial data interface (UART3) on the HaLow unit 211. Developers can connect external debug devices through this interface to communicate directly with the HaLow unit 211, thereby enabling monitoring and debugging of the module's internal state. The third universal serial data interface (UART3) can be the same universal serial data interface as the first universal serial data interface (UART1), or it can be a different universal serial data interface on the system-on-a-chip (SoC) 10. This embodiment does not specifically limit the third universal serial data interface (UART3).

[0055] It is understandable that the HaLow module 21 cannot work independently and stably if it lacks the necessary supporting circuits and structures. Therefore, this embodiment integrates the HaLow unit 211, the first antenna 212, the storage unit 213, the first power supply 214, and the first debugging interface 215 inside the HaLow module 21. These components are combined into a complete functional entity through specific physical connection methods such as serial peripheral interfaces, radio frequency transmission lines, and power supply lines. This avoids the problems of unstable communication performance, incomplete functions, or difficult maintenance caused by the lack of antenna, firmware storage, independent power supply, or dedicated debugging port. As a result, the HaLow module 21 can operate reliably as an independent subsystem, is easy to debug and maintain, and thus ensures the stability and availability of the entire embedded system in long-distance, low-power communication scenarios.

[0056] The second frequency band includes the third and fourth frequency bands; please refer to [the relevant documentation]. Figure 4 The WiFi and Bluetooth module 22 includes: The WiFi and Bluetooth unit 221 specifically includes a WiFi module and a Bluetooth module. The WiFi and Bluetooth unit 221 is connected to the second universal serial data interface UART2 and the second secure digital input / output interface SDIO2 of the system-on-a-chip 10, respectively. The second universal serial data interface UART2 is connected to the Bluetooth module and used to transmit Bluetooth data, and the second secure digital input / output interface SDIO2 is connected to the WiFi module and used to transmit WiFi data. The second antenna 222 is connected to the WiFi and Bluetooth unit 221 and is used to transmit and receive WiFi communication data in a third frequency band for the WiFi and Bluetooth unit 221, wherein the third frequency band is greater than the first frequency band; The third antenna 223 is connected to the WiFi and Bluetooth unit 221 and is used to transmit and receive WiFi communication data in a fourth frequency band for the WiFi and Bluetooth unit 221, wherein the fourth frequency band is greater than the third frequency band; The second power supply 224 is connected to the WiFi and Bluetooth unit 221 and is used to supply power to the WiFi and Bluetooth unit 221.

[0057] It should be noted that the WiFi and Bluetooth unit 221 is the core processing chip inside the WiFi and Bluetooth module 22. This chip integrates the baseband and radio frequency processing functions of both conventional WiFi and Bluetooth communication protocols. This unit is connected to the second universal serial data interface UART2 and the second secure digital input / output interface SDIO2 of the system-on-a-chip 10 through physical circuits. The second universal serial data interface UART2 is specifically used to transmit Bluetooth data, and the second secure digital input / output interface SDIO2 is specifically used to transmit WiFi data.

[0058] The second antenna 222 is a physical antenna element connected to an RF port of the WiFi and Bluetooth unit 221 via an RF transmission line. This antenna is tuned to a specific third frequency band (e.g., 2.4 GHz) specifically for transmitting and receiving WiFi communication data within that band. The third frequency band refers to the WiFi frequency band in which the second antenna 222 operates, specifically a band between the first frequency band (e.g., 915 MHz) and the fourth frequency band, such as 2.4 GHz. This frequency band offers good coverage and compatibility, suitable for most common wireless LAN communication scenarios.

[0059] The third antenna 223 is another physical antenna element, connected via an RF transmission line to another RF port of the WiFi and Bluetooth unit 221. This antenna is tuned to a higher fourth frequency band (e.g., 5 GHz) specifically for transmitting and receiving WiFi communication data in this band. The fourth frequency band refers to the WiFi frequency band in which the third antenna 223 operates, specifically a band higher than the third frequency band, such as 5 GHz. This band offers a wider wireless channel and higher data transmission rate than the third frequency band, but the signal propagation distance is relatively shorter.

[0060] The second power supply 224 is a power management circuit that is connected to the power input pin of the WiFi and Bluetooth unit 221 via power lines. This power supply converts the system input voltage into the operating voltage required by the WiFi and Bluetooth unit 221, providing the unit with an independent and stable power supply.

[0061] Understandably, simply stating that the WiFi and Bluetooth module 22 supports a second frequency band higher than the first band might prevent the module from simultaneously and efficiently supporting multiple different WiFi frequency bands, and could lead to risks of internal interference and unstable power supply. Therefore, this embodiment integrates a WiFi and Bluetooth unit 221 within the module, with second and third antennas tuned to different frequency bands respectively, and is equipped with an independent second power supply. This effectively avoids the problems of a single RF path being unable to accommodate the characteristics of different frequency bands, and performance degradation or connection instability due to insufficient power supply or interference when operating multiple frequency bands. This allows the WiFi and Bluetooth module 22 to concurrently or flexibly switch between different WiFi frequency bands, providing higher speeds and more reliable wireless connections, and ensuring stable operation of the module under complex communication tasks.

[0062] In one feasible implementation, the wired communication module 30 includes a network transformer 31, which is connected to the system-on-a-chip 10 for transmitting Ethernet data.

[0063] It should be noted that the network transformer 31 is a physical isolation and signal coupling element containing a magnetic core and a coil. This element is electrically connected to the corresponding lines of the Ethernet controller pin built into the system-on-a-chip and the network cable connection interface on the circuit board through its primary and secondary pins, respectively. It is used to realize signal level conversion, electrical isolation and common-mode interference suppression during Ethernet wired communication, thereby ensuring stable transmission of Ethernet data between the system-on-a-chip 10 and the external wired network.

[0064] Understandably, if the key physical structure of a wired communication module is not clearly defined, it may malfunction in actual circuits due to the lack of necessary signal processing and electrical isolation units. Therefore, by specifically setting up a network transformer as a hardware component in the embedded system and directly connecting it to the system-on-a-chip 10 via circuit board wiring, the problems of signal quality degradation or chip damage caused by level mismatch, electrical interference, or surge impact during Ethernet signal transmission are avoided. This achieves electrical isolation and enhanced signal integrity of the wired communication channel, ensuring the stability and reliability of data transmission between the system-on-a-chip and the wired network.

[0065] For example, the wired communication module 30 uses a network transformer 31 as the core physical component. The network transformer 31 is soldered to the main circuit board of the system through its pins. The center tap on its primary side is directly connected to the relevant pins of the Ethernet controller of the system-on-a-chip 10 through a preset PCB (Printed Circuit Board) trace. The secondary side is electrically connected to the contacts of an RJ45 network cable connection interface through a filter circuit, thereby constructing a complete wired data transmission channel with signal coupling, electrical isolation and common-mode rejection functions between the system-on-a-chip 10 and the external network cable.

[0066] In one feasible implementation, the embedded system further includes: A mask read-only memory button 51 is connected to the system-on-a-chip 10 and is used to trigger the system-on-a-chip 10 to enter the mask read-only memory mode. Recovery button 52, which is connected to the system-on-a-chip 10, is used to trigger the system-on-a-chip 10 to enter recovery mode.

[0067] It should be noted that the masked read-only memory button 51 is a physical push-button switch with mechanical contacts. This switch is electrically connected to a specific function's general-purpose input / output pin on the system-on-a-chip 10 via wires on the circuit board. When the user presses this button, it applies a low-level or high-level electrical signal to the pin, thereby triggering the system-on-a-chip 10 to enter masked read-only memory mode during startup. This mode is used for updating or repairing the system's low-level boot program, such as forced flashing or boot mode selection.

[0068] The recovery button 52 is another physical push-button switch with mechanical contacts. This switch is electrically connected to another designated general-purpose input / output pin on the system-on-chip 10 via a separate circuit trace. When the user presses this button, it sends a specific electrical signal command to the system-on-chip 10, triggering the system-on-chip 10 to execute a predefined recovery process, restoring the system software to a known, intact working state.

[0069] Understandably, systems with only basic functional modules lack direct and reliable physical means to guide them into special operating modes when encountering firmware failures or system crashes, potentially leading to system irreparable damage or recovery. Therefore, this implementation adds two independent physical switches—a masked read-only memory button and a restore button—to the hardware circuit and electrically connects them to different general-purpose input / output pins on the system-on-a-chip 10. This avoids the system completely losing its operational capability due to software-level failures, preventing the updating of the underlying bootloader or the restoration of the system state. It enables the system to enter a specific operating mode via physical buttons, greatly enhancing the operability and recoverability of the system in abnormal states and improving the convenience and reliability of system maintenance.

[0070] For example, the embedded system's circuit board has two independent tactile push-button switches soldered on it. One of them serves as a masked read-only memory button, with its two pins connected to the GPIO (General Purpose Input / Output) pins of the system-on-a-chip (SoC) 10 via circuit traces. When this button is pressed, the level of this pin is pulled low, triggering the SoC to enter the masked read-only memory mode upon power-up. The other button serves as a restore button, with its two pins connected to another GPIO pin of the SoC via circuit traces. When this button is pressed, the level of this pin is pulled low, triggering the SoC to execute the system restore process.

[0071] In one feasible implementation, the embedded system further includes: A Universal Serial Bus (USB) programming port 60 is connected to the system-on-a-chip (SoC) 10 and is used to program the SoC 10.

[0072] It should be noted that the Universal Serial Bus programming port 60 is a standard USB (Universal Serial Bus) physical connector. This connector is electrically connected to the USB controller pins integrated inside the system-on-chip 10 through data traces on the circuit board, forming a dedicated programming channel for connecting to an external host via a USB data cable, thereby transmitting and programming firmware programs to the storage medium of the system-on-chip 10.

[0073] Understandably, because the system, with only basic functional modules, lacks an independent, stable, and universal physical program update channel, system firmware upgrades or system recovery rely on potentially unstable wireless or wired communication modules, resulting in complex operations and low reliability. Therefore, this implementation sets up a universal serial bus programming port 60 in the hardware and directly connects it to the USB controller pin of the system-on-a-chip 10 via data traces. This avoids the problem of the system being unable to perform program programming and system maintenance due to communication module failure or network anomalies, thus enabling reliable and convenient firmware programming and updates through a standard USB interface, significantly improving the convenience and efficiency of system development, debugging, and maintenance.

[0074] In one feasible implementation, the embedded system further includes: A debugging serial interface 70 is connected to the system-on-a-chip 10 and is used to debug the system-on-a-chip 10.

[0075] It should be noted that the debug serial interface 70 is a physical connector deployed on the circuit board. This connector is electrically connected to the universal asynchronous transceiver pin of the system-on-a-chip 10 through circuit traces, forming an independent system-level debug channel. This channel allows external debug devices to communicate directly with the system-on-a-chip 10 via a serial communication protocol, thereby enabling monitoring of the system's operating status, log reading, or low-level debugging.

[0076] Understandably, the lack of a dedicated hardware debugging interface independent of the business communication channel during the system's development and maintenance phases forces developers to rely on potentially unstable wireless or wired communication modules for system debugging, impacting debugging efficiency and system reliability. Therefore, by setting up an independent debugging serial interface 70 in the hardware and directly connecting it to the universal asynchronous transceiver pins of the system-on-a-chip 10 via circuit wiring, the mutual interference caused by debugging information and business data sharing the same channel, as well as the complete inability to debug the system when the communication module malfunctions, are avoided. This enables stable, real-time status monitoring and fault diagnosis of the system-on-a-chip 10 through a dedicated physical interface, significantly improving the convenience and efficiency of system development, debugging, and maintenance.

[0077] For example, the embedded system sets up a 4-pin header on the circuit board as a debugging serial interface. The transmit pin, receive pin and ground pin of the header are electrically connected to the UART0_TX pin, UART0_RX pin and system ground of the system-on-a-chip 10 (e.g., RK3528) through PCB traces, thereby constructing an independent hardware debugging channel. This allows developers to connect to an external computer via a serial cable to directly interact with the system-on-a-chip 10 via command line, view system startup information and output debugging logs.

[0078] In one feasible implementation, the embedded system further includes: A rate indicator 81 is connected to the system-on-a-chip 10 and is used to display the network transmission rate status of the system-on-a-chip 10. Link indicator light 82 is connected to the system-on-a-chip 10 and is used to display the network connection status of the system-on-a-chip 10.

[0079] It should be noted that the rate indicator 81 is a light-emitting diode hardware component. This component is electrically connected to a specified general-purpose input / output pin on the system-on-chip 10 through a current-limiting resistor. It is used to intuitively indicate to the user the current data transmission rate status of the wired or wireless network, such as 100 Mbps or 1 Gbps, by turning it on, off, or displaying different colors according to different level signals output by the system-on-chip 10.

[0080] Link indicator 82 is another light-emitting diode hardware component. This component is also electrically connected to another designated general-purpose input / output pin on the system-on-chip 10 through a current-limiting resistor. It is used to display the current network link connection status in different visual states according to the control signals output by the system-on-chip 10. For example, a solid light indicates that the link is working, while flashing or being off indicates that the link is disconnected or abnormal.

[0081] Understandably, the lack of hardware components that provide intuitive, real-time indication of critical network status during system operation makes it difficult for users or maintenance personnel to quickly determine whether the system's network connection and data transmission are normal, increasing the difficulty and time required for fault diagnosis. Therefore, this implementation solution uses two independent LED components—a rate indicator and a link indicator—in the hardware circuit, electrically connected to designated general-purpose input / output pins on the system-on-a-chip via current-limiting resistors. This avoids the problems of delayed fault detection and difficulty in problem localization caused by the inability to directly visualize and manage network status. It achieves real-time, intuitive visual feedback on the system's network connection status and transmission rate, significantly improving the observability of system status, ease of operation, and maintenance efficiency.

[0082] For example, the embedded system has two LEDs soldered on the circuit board as status indicators. One of them is a bicolor green / amber LED, which serves as a rate indicator 81. Its anode is connected to the GPIO pin of the system-on-a-chip 10 through a current-limiting resistor. It is used to indicate gigabit speeds in green and 100 Mbps speeds in amber. The other is a monochrome green LED, which serves as a link indicator 82. Its anode is connected to another GPIO pin of the system-on-a-chip 10 through another current-limiting resistor. It is used to keep the LED constantly lit when the network link is normal and turn off when the link is disconnected. Thus, the network status of the system can be intuitively displayed through these two independent hardware indicators.

[0083] In one feasible implementation, the embedded system further includes: A clock module 90 is connected to the integrated circuit bus interface I2C1 of the system-on-a-chip 10 and is used to provide real-time clock information to the system-on-a-chip 10.

[0084] It should be noted that the clock module 90 is an independent real-time clock hardware unit. This module may include, but is not limited to, a real-time clock chip, a 32.768kHz crystal oscillator, and a backup battery. This module is electrically connected to the corresponding I2C1 integrated circuit bus interface pin on the system-on-chip 10 via its dedicated data and clock pins. It is used to maintain timing via the backup battery when the system mains power is disconnected, and to provide continuous and accurate real-time clock information to the system-on-chip 10.

[0085] Understandably, the lack of an independent and continuously operating hardware clock source during system operation often leads to the loss of accurate time information after a power outage and restart, affecting the reliability of time-related functions such as timestamp recording and scheduled tasks. Therefore, by setting up a clock module 90 that can include a real-time clock chip and a backup battery, and establishing a data connection with the system-on-a-chip 10 via the I2C1 integrated circuit bus interface, the problem of time information loss due to mains power failure and the lack of a unified time reference when modules work together is avoided. This provides a continuous and accurate real-time clock signal for the entire embedded system, ensuring the time accuracy of system event recording and the reliability of timing control functions.

[0086] For example, the embedded system uses a real-time clock chip as the core of the clock module 90. The SDA and SCL pins of the chip are electrically connected to the I2C1_SDA and I2C1_SCL pins of the system-on-a-chip (e.g., RK3528) through circuit board traces, forming an integrated circuit bus communication link. At the same time, the real-time clock chip is externally connected to a 32.768kHz crystal oscillator as a clock source and a button battery as a backup power source, thereby forming a complete hardware clock circuit to provide continuous and accurate real-time time information for the system-on-a-chip 10.

[0087] For example, to help understand the system framework of the embedded system obtained by combining the above embodiments, please refer to Figure 5 , Figure 5 A schematic diagram of the overall system framework of an embedded system is provided, specifically: The system-on-chip 10 serves as the control core and is connected to multiple functional modules via physical circuits: the HaLow module 21 and the WiFi and Bluetooth module 22 establish connections with the system-on-chip 10 through their respective SDIO interfaces; the network transformer 31, as the core component of the wired communication module, is connected to the system-on-chip 10 via a Fast Ethernet physical layer differential signal line (FEPHYDIFF LINE); the positioning module 40 is connected to the system-on-chip 10 through two UART interfaces to provide location data; the masked read-only memory button 51 and the reset button 52 are physical buttons connected to the pins of the system-on-chip 10; the Universal Serial Bus (USB) programming port and the debug serial interface are independent physical ports connected to the corresponding pins of the system-on-chip 10, wherein the USB programming port can connect to the OTG (On-The-Board) interface of the system-on-chip 10. The Go (plug and play) pin connection allows the DEBUG serial interface to connect to the sixth general-purpose serial data interface UART6 of the system-on-chip 10; the link indicator 81 and the rate indicator 82 are connected to the system-on-chip 10 via circuitry as light-emitting diode elements; the clock module 90 is connected to the system-on-chip 10 via the I2C (Inter-Integrated Circuit) interface; and the RGB (Red Green Blue) interface is connected to another serial peripheral interface SPI of the system-on-chip 10 to control the display of RGB lights, such as system status indication and color output.

[0088] This application also proposes a terminal device equipped with a power management system and an embedded system as described above. The power management system is connected to both a system-on-a-chip (SoC) and a wireless communication module within the embedded system. The power management system provides power to both the SoC and the wireless communication module. The specific structure of the embedded system is described in the above embodiments. Since this terminal device employs all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here. Furthermore, the power management system can also be connected to a positioning module within the embedded system, and simultaneously provides power to the positioning module.

[0089] The above description is merely an exemplary embodiment of this application and does not limit the patent scope of this application. Any equivalent structural transformations made based on the technical concept of this application and the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.

Claims

1. An embedded system, characterized in that, The embedded system, used for establishing communication connections with external devices, includes: A system-on-a-chip (SoC) for communicating with the external device wirelessly, or for communicating with the external device at least via a network; A wireless communication module, which is connected to the system-on-a-chip (SoC) and is used to provide a wireless communication path between the SoC and the external device. A wired communication module is connected to the system-on-a-chip (SoC) and is used to provide a wired communication path between the SoC and the network, so as to communicate with the external device through the network.

2. The embedded system as described in claim 1, characterized in that, The wireless communication module includes: The HaLow module is connected to the first general-purpose serial data interface and the first secure digital input / output interface of the system-on-a-chip, respectively, and is used to provide a WiFi communication path in the first frequency band between the system-on-a-chip and the external device. The WiFi and Bluetooth modules are respectively connected to the third general-purpose serial data interface and the second secure digital input / output interface of the system-on-a-chip (SoC), and are used to provide WiFi communication paths and Bluetooth communication paths in a second frequency band between the SoC and the external device, wherein the second frequency band is greater than the first frequency band.

3. The embedded system as described in claim 2, characterized in that, The HaLow module includes: The HaLow unit is connected to the first general-purpose serial data interface and the first secure digital input / output interface of the system-on-a-chip, respectively. A first antenna is connected to the HaLow unit and is used to transmit and receive WiFi communication data in the first frequency band for the HaLow unit. A storage unit, which is connected to the HaLow unit via a serial peripheral interface, is used to store the data file of the HaLow module unit; A first power source is connected to both the HaLow unit and the storage unit, and is used to supply power to the HaLow unit and the storage unit. A first debugging interface is connected to the third general-purpose serial data interface of the HaLow unit and is used to debug the HaLow unit.

4. The embedded system as described in claim 2, characterized in that, The second frequency band includes a third frequency band and a fourth frequency band, and the WiFi and Bluetooth module includes: WiFi and Bluetooth unit, wherein the WiFi and Bluetooth unit are respectively connected to the second universal serial data interface and the second secure digital input / output interface of the system-on-a-chip, wherein the third universal serial data interface is used to transmit Bluetooth data and the second secure digital input / output interface is used to transmit WiFi data; A second antenna is connected to the WiFi and Bluetooth unit and is used to transmit and receive WiFi communication data in a third frequency band for the WiFi and Bluetooth unit, wherein the third frequency band is greater than the first frequency band; A third antenna is connected to the WiFi and Bluetooth unit and is used to transmit and receive WiFi communication data in a fourth frequency band for the WiFi and Bluetooth unit, wherein the fourth frequency band is greater than the third frequency band; A second power source is connected to the WiFi and Bluetooth unit and is used to supply power to the WiFi and Bluetooth unit.

5. The embedded system as described in claim 1, characterized in that, The wired communication module includes a network transformer connected to the system-on-a-chip for transmitting Ethernet data and / or providing power for the operation of the embedded system.

6. The embedded system as described in claim 1, characterized in that, The embedded system further includes a positioning module, which is connected to the system-on-a-chip (SoC) and used to provide position data to the SoC. The positioning module includes: A positioning unit is connected to the fourth and fifth universal serial data interfaces of the system-on-a-chip (SoC) respectively, and is used to provide position data to the SoC. A fourth antenna, connected to the positioning unit, is used to receive satellite signals for the positioning unit to determine location data. A third power source is connected to both the positioning unit and the fourth antenna, and is used to supply power to the positioning unit and the fourth antenna. The second debugging interface is connected to the serial interface of the positioning unit and is used to debug the positioning unit.

7. The embedded system as described in claim 1, characterized in that, The embedded system also includes: A mask read-only memory button, which is connected to the system-on-a-chip (SoC) and is used to trigger the SoC to enter the mask read-only memory mode; A recovery button, which is connected to the system-on-a-chip (SoC), is used to trigger the SoC to enter recovery mode.

8. The embedded system as described in claim 1, characterized in that, The embedded system also includes: A Universal Serial Bus (USB) programming port is connected to the system-on-a-chip (SoC) and is used to program the SoC.

9. The embedded system as described in claim 1, characterized in that, The embedded system also includes: A debug serial interface, connected to the system-on-a-chip (SoC), is used for debugging the SoC; and / or A rate indicator light, connected to the system-on-a-chip (SoC), is used to display the network transmission rate status of the SoC; and / or Link indicator light, connected to the system-on-a-chip (SoC), is used to display the network connection status of the SoC; and / or A clock module is connected to the integrated circuit bus interface of the system-on-a-chip (SoC) and is used to provide real-time clock information to the SoC.

10. A terminal device, characterized in that, The terminal device is equipped with a power management system and an embedded system as described in any one of claims 1 to 9. The power management system is connected to the system-on-a-chip and the wireless communication module in the embedded system, respectively. The power management system is used to provide power to the system-on-a-chip and the wireless communication module.

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