A circuit board, a lamp panel and a display screen

Abstract

The utility model discloses a kind of circuit board, lamp panel and display screen, circuit board is used to bond LED chip, including the first wiring layer and the second wiring layer of sequentially laminated settings;First wiring layer includes multiple parallel arrangement sub-circuit layer, sub-circuit layer includes signal line and multiple interval settings pad unit, signal line includes first signal line, pad unit includes at least one pad line group, pad line group includes wire, lead and pad group, wire includes first wire, lead includes first lead, pad group includes first pad group, first pad group includes first pad and second pad, first pad is connected with first signal line by first wire, second pad is connected with one end of first lead, first lead other end is connected with the second wiring layer by via, the width of first wire and the width of first lead are less than the width of first signal line, the width of first wire is less than the width of first lead.The utility model's circuit board reduces the monument phenomenon.

Description

Technical Field

[0001] This utility model relates to the field of display, and more particularly to a circuit board, a lamp board, and a display screen. Background Technology

[0002] In the design, one end of the N-type pad at both ends of the LED chip is close to the power line, with more copper wire and better heat dissipation. The other end of the pad, the P-type pad, is connected to a via, which is then connected to the power line on another layer. The P-type pad has poor heat dissipation. Due to the large heat dissipation of the two pads, the chip is prone to tombstoning during the die bonding process. The chip tombstoning phenomenon usually refers to the "tombstone effect" or "tombstone defect" in chip manufacturing, which is caused by uneven solder wetting, resulting in one end of the component lifting up. This can have many negative impacts on the quality and reliability of electronic products. Utility Model Content

[0003] In view of the shortcomings of the above-mentioned related technologies, the purpose of this utility model is to provide a circuit board, lamp board and display screen to reduce tombstoning, reduce production costs and improve product reliability.

[0004] This utility model provides a circuit board for bonding LED chips, including a first wiring layer, a second wiring layer, a substrate, and a control circuit layer for providing power and control signal shutdown, wherein a first insulating layer is disposed between the first wiring layer and the second wiring layer. The first wiring layer includes multiple parallel sub-line layers. Each sub-line layer includes signal lines and multiple spaced pad units. The signal lines include first signal lines. The extension direction of the first signal lines and the arrangement direction of the multiple pad units are the same as the extension direction of the sub-line layers. Each pad unit includes at least one pad line group. Each pad line group includes a conductor, a lead, and a pad group. The conductor includes a first conductor, the lead includes a first lead, and the pad group includes a first pad group. The first pad group includes a first pad and a second pad. The first pad is connected to the first signal line via a first conductor. The second pad is connected to one end of the first lead. The other end of the first lead is connected to the second wiring layer via a via. The first signal line and the second wiring layer are respectively connected to the control wiring layer. The width of the first conductor and the width of the first lead are both smaller than the width of the first signal line, and the width of the first conductor is smaller than the width of the first lead.

[0005] Optionally, the length of the first lead is greater than the length of the first conductor.

[0006] Optionally, the width of the first conductor and the width of the first lead are both in the range of 3mil to 4mil.

[0007] Optionally, the signal line further includes a second signal line, the second signal line extending in the same direction as the first signal line, and a plurality of the pad units are disposed between the first signal line and the second signal line; The conductor further includes a second conductor, the lead further includes a second lead, the pad group further includes a second pad group, the second pad group includes a third pad and a fourth pad, the third pad is connected to the second signal line through the second conductor, the fourth pad is connected to one end of the second lead, the other end of the second lead is connected to the first lead, and the connection node between the second lead and the first lead is connected to the second wiring layer through the via.

[0008] Optionally, the length of the second lead is greater than the length of the second conductor.

[0009] Optionally, the width of the second lead and the width of the second conductor are both in the range of 3mil to 4mil.

[0010] Optionally, it may also include a first solder mask layer and a second solder mask layer, wherein the first solder mask layer is disposed on the side of the first wiring layer away from the second wiring layer, and the second solder mask layer is disposed on the side of the control circuit layer away from the substrate.

[0011] Optionally, the control circuit layer includes a drive circuit layer and a power circuit layer stacked sequentially on the substrate, a second insulating layer is disposed between the drive circuit layer and the power circuit layer, the signal line and the second wiring layer are respectively connected to the drive circuit layer, the drive circuit layer is connected to the power circuit layer, and the second solder mask layer is disposed on the side of the power circuit layer away from the drive circuit layer.

[0012] This utility model also provides a lamp board, including multiple LED chips and the circuit board described above, wherein the multiple LED chips are bonded to the pad group.

[0013] This utility model also provides a display screen, including a housing and the aforementioned light panel, wherein the light panel is disposed on the housing.

[0014] The circuit board, lamp board, and display screen of this utility model can reduce the problem of LED chip electrode detaching from the pad due to tombstoning, resulting in circuit connection interruption and direct functional failure, thus reducing the risk of open circuit. It can also prevent customer complaints caused by poor soldering or contact that may lead to dead LEDs during long-term use, thus reducing the occurrence of poor soldering. Furthermore, by reducing tombstoning, the number of production rework or scrap is reduced, thereby lowering production costs and improving product reliability. Attached Figure Description

[0015] Figure 1A schematic diagram of the layer structure of a circuit board provided in an embodiment of this utility model; Figure 2 A top view of the circuit board provided in an embodiment of this utility model; Figure 3 for Figure 2 A magnified view of part B on the circuit board.

[0016] Explanation of reference numerals in the attached figures: 1-Second wiring layer; 2-First wiring layer; 21-Sub-line layer; 211-First signal line; 212-Pad unit; 213-First conductor; 214-First lead; 215-First pad group; 216-Second signal line; 217-Second conductor; 218-Second lead; 219-Second pad group; 3-Substrate; 4-First insulating layer; 5-Drive circuit layer; 6-Power circuit layer; 7-Second insulating layer; a-via. Detailed Implementation

[0017] To facilitate understanding of this utility model, a more complete description will be given below with reference to the accompanying drawings. The drawings illustrate preferred embodiments of this utility model. However, this utility model can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this utility model.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0019] In the description of this utility model, the terms "first," "second," etc., are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "upper," "lower," "inner," "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0020] It should be noted that the illustrations provided in the embodiments of this utility model are only schematic representations of the basic concept of this utility model. The illustrations only show the components related to this utility model and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0021] The specific embodiments of this utility model will be further described below with reference to the accompanying drawings.

[0022] See Figures 1 to 3 As shown, this utility model embodiment discloses a circuit board for bonding LED chips, including a first wiring layer 2, a second wiring layer 1, a substrate 3 and a control circuit layer for providing power and control signal shutdown, which are stacked in sequence. A first insulating layer 4 is provided between the first wiring layer 2 and the second wiring layer 1. The first wiring layer 2 includes a plurality of parallel-arranged sub-line layers 21. Each sub-line layer 21 includes signal lines and a plurality of spaced-apart pad units 212. Each signal line includes a first signal line 211. The extension direction of the first signal line 211 and the arrangement direction of the plurality of pad units 212 are both the same as the extension direction of the sub-line layer 21. Each pad unit 212 includes at least one pad line group. Each pad line group includes a conductor, a lead, and a pad group. The conductor includes a first conductor 213, the lead includes a first lead 214, and the pad group includes a first pad group 215. The first pad group 215 includes a first pad and a second pad. The first pad is connected to the first signal line 211 via a first conductor 213. The second pad is connected to one end of the first lead 214. The other end of the first lead 214 is connected to the second wiring layer 1 via a via a. The first signal line 211 and the second wiring layer 1 are respectively connected to the control circuit layer. The width of the first conductor 213 and the width of the first lead 214 are both smaller than the width of the first signal line 211. The width of the first conductor 213 is smaller than the width of the first lead 214.

[0023] Improvements were made to the trace length of the first conductor 213 while ensuring minimal overcurrent. This reduces heat dissipation from the first pad and makes the heat dissipation of the first and second pads more similar, reducing chip tombstoning. This optimized trace design, without affecting overall product performance, reduces the risk of one electrode of the LED chip detaching from the pad due to tombstoning, causing circuit connection interruption and direct functional failure, thus reducing the risk of open circuit. It also prevents customer complaints caused by poor soldering or contact, which may lead to dead LEDs during long-term use, reducing the occurrence of poor soldering. Furthermore, by reducing tombstoning, the number of production rework or scrap is reduced, production costs are lowered, and product reliability is improved.

[0024] In this embodiment, the pads closer to the signal line are N-type pads, and the pads farther from the signal line are P-type pads. In some embodiments, the pads closer to the signal line are P-type pads, and the pads farther from the signal line are N-type pads.

[0025] In this embodiment, the width of the first conductor 213 and the width of the first lead 214 both range from 3mil to 4mil. Here, mil is a unit of length, and 1 mil is approximately 25.4µm.

[0026] The widths of the first conductor 213 and the first lead 214 need to be determined by considering fabrication capability and overcurrent capability. Optionally, the width of the first conductor 213 is 3 mil and the width of the first lead 214 is 4 mil. This allows for faster heat dissipation due to the larger copper area of ​​the traces close to the signal line. Reducing the conductor width minimizes heat dissipation at the first pad location, making the heat dissipation of the first and second pads more similar and reducing tombstoning.

[0027] In this embodiment, the signal line further includes a second signal line 216, the extension direction of the second signal line 216 is the same as the extension direction of the first signal line 211, and a plurality of pad units 212 are disposed between the first signal line 211 and the second signal line 216. The conductor further includes a second conductor 217, the lead further includes a second lead 218, the pad group further includes a second pad group 219, the second pad group 219 includes a third pad and a fourth pad, the third pad is connected to the second signal line 216 through the second conductor 217, the fourth pad is connected to one end of the second lead 218, the other end of the second lead 218 is connected to the first lead 214, and the connection node between the second lead 218 and the first lead 214 is connected to the second wiring layer 1 through the via a.

[0028] In this embodiment, the length of the first lead 214 is greater than the length of the first conductor 213; the length of the second lead 218 is greater than the length of the second conductor 217. By reducing the length of the conductors, the heat dissipation capacity of the pads near the signal line and the pads far from the signal line is balanced.

[0029] In this embodiment, the widths of the second lead 218 and the second conductor 217 are both in the range of 3mil to 4mil. The widths of the second conductor 217 and the second lead 218 must be chosen considering fabrication capability and overcurrent capacity. Optionally, the width of the second conductor 217 is 3mil and the width of the second lead 218 is 4mil. This allows for faster heat dissipation due to the larger copper area of ​​the traces close to the signal line. Minimizing the conductor width reduces the heat dissipation effect at the third pad, making the heat dissipation of the third and fourth pads more similar and reducing tombstoning.

[0030] In this embodiment, the pad unit 212 may include three pad line groups. In other embodiments, the pad line groups within the pad unit 212 are not limited and can be set according to actual needs. The three pad line groups are respectively used to solder three different colored LED chips, namely red LED chips, green LED chips, and blue LED chips. In other embodiments, the three different colored LED chips are respectively white LED chips, green LED chips, and blue LED chips. The colors are not limited here and can be selected according to actual needs.

[0031] In this embodiment, a first solder mask layer and a second solder mask layer are also included. The first solder mask layer is disposed on the side of the first wiring layer 2 away from the second wiring layer 1, and the second solder mask layer is disposed on the side of the control circuit layer away from the substrate 3.

[0032] In this embodiment, the control circuit layer includes a drive circuit layer 5 and a power circuit layer 6 stacked sequentially on the substrate 3. A second insulating layer 7 is disposed between the drive circuit layer 5 and the power circuit layer 6. The signal line and the second wiring layer 1 are respectively connected to the drive circuit layer 5. The drive circuit layer 5 is connected to the power circuit layer 6. The second solder mask layer is disposed on the side of the power circuit layer 6 away from the drive circuit layer 5.

[0033] This utility model embodiment also discloses a lamp board, including multiple LED chips and the circuit board described above, wherein the multiple LED chips are bonded to the pad group.

[0034] This utility model embodiment also discloses a display screen, including a housing and the aforementioned light panel, wherein the light panel is disposed on the housing.

[0035] In this embodiment, the LED chip can be a MiniLED, MicroLED, nano-sized LED, or LED of other sizes. No limitation is made here, and the specific selection can be made according to the actual situation.

[0036] As one implementation method, the display screen can be a television, VR / AR, smart wearable device, mobile phone, vehicle display, etc.

[0037] The circuit board, lamp board, and display screen of this utility model can reduce the problem of LED chip electrode detaching from the pad due to tombstoning, resulting in circuit connection interruption and direct functional failure, thus reducing the risk of open circuit. It can also prevent customer complaints caused by poor soldering or contact that may lead to dead LEDs during long-term use, thus reducing the occurrence of poor soldering. Furthermore, by reducing tombstoning, the number of production rework or scrap is reduced, thereby lowering production costs and improving product reliability.

[0038] It should be understood that the application of this utility model is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A circuit board for bonding LED chips, characterized in that, It includes a first wiring layer, a second wiring layer, a substrate, and a control circuit layer for providing power and controlling signal shutdown, which are stacked in sequence. A first insulating layer is provided between the first wiring layer and the second wiring layer. The first wiring layer includes multiple parallel sub-line layers. Each sub-line layer includes signal lines and multiple spaced pad units. The signal lines include first signal lines. The extension direction of the first signal lines and the arrangement direction of the multiple pad units are the same as the extension direction of the sub-line layers. Each pad unit includes at least one pad line group. Each pad line group includes a conductor, a lead, and a pad group. The conductor includes a first conductor, the lead includes a first lead, and the pad group includes a first pad group. The first pad group includes a first pad and a second pad. The first pad is connected to the first signal line through the first conductor. The second pad is connected to one end of the first lead. The other end of the first lead is connected to the second wiring layer through a via. The first signal line and the second wiring layer are respectively connected to the control wiring layer. The width of the first conductor and the width of the first lead are both smaller than the width of the first signal line, and the width of the first conductor is smaller than the width of the first lead.

2. The circuit board as described in claim 1, characterized in that, The length of the first lead is greater than the length of the first conductor.

3. The circuit board as described in claim 1 or 2, characterized in that, The width of the first conductor and the width of the first lead are both in the range of 3mil to 4mil.

4. The circuit board as described in claim 1 or 2, characterized in that, The signal line further includes a second signal line, the extension direction of the second signal line is the same as the extension direction of the first signal line, and a plurality of the pad units are disposed between the first signal line and the second signal line; The conductor further includes a second conductor, the lead further includes a second lead, the pad group further includes a second pad group, the second pad group includes a third pad and a fourth pad, the third pad is connected to the second signal line through the second conductor, the fourth pad is connected to one end of the second lead, the other end of the second lead is connected to the first lead, and the connection node between the second lead and the first lead is connected to the second wiring layer through the via.

5. The circuit board as described in claim 4, characterized in that, The length of the second lead is greater than the length of the second conductor.

6. The circuit board as described in claim 5, characterized in that, The width of the second lead and the width of the second conductor both range from 3mil to 4mil.

7. The circuit board as described in claim 1, characterized in that, It also includes a first solder mask layer and a second solder mask layer, wherein the first solder mask layer is disposed on the side of the first wiring layer away from the second wiring layer, and the second solder mask layer is disposed on the side of the control circuit layer away from the substrate.

8. The circuit board as described in claim 7, characterized in that, The control circuit layer includes a drive circuit layer and a power circuit layer stacked sequentially on the substrate. A second insulating layer is disposed between the drive circuit layer and the power circuit layer. The signal line and the second wiring layer are respectively connected to the drive circuit layer. The drive circuit layer is connected to the power circuit layer. The second solder mask layer is disposed on the side of the power circuit layer away from the drive circuit layer.

9. A light panel, characterized in that, It includes a plurality of LED chips and a circuit board as described in any one of claims 1 to 8, wherein the plurality of LED chips are bonded to the pad group.

10. A display screen, characterized in that, It includes a housing and a light panel as described in claim 9, wherein the light panel is disposed on the housing.

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