Optical package structure

CN224891023UActive Publication Date: 2026-10-23SILICONWARE PRECISION IND CO LTD
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Patent Information

Application Number
CN202522362530.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2025-10-28
Filing Date
2025-11-07
Publication Date
2026-10-23
Estimated Expiration
2035-11-07

AI Technical Summary

Technical Problem

[0004]然而,前述的共同封装光学装置中,半导体晶片被埋入封装结构中,其与光晶片电性连接需通过多层线路层,同时光电引擎需通过基板及电路板方能与转换晶片电性连接,故对于未来高速运算和数据密集型应用需要大量信息的传输,会有信息延迟现象,且信号的传递于多层线路层间将产生大量热能,影响电子产品的寿命

Benefits of technology

[0017]由上可知,本申请的光学封装结构主要将光学模组堆叠于电子元件上,且令记忆体元件的高度与光学模组及电子元件的堆叠高度相等,以供后续与散热件平面粘着处可设计为等高,进而降低脱层及散热件压合时可能造成的晶片裂损风险。另外,由于光学模组整体结构接置于电子元件上同时两者均设于中介板,如此相互电性串接结构将使彼此信号传输更加快速,避免信号传输延迟和损失。

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Abstract

An optical package structure is provided. The optical package structure mainly stacks an optical module on an electronic component, and makes the height of a memory component equal to the stacking height of the optical module and the electronic component, so that the memory component is coplanar with the optical module and the electronic component for subsequent adhesion with a heat sink, thereby reducing the risk of delamination and wafer cracking caused by the compression of the heat sink.
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Description

Technical Field

[0001] This application relates to a semiconductor packaging structure, and more particularly to an optical packaging structure. Background Technology

[0002] With the booming development of the electronics industry, electronic products are gradually moving towards multifunctionality and high performance. The application of fifth-generation (5G) communication technology has expanded to various fields such as the Internet of Things (IoT), Industrial Internet of Things (IIoT), cloud computing, artificial intelligence (AI), autonomous vehicles, and medical care. As applications expand, a massive amount of data needs to be efficiently transmitted, processed, and stored. The demand for data transmission, in particular, is surging, leading industries to replace electricity with light as the data transmission medium to improve transmission capacity, efficiency, and distance, while reducing energy consumption. Against this backdrop, co-packaged optical devices have become a future trend in semiconductor and packaging technologies.

[0003] Please see Figure 1 This is a cross-sectional schematic diagram of an existing co-packaged optical device 1. It mainly consists of multiple photoelectric engines 11 (only one is shown in the figure) arranged on a circuit board 10. Each photoelectric engine 11 includes a semiconductor chip 112 formed in the package structure 111 and an optical chip 113 attached to the package structure 111. One end of the optical chip 113 is connected to an optical fiber 14, and a shelf 15 is provided below the junction of the optical chip 113 and the optical fiber 14 to allow the optical signal to be transmitted to the photoelectric engine 11 for communication. At the same time, a switching IC 12 needs to be attached to the circuit board 10 to be used in electronic products. The switching IC 12 is first disposed on a substrate 13 and then attached to the circuit board 10 through the substrate 13.

[0004] However, in the aforementioned co-packaged optical devices, the semiconductor chip is embedded in the packaging structure, and its electrical connection with the optical chip requires multiple circuit layers. At the same time, the photoelectric engine needs to be connected to the conversion chip through a substrate and circuit board. Therefore, for future high-speed computing and data-intensive applications that require the transmission of a large amount of information, there will be information delay. Furthermore, the transmission of signals between multiple circuit layers will generate a large amount of heat, affecting the lifespan of electronic products.

[0005] Even if heat dissipation is to be dissipated by adding heat sinks, in traditional co-packaged optical devices, the uneven height of the chips causes the bonding area of ​​the heat sink design to be uneven as well. This may lead to the risk of delamination due to the difficulty in controlling the amount of adhesive and chip cracking during heat sink pressing.

[0006] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Utility Model Content

[0007] In view of the various deficiencies of the prior art, this application provides an optical packaging structure, including: a substrate; an electronic component disposed on the substrate and electrically connected to the substrate; an optical module disposed on the electronic component and electrically connected to the electronic component; a memory element disposed on the substrate and electrically connected to the substrate; and a heat sink disposed on the memory element and the optical module and thermally connected to the memory element and the optical module.

[0008] The aforementioned optical packaging structure also includes an intermediary plate disposed between the substrate and the electronic component and the memory component, so that the electronic component and the memory component are connected to and electrically connected to the intermediary plate.

[0009] The aforementioned optical packaging structure also includes a circuit board for mounting the substrate, and the substrate is electrically connected to the circuit board.

[0010] In the aforementioned optical packaging structure, the height of the memory element relative to the substrate is the same as the height of the optical module and the electronic component relative to the substrate.

[0011] In the aforementioned optical packaging structure, the weight of the memory element is the same as the weight of the optical module and the electronic element.

[0012] In the aforementioned optical packaging structure, the heat sink includes a heat sink and a support portion extending outward from the surface of the heat sink, so that the heat sink is placed on the memory element and the optical module by thermally conductive adhesive.

[0013] In the aforementioned optical packaging structure, the heat sink is defined with a first block and a second block, and the size or thickness of the first block is different from the size or thickness of the second block.

[0014] In the aforementioned optical packaging structure, the first block is disposed above the optical module, the second block is disposed above the memory element, and the size of the first block is larger than the size of the second block.

[0015] In the aforementioned optical packaging structure, the thickness of the second block is greater than the thickness of the first block.

[0016] In the aforementioned optical packaging structure, the memory element is a high-bandwidth memory, the electronic element is a conversion-type application-specific integrated circuit, and the optical module includes photonic integrated circuit elements and electronic integrated circuit elements.

[0017] As can be seen from the above, the optical packaging structure of this application mainly stacks the optical module on the electronic components, and makes the height of the memory component equal to the stack height of the optical module and the electronic components. This allows for the design of the bonding area with the heat sink plane to be at the same height, thereby reducing the risk of chip cracking that may occur during delamination and heat sink pressing. In addition, since the overall structure of the optical module is attached to the electronic components and both are located on the interposer, this interconnected electrical structure will enable faster signal transmission between them, avoiding signal transmission delay and loss. Attached Figure Description

[0018] Figure 1 This is a cross-sectional schematic diagram of an existing co-packaged optical device.

[0019] Figure 2 This is a cross-sectional schematic diagram of the optical packaging structure of this application.

[0020] Figure 3 This is a partial top view of the optical packaging structure of this application.

[0021] Figure 4 This is a cross-sectional schematic diagram of another embodiment of the optical packaging structure of this application.

[0022] Explanation of reference numerals in the attached figures 1. Co-packaged optical devices 10 circuit boards 11 photoelectric engines 111 package structure 112 Semiconductor Wafer 113 optical chip 12 conversion chips 13 substrates 14 fiber optic cables 15 supports 2 Optical Packaging Structure 21 circuit boards 22 substrate 220, 230 conductive elements 23 Intermediary Board 231 conductive silicon through-hole 24 electronic components 25 optical modules 26 memory elements 27 heat sink 271,371 heatsink Block 2711, 3711 Block 2712,3712 272 Support Section 28 Thermal conductive adhesive. Detailed Implementation

[0023] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.

[0024] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," "third," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.

[0025] Please see Figure 2 This is a cross-sectional schematic diagram of the optical packaging structure 2 of this application.

[0026] As shown in the figure, the optical packaging structure 2 includes a circuit board 21, a substrate 22, an interposer 23, electronic components 24, an optical module 25, a memory element 26, and a heat sink 27.

[0027] The circuit board 21 may be a circuit structure with a core layer or a circuit structure without a core layer.

[0028] The substrate 22 includes an insulating layer and a circuit layer bonded to the insulating layer. The insulating layer is made of a dielectric material such as polybenzoxazole (PBO), polyimide (PI), or prepreg (PP). The circuit layer is, for example, a fan-out type redistributed circuit layer, and its material is, for example, metallic copper. The substrate 22 is disposed on and electrically connected to the circuit board 21 via a plurality of conductive elements 220.

[0029] The interposer 23 is, for example, a silicon interposer, and has a plurality of conductive through-silicon vias (TSVs) 231 formed thereon, and is disposed on the substrate 22 and electrically connected to the substrate 22 by a plurality of conductive elements 230.

[0030] The electronic component 24 is disposed on the interposer 23 and electrically connected to the interposer 23, the substrate 22 and the circuit board 21. The electronic component 24 is, for example, a switch ASIC, which has multiple conductive structures to electrically connect the interposer 23 and the optical module 25.

[0031] The optical module 25 is disposed on and electrically connected to the electronic component 24, and is electrically connected to the interposer 23, the substrate 22 and the circuit board 21 through the electronic component 24. The optical module 25 includes, for example, an optical chip of photonic integrated circuit (PIC) and a semiconductor chip of electronic integrated circuit (EIC).

[0032] The memory element 26 is disposed on the intermediary plate 23 and electrically connected to the intermediary plate 23, the substrate 22 and the circuit board 21. The memory element 26 is, for example, a high bandwidth memory (HBM).

[0033] The height of the memory element 26 relative to the interposer 23 (or substrate 22) is approximately the same as the height of the optical module 25 and the electronic component 24 relative to the interposer 23 (or substrate 22), and the weight of the memory element 26 is approximately the same as the weight of the optical module 25 and the electronic component 24, to prevent the interposer 23 from cracking due to uneven weight distribution. Furthermore, the width of the memory element 26 is smaller than the width of the optical module 25.

[0034] The heat sink 27 is disposed on the memory element 26 and the optical module 25, and is thermally connected to the memory element 26 and the optical module 25.

[0035] In this embodiment, the heat sink 27 includes a heat sink 271 and a support portion 272 extending outward from the surface of the heat sink 271, so that the heat sink 27 is erected on the circuit board 21 through the support portion 272, and the heat sink 271 is attached to the memory element 26 and the optical module 25 through thermally conductive adhesive 28.

[0036] Please refer to the following at the same time. Figure 3 The diagram shows a partial top view of the optical packaging structure 2. The heat sink 271 defines a first block 2711 and a second block 2712. The first block 2711 is located above the optical module 25, and the second block 2712 is located above the memory element 26. The size of the first block 2711 is different from the size of the second block 2712. For example, in application, the size of the optical module 25 is larger than the size of the memory element 26, so that the size of the first block 2711 is larger than the size of the second block 2712.

[0037] See also Figure 4 This is a cross-sectional schematic diagram of another embodiment of the optical packaging structure of this application.

[0038] This embodiment is largely the same as the previous embodiment, with the main difference being that the thickness of the heat sink 371 in the second block 3712 (corresponding to the area above the memory element 26) is greater than the thickness of the first block 3711 (corresponding to the area above the optical module 25). Thus, even if the size of the first block 3711 is larger than the size of the second block 3712, the rigidity and heat dissipation can still be improved by increasing the thickness of the second block 3712 (corresponding to the area above the memory element 26).

[0039] In summary, the optical packaging structure of this application primarily stacks the optical module on top of electronic components, ensuring that the height of the memory component is equal to the stacked height of the optical module and electronic components. This allows for a design where the bonding surface with the heat sink can be aligned at the same height, thereby reducing the risk of chip breakage during delamination and heat sink bonding. Furthermore, since the overall structure of the optical module is mounted on the electronic components, and both are situated on an interposer, this interconnected electrical structure enables faster signal transmission, avoiding signal delays and losses.

[0040] The above embodiments are illustrative of the principles and effects of this application and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.

Claims

1. An optical packaging structure, characterized in that, include: substrate; Electronic components are disposed on the substrate and electrically connected to the substrate; An optical module is disposed on the electronic component and electrically connected to the electronic component; Memory elements are disposed on the substrate and electrically connected to the substrate; as well as A heat sink is disposed on the memory element and the optical module, and thermally connected to the memory element and the optical module.

2. The optical packaging structure as described in claim 1, characterized in that, The optical packaging structure also includes an intermediary plate disposed between the substrate and the electronic component and the memory component, so that the electronic component and the memory component are connected to and electrically connected to the intermediary plate.

3. The optical packaging structure as described in claim 1, characterized in that, The optical packaging structure also includes a circuit board for mounting the substrate, and the substrate is electrically connected to the circuit board.

4. The optical packaging structure as described in claim 1, characterized in that, The height of the memory element relative to the substrate is the same as the height of the optical module and the electronic element relative to the substrate.

5. The optical packaging structure as described in claim 1, characterized in that, The weight of the memory element is the same as the weight of the optical module and the electronic element.

6. The optical packaging structure as described in claim 1, characterized in that, The heat sink includes a heat sink and a support extending outward from the surface of the heat sink, so that the heat sink is placed on the memory element and the optical module by thermally conductive adhesive.

7. The optical packaging structure as described in claim 6, characterized in that, The heat sink is defined with a first block and a second block, and the size or thickness of the first block is different from the size or thickness of the second block.

8. The optical packaging structure as described in claim 7, characterized in that, The first block is located above the optical module, and the second block is located above the memory element, with the size of the first block being larger than the size of the second block.

9. The optical packaging structure as described in claim 8, characterized in that, The thickness of the second block is greater than the thickness of the first block.

10. The optical packaging structure as described in claim 1, characterized in that, The memory element is a high-bandwidth memory, the electronic element is a conversion-type application-specific integrated circuit, and the optical module includes photonic integrated circuit elements and electronic integrated circuit elements.