Ge-si alloy absorption enhancement layer based spectrum width tunable near-infrared avalanche photodetector

Abstract

The utility model belongs to photoelectric detector technical field discloses a kind of germanium silicon alloy absorption enhancement layer spectral width adjustable near-infrared avalanche photodetector, from bottom to top sequentially include silicon-on-insulator substrate, intrinsic silicon layer, p-type silicon charge area, germanium silicon alloy layer;Silicon-on-insulator substrate upper surface, intrinsic silicon layer mesa structure, germanium silicon alloy layer mesa structure are covered by oxidation medium layer;Oxidation medium layer outer surface spin-coat polyimide dielectric layer;Germanium silicon alloy layer top center position is provided with first metal electrode, first metal electrode penetrates polyimide dielectric layer and with germanium silicon alloy layer upper surface contact;The back surface of the silicon-on-insulator substrate is provided with second metal electrode and located in the periphery of oxidation medium layer.The utility model can realize visible light-near-infrared wide spectrum detection and near-infrared wave band special detection respectively under the condition of normal light and back light, with wave band multiplexing detection function.

Description

Technical Field

[0001] This utility model belongs to the field of photoelectric detector technology, and relates to a near-infrared avalanche photoelectric detector with tunable spectral width based on germanium-silicon alloy absorption enhancement layer. Background Technology

[0002] Avalanche photodetectors (APDs) are widely used in near-infrared lidar and obstacle avoidance in autonomous driving due to their high gain. Pure silicon (Si) avalanche photodetectors have mature technology and broad industrial prospects, but their light response decays rapidly in the near-infrared 1064nm and longer wavelength bands, necessitating alternatives. Currently, commercial short-wave infrared avalanche photodetectors generally use III-V group materials such as indium phosphide (InP) and indium gallium arsenide (InGaAs), which are difficult and costly to fabricate, making them incompatible with the mainstream complementary metal-oxide-semiconductor (CMOS) process for silicon-based integrated circuits. Furthermore, their k-value limitations result in low gain-bandwidth product and high dark current. Pure germanium (Ge)-based avalanche photodetectors have lower costs and strong compatibility with Si processes, but the material properties of germanium detectors result in a low multiplication factor, making them unsuitable for weak light detection.

[0003] To overcome the aforementioned material limitations, the absorption-multiplication-charge separation (SAMC) structure has become a mainstream technology that balances device cost, silicon-based process compatibility, and device performance, expanding the application scope of silicon-based processes in near-infrared avalanche detectors. This involves using materials with stronger short-wave infrared absorption (such as Ge) as the short-wave infrared absorption region and silicon with lower hole-electron ionization as the electron multiplication region. The two are integrated through heteroepitaxial growth or bonding, achieving lower noise and a higher gain-bandwidth product while maintaining compatibility with silicon processes. However, in this type of device manufacturing, the quality of hetero-integration becomes a major factor influencing dark current surges, especially in heteroepitaxial SAMC APD devices, where charge carriers recombine due to interface defects when passing through the hetero-integration interface. For conventional pure germanium-pure silicon hetero-integrated SAMC structures, the large difference in lattice coefficients on both sides of the germanium-silicon interface results in interface defect densities generally exceeding 10⁹ cm⁻¹. -2Furthermore, the unstable natural oxidation state of the germanium material sidewalls in conventional mesa SAMC structures leads to significant internal and sidewall leakage currents, making it difficult to meet the requirements of low dark current and high gain in APD applications. The related dark current suppression measures, such as interface sacrifice / buffer layers and atomic layer deposition (ALD)-based sidewall protection, are complex, significantly increasing the manufacturing difficulty and cost of silicon-based SAMC short-wave infrared avalanche photodetectors, thus limiting their industrialization prospects. Additionally, the visible light absorption bandwidth (400nm~approximately 1000nm) of the silicon-based region and the absorption enhancement region (approximately 900nm~above 1500nm) overlap in this type of device, forming a broad absorption band. This causes the device's response to visible light to mask its near-infrared response, preventing effective detection in the near-infrared band in practical applications such as daylight or when visible light blinds the device. Utility Model Content

[0004] (a) Purpose of the utility model The purpose of this invention is to provide a near-infrared avalanche photodetector with tunable spectral width based on a germanium-silicon alloy (SiGe) absorption enhancement layer and its fabrication method, so as to solve the problems in the existing pure silicon-pure germanium type SAMC APD technology.

[0005] (II) Technical Solution To address the aforementioned technical problems, this utility model provides a near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy. From bottom to top, it comprises an insulator-on-silicon substrate 1, an intrinsic silicon layer 2, a p-type silicon charge region 3, and a germanium-silicon alloy layer 4. The upper surface of the insulator-on-silicon substrate 1, the mesa structure of the intrinsic silicon layer 2, and the mesa structure of the germanium-silicon alloy layer 4 are covered by an oxide dielectric layer 5. A polyimide dielectric layer 6 is spin-coated onto the outer surface of the oxide dielectric layer 5. A first metal electrode 7 is disposed at the center of the top of the germanium-silicon alloy layer 4, penetrating the polyimide dielectric layer 6 and contacting the upper surface of the germanium-silicon alloy layer 4. A second metal electrode 8 is disposed on the back side of the insulator-on-silicon substrate 1 and located around the oxide dielectric layer 5.

[0006] Furthermore, the silicon-on-insulator substrate 1 includes a low-doped silicon filter layer 11, a silicon oxide layer 12, and a high-doped n-type device layer 13 arranged sequentially from bottom to top.

[0007] p-type silicon charge region 3 is embedded within the upper surface of intrinsic silicon layer 2.

[0008] The germanium-silicon alloy layer 4 includes an intrinsic germanium-silicon alloy layer 41 and a p-type germanium-silicon alloy layer 42 formed on top of it. The intrinsic germanium-silicon alloy layer 41 is a germanium-silicon alloy epitaxial structure with a Si / Ge composition ratio of 7:3; the p-type germanium-silicon alloy layer 42 is a p-type doped germanium-silicon alloy epitaxial structure with a Si / Ge composition ratio of 7:3, and is heavily doped with boron as the doping element.

[0009] The silicon-on-insulator substrate 1 is silicon-on-insulator, wherein the thickness of the highly doped n-type device layer is 0.5~2μm, and the doping element is phosphorus or arsenic, with a phosphorus doping concentration of 5×10⁻⁶. 18 ~1×10 20 cm -3 The thinnest silicon-doped filter layer has a thickness of 150-200 μm, and the doping element is phosphorus or arsenic, with a phosphorus doping concentration of 1×10⁻⁶. 15 ~5×10 15 cm -3 .

[0010] The p-type silicon charge region 3 is doped with boron at a concentration of 7 × 10⁻⁶. 16 / cm 3 ~1×10 18 / cm 3 .

[0011] The oxide dielectric layer 5 is aluminum oxide grown by atomic layer deposition (ALD), silicon oxide grown by plasma enhanced chemical vapor deposition (PECVD), or a combination of both.

[0012] The first metal electrode 7 is an aluminum electrode.

[0013] The second metal electrode 8 is an aluminum electrode.

[0014] (III) Beneficial Effects The above-mentioned technical solution provides a near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy, which has the following beneficial effects: (1) Simulation results show that the short-pull-through structure adopted by the device has a low breakdown voltage temperature drift coefficient, such as Figure 2 As shown, its temperature adaptability is improved compared to typical thick silicon pull-through infrared enhancement devices (typical value ~3V / ℃), and it can be used for the development of wide-temperature-range tolerant near-infrared photodetectors.

[0015] (2) This invention can achieve broadband detection of visible light and near-infrared bands and dedicated detection of near-infrared bands under forward and reverse light conditions, respectively. It has band multiplexing detection function and the advantages of visible light filtering and spectral width modulation type near-infrared detectors. Its visible light filtering effect helps to achieve effective detection of the near-infrared band in practical application scenarios such as daytime or visible light blindness. It can be used in the manufacture of wavelength-extended silicon-based near-infrared photodetectors, such as... Figure 3 As shown.

[0016] (3) Compared with the pure germanium-pure silicon heterojunction APD structure, this invention uses a germanium-silicon alloy to construct the heterojunction interface between the absorption layer and the charge layer in the SAMC structure, which effectively suppresses leakage current caused by interface defects. At the same time, through the sidewall passivation process, it can theoretically further suppress sidewall leakage current caused by surface defects, thereby reducing the dark current of the device. Figure 4 As shown.

[0017] (4) The use of depressurized chemical vapor phase epitaxy can achieve good control of defect density in germanium-silicon alloys, while reducing the non-active diffusion of dopants. It can process high-quality germanium-silicon alloys at a relatively low temperature with a faster growth rate (compared to other germanium-silicon alloy epitaxy methods such as molecular beam epitaxy), which is beneficial for device cost control and industrialization. Attached Figure Description

[0018] Figure 1 This is a cross-sectional view of a near-infrared avalanche photodetector structure with adjustable spectral width based on a germanium-silicon alloy absorption enhancement layer according to this utility model. Figure 2 Comparison of photocurrent / dark current simulation results of the photodetector (backlight mode) of this utility model under different operating temperature conditions; Figure 3 The visible-near-infrared (0.35-1.35μm) spectral response of the photodetector of this invention under forward-incoming light and back-incoming light conditions are shown. Figure 4 This paper compares the dark current in the linear region of the photodetector of this invention, which uses a germanium-silicon alloy absorption layer (preferably Si0.7Ge0.3 composition) and the same structure using a pure germanium absorption layer.

[0019] exist Figure 1 In the diagram, 1-Silicon-on-insulator substrate; 11-Low-doped silicon filter layer; 12-Silicon oxide layer; 13-Highly doped n-type device layer; 2-Intrinsic multiplication layer; 3-P-type silicon charge region; 4-Germanium-silicon alloy layer; 41-Intrinsic germanium-silicon alloy layer; 42-P-type germanium-silicon alloy layer; 5-Oxide dielectric layer; 6-Polyimide dielectric layer; 7-First metal electrode; 8-Second metal electrode. Detailed Implementation

[0020] To make the objectives, contents, and advantages of this utility model clearer, the specific embodiments of this utility model will be described in further detail below with reference to the accompanying drawings and examples.

[0021] This invention provides a spectral width-tunable near-infrared avalanche photodetector based on a germanium-silicon alloy absorption enhancement layer and its fabrication method, solving the aforementioned problems related to the design and fabrication of existing SAMC-type APD structures.

[0022] like Figure 1As shown, the near-infrared avalanche photodetector structure with tunable spectral width based on the germanium-silicon alloy absorption enhancement layer in this embodiment includes, from bottom to top, a silicon-on-insulator substrate 1, an intrinsic silicon layer 2, a p-type silicon charge region 3, and a germanium-silicon alloy layer 4. The silicon-on-insulator substrate 1 includes a low-doped silicon filter layer 11, a silicon oxide layer 12, and a high-doped n-type device layer 13. The germanium-silicon alloy layer 4 includes an intrinsic germanium-silicon alloy layer 41 and a p-type germanium-silicon alloy layer 42. It also includes an oxide dielectric layer 5, which covers the silicon-on-insulator 1, the intrinsic silicon layer 2, the p-type silicon charge region 3, and the germanium-silicon alloy layer 4. A polyimide dielectric layer 6 is disposed on the outer surface of the oxide dielectric layer 5. A first metal electrode 7 is disposed on the top of the p-type germanium-silicon alloy layer 42, and a second metal electrode 8 is disposed on the upper surface of the silicon-on-insulator 1. The first metal electrode 7 penetrates the oxide dielectric layer 5 and the polyimide dielectric layer 6.

[0023] The silicon-on-insulator substrate 1 provides mechanical support for the device structure and visible light filtering under backlight conditions. Its highly doped n-type device layer 13 can form an ohmic contact with the first metal electrode 7 and has a high n-type doping concentration. The doping atoms are phosphorus or arsenic. The low-doped silicon filter layer 11 has a thickness of approximately 150~200μm and has a low n-type doping concentration. The purpose is to achieve visible light filtering performance. The doping elements are phosphorus or arsenic.

[0024] The intrinsic silicon layer 2 enables carrier multiplication in the detector. The electric field strength inside the APD detector reaches its maximum value on the longitudinal section of this region. The lower the background doping concentration and the lower the defect density in the intrinsic silicon layer 2, the lower the carrier recombination of the device. This is the core functional area for the detector to achieve high multiplication and low dark current.

[0025] The p-type silicon charge region 3 enables field intensity control within the device, confining the high electric field region within the mesa structure of the intrinsic silicon layer 2. This reduces the electric field intensity at the interface between the p-type charge region 3 and the germanium-silicon alloy layer 4, mitigating the negative impact of interface defects on the device's dark current. The p-type silicon charge region is doped with boron, with the boron atoms in this region acting as acceptor impurities to provide holes. The preferred doping concentration for this charge region is approximately 7 × 10⁻⁶. 16 / cm 3 ~1×10 18 / cm 3 .

[0026] The germanium-silicon alloy layer 4 enables the absorption of photogenerated carriers in the detector, and comprises, from bottom to top, an intrinsic germanium-silicon alloy layer 41 and a p-type germanium-silicon alloy layer 42. The intrinsic germanium-silicon alloy layer 41 serves as the light absorption layer of the device, exhibiting a high light absorption coefficient in the near-infrared band. This enhances the light absorption of the detector in the near-infrared band at 1064 nm and above. Furthermore, the germanium-silicon alloy material with a germanium content ≤50% has a similar lattice coefficient to silicon, exhibiting lower interface defects than heterogeneous silicon integrated materials such as Ge and InGaAs, resulting in lower recombination current. The p-type germanium-silicon alloy layer 42 serves as the ohmic contact layer of the device. It is a heavily p-doped germanium-silicon alloy layer, enabling ohmic contact between the germanium-silicon alloy layer 4 and the second metal electrode 8. Preferably, the intrinsic germanium-silicon alloy layer is a germanium-silicon alloy epitaxial structure, wherein the Si / Ge composition ratio is 7:3, i.e., the intrinsic germanium-silicon alloy material has the chemical formula Si. 0.7 Ge 0.3 The p-type germanium-silicon alloy layer is a p-type doped germanium-silicon alloy epitaxial structure, wherein the Si / Ge composition ratio is 7:3. It is then heavily doped with boron as the dopant element, resulting in a p-type germanium-silicon alloy layer with the chemical formula p-Si. 0.7 Ge 0.3 .

[0027] The oxide dielectric layer 5 covers the silicon on insulator 1, intrinsic silicon layer 2, p-type silicon charge region 3 and germanium-silicon alloy layer 4, thereby suppressing the leakage current on the sidewall of the device. The oxide dielectric layer 5 is aluminum oxide, silicon oxide or a stack of the two.

[0028] The polyimide dielectric layer 6 further suppresses leakage current on the device surface and provides mechanical support to the sidewalls of the mesa structure.

[0029] The first metal electrode 7 is located on the surface of silicon-on-insulator 1, and is a ring-shaped electrode situated on the upper surface of the germanium-silicon alloy layer 4. It penetrates the oxide dielectric layer 5 and the polyimide dielectric layer 6, forming an ohmic contact with the p-type germanium-silicon alloy layer 42. The opening of this ring-shaped electrode exposes the photosensitive surface of the device covered by the polyimide dielectric layer 6. The second metal electrode 8 is located on the upper surface of the highly doped n-type device layer 13 of the silicon-on-insulator 1, forming an ohmic contact with the highly doped n-type silicon surface. Both the first metal electrode 7 and the second metal electrode 8 are aluminum electrodes.

[0030] The fabrication method of the spectral width-tunable near-infrared avalanche photodetector based on the germanium-silicon alloy absorption enhancement layer in this embodiment specifically includes the following steps: The silicon-on-insulator 1 is cleaned, and an intrinsic silicon layer 2 is grown on top of the silicon-on-insulator 1. An oxide layer is deposited on the intrinsic silicon layer 2 and a dielectric pattern mask is formed by photolithography. A p-type silicon charge region 3 is formed by ion implantation, and then the dielectric pattern mask is removed. An intrinsic germanium-silicon alloy layer 41 and a p-type germanium-silicon alloy layer 42 are grown sequentially on top of the intrinsic silicon layer 2. An oxide dielectric layer 5 is formed on the upper surface of the silicon-on-insulator 1, the intrinsic silicon layer 2, the intrinsic germanium-silicon alloy layer 41, and the outer surface of the p-type germanium-silicon alloy layer 42.

[0031] Then, a polyimide dielectric layer 6 is spin-coated, and a ring-shaped mask pattern is formed by photolithography on the polyimide dielectric layer 6. The oxide dielectric layer 5 is further etched to expose the surface of the p-type germanium-silicon alloy layer 42 to form a ring-shaped via. A first metal electrode 7 is placed in the ring-shaped via. Then, a thin film of aluminum metal is deposited on the upper surface of the silicon-on-insulator 1 and photolithography is performed to form a second metal electrode 8.

[0032] Example The following examples use conventional instruments, equipment and processes in the art, and all raw materials used are commercially available products with specifications that are conventional in the art.

[0033] A silicon-on-insulator 1 with a three-layer structure consisting of a low-doped silicon filter layer 11, a silicon oxide layer 12, and a highly doped n-type device layer 13 is used. The upper surface of the highly doped n-type device layer 13 is n-type doped, and the doping elements include, but are not limited to, phosphorus (P) and arsenic (As). The preferred phosphorus doping concentration is about 5 × 10⁻⁶. 18 -1×10 20 cm -3 After doping, the substrate is cleaned using standard processes to form a hydrophobic surface. Then, a high-temperature hydrogen desorption treatment is performed on the substrate surface using a reduced-pressure chemical vapor deposition (PECVD) system. Using this system, an intrinsic silicon layer 2 is grown on top of silicon-on-insulator (SiO2) 1, serving as the device multiplication layer, with a preferred thickness of 800-1100 nm. During this silicon epitaxy process, a lower growth temperature (preferably below 1000°C) compared to atmospheric pressure epitaxy reduces the inactive doping of the intrinsic silicon epitaxial layer by n-type dopant atoms in SiO2 1. Subsequently, a 200 nm thick silicon dioxide (SiO2) masking layer is grown on the upper surface of the intrinsic silicon layer 2 using plasma-enhanced chemical vapor deposition (PECVD), and photoresist is spin-coated. A standard photolithography-dry etching process is then used to fabricate the charge layer pattern on the SiO2 masking layer, masking the non-injection areas in the subsequent charge layer injection process. Next, boron is selectively implanted into the epitaxial intrinsic silicon using an ion implantation device (preferably with an implantation depth of approximately 100 nm-300 nm and a doping concentration of approximately 7 × 10⁻⁶). 16 / cm 3 ~1×10 18 / cm 3After ion implantation, the silicon oxide layer and photoresist pattern on the surface of the intrinsic silicon layer 2 are removed, thereby defining the p-type silicon charge region 3 of the device on the upper surface of the intrinsic silicon layer 2.

[0034] A second standard cleaning process is performed on the silicon epitaxial wafer after ion implantation to remove residual silicon oxide, photoresist, and metal ion impurities such as copper (Cu) and iron (Fe) from the surface. The surface of the silicon epitaxial layer before the second epitaxial process is then hydrophobically treated. Following this, a high-temperature hydrogen desorption treatment is performed on the surface of the silicon epitaxial layer using a reduced-pressure chemical vapor deposition (CVD) system before the second epitaxial process. A high-quality, low-germanium intrinsic germanium-silicon alloy is then deposited on the surface of the silicon epitaxial layer using a second epitaxial process, forming the intrinsic germanium-silicon alloy layer 41 of the device. The preferred Si / Ge composition ratio of the intrinsic germanium-silicon alloy layer is 7:3, meaning the intrinsic germanium-silicon alloy material has the chemical formula Si. 0.7 Ge 0.3 The preferred thickness of the intrinsic germanium-silicon alloy layer is 600nm-800nm. Simultaneously, during the aforementioned secondary epitaxy process, the high-temperature process of treating the surface of the intrinsic silicon layer 2 and the p-type silicon charge region 3 with high-temperature hydrogen desorption activates the boron ions previously implanted into the p-type silicon charge region 3.

[0035] After the intrinsic germanium-silicon alloy layer 41 is grown, the semi-finished product is kept in the epitaxial equipment chamber, and diborane (B₂H₆) is introduced into the chamber atmosphere to grow a 100-200 nm highly doped, low-germanium p-type germanium-silicon alloy layer. The preferred Si / Ge ratio of the intrinsic germanium-silicon alloy layer is 7:3, i.e., the chemical formula of the p-type germanium-silicon alloy material is p-Si. 0.7 Ge 0.3 The preferred boron doping concentration is approximately 5 × 10⁻⁶. 18 -1×10 20 cm -3 In the aforementioned silicon epitaxy process, the inactive doping of the previously grown intrinsic germanium-silicon epitaxial layer 41 by p-type dopants in the p-type germanium-silicon alloy layer 42 is reduced by using a lower growth temperature than that of atmospheric pressure epitaxy (preferably below 900°C for germanium-silicon alloy epitaxy). Simultaneously, the boron atoms in the p-type germanium-silicon alloy are activated in situ using the thermal process in the secondary epitaxy process, forming a low-resistivity p-type germanium-silicon alloy layer 42. Thus, the epitaxial growth process of the germanium-silicon alloy layer 4 (including the intrinsic germanium-silicon alloy layer 41 and the p-type germanium-silicon alloy layer 42) serving as the device absorption layer is realized.

[0036] Based on this, a 300-400 nm thick silicon dioxide mask layer is deposited on the surface of the p-type germanium-silicon alloy layer 42 using plasma-enhanced chemical vapor deposition (PECVD), and photoresist is spin-coated. The silicon dioxide mask layer is then patterned using a standard photolithography-dry etching process to form a silicon dioxide mask pattern. Inductively coupled plasma etching (ICP-RIE) is used to etch the germanium-silicon alloy layer 4, and the intrinsic silicon layer 2 is further etched using a similar dry etching method, progressively forming a mesa structure of the germanium-silicon alloy layer 4 and the intrinsic silicon layer 2. The overall etching depth is approximately 1600-2200 nm. The etching depth and effect can be characterized using a process wafer, and the mesa etching of this wafer can be characterized using scanning electron microscopy. After etching, the remaining silicon dioxide mask is removed using an acid etching process. Simultaneously, the unstable oxide layer formed on the sidewalls of germanium-silicon alloy layer 4 and intrinsic silicon layer 2 is removed, which helps suppress sidewall leakage caused by germanium oxides of different valence states on the sidewall surface of the germanium-silicon alloy layer at the device performance level. Then, the photoresist on the surface of the photosensitive chip semi-finished product is removed using an organic cleaning process and a plasma ashing process. Simultaneously, the oxygen plasma bombardment effect in the plasma ashing process forms stable silicon dioxide and germanium monoxide (Ge2O) on the sidewalls of the germanium-silicon alloy mesa, protecting the sidewalls and reducing sidewall leakage.

[0037] Subsequently, an oxide dielectric layer 5 is grown using atomic layer deposition (ALD) or plasma-enhanced chemical vapor deposition (PECVD). This can be aluminum oxide grown by ALD, silicon oxide grown by PECVD, or a combination of both. The oxide dielectric layer 5 isolates the germanium-silicon alloy from direct contact with air, reducing the content of germanium oxides in different valence states formed by oxidation and corrosion on the sidewalls of the germanium-silicon alloy mesa, thus mitigating sidewall leakage. Preferably, a 10-30 nm aluminum oxide and 200-400 nm silicon oxide stack is used to passivate the sidewalls and surface of the mesa structure. Based on this, a layer of polyimide dielectric is spin-coated, and a ring-shaped contact area is etched on the top of the germanium-silicon mesa using standard positive photolithography, exposing a portion of the oxide dielectric layer 5 located on the top surface of the p-type germanium-silicon alloy layer 42. This organic electrolyte layer is then cured using an imidization process to form a polyimide dielectric layer 6, which mechanically reinforces and fills the sidewalls of the mesa structure.

[0038] Further, using the polyimide electrolyte layer 6 as a mask, the exposed annular oxide dielectric layer 5 region and the subsequent second metal electrode 8 position within the annular contact area are patterned using an acid etching process, forming an annular contact area on the upper surface of the p-type germanium-silicon alloy layer 42. Next, the first metal electrode 7 is fabricated using an electrode lift-off process: First, a photomask is prepared on the surface of the polyimide dielectric layer 6 using a negative photoresist photolithography process, exposing the annular contact area; then, an aluminum film, preferably 0.5-1 μm thick, is deposited on the surface of the negative photoresist photomask using an electron beam evaporation process. At this point, the aluminum film connects to the highly doped p-type germanium-silicon alloy layer 42 through the annular contact area, forming an ohmic contact; finally, the negative photoresist photomask beneath the aluminum film is dissolved using an organic solvent penetration method, causing the aluminum film on the negative photoresist surface to detach from the surface of the photosensitive device semi-finished product, forming the patterned first metal electrode 7.

[0039] After the first metal electrode 7 is fabricated, the second metal electrode 8 is fabricated using an electrode lift-off process: First, a photomask is fabricated on the entire device surface using a negative photoresist lithography process, and the highly n-doped silicon device layer 13 at the location of the second metal electrode 8 is exposed through negative photoresist development; then, an aluminum film, preferably 0.5-1 μm thick, is deposited on the surface of the negative photoresist photomask using an electron beam evaporation process. At this point, the aluminum film is in contact with the highly n-doped silicon device layer 13 through the exposed area, forming an ohmic contact; finally, the negative photoresist photomask beneath the aluminum film is dissolved using an organic solvent penetration method, causing the aluminum film on the negative photoresist surface to detach from the surface of the photosensitive device semi-finished product, forming the patterned second metal electrode 8.

[0040] like Figure 2 As shown in the simulation results, the short-through-type structure of the device exhibits a lower breakdown voltage temperature drift coefficient (<0.1V / ℃) than typical thick silicon near-infrared APD detectors (~3V / ℃ level), demonstrating better temperature adaptability. Furthermore, as... Figure 3 As shown, simulation results indicate that the device can achieve broadband detection in the visible-near-infrared band and dedicated detection in the near-infrared band under both forward-facing and back-facing light conditions, respectively. It realizes band-multiplexed detection functionality and possesses the advantages of visible light filtering and spectral modulation-type near-infrared detectors. Its visible light filtering effect helps achieve effective detection in the near-infrared band in practical application scenarios such as daytime or visible light blindness. Furthermore, as... Figure 4As shown in the simulation results, compared with the pure germanium-silicon heterojunction APD structure of the same structural size, the heterojunction interface of the absorption layer and charge layer in the SAMC structure constructed by this invention using germanium-silicon alloy can effectively suppress leakage current caused by interface defects. Simultaneously, through sidewall passivation, theoretically, sidewall leakage current caused by surface defects can be further suppressed, reducing the device's dark current. Furthermore, the use of reduced-pressure chemical vapor deposition (PVD) can achieve good defect density control of the germanium-silicon alloy, while reducing the inactive diffusion of dopants. This allows for the processing of high-quality germanium-silicon alloys at relatively low temperatures and a faster growth rate (compared to other germanium-silicon alloy epitaxial methods such as molecular beam epitaxy), which is beneficial for device cost control and industrialization.

[0041] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy, characterized in that, From bottom to top, the structure includes a silicon-on-insulator substrate (1), an intrinsic silicon layer (2), a p-type silicon charge region (3), and a germanium-silicon alloy layer (4). The upper surface of the silicon-on-insulator substrate (1), the mesa structure of the intrinsic silicon layer (2), and the mesa structure of the germanium-silicon alloy layer (4) are covered by an oxide dielectric layer (5). A polyimide dielectric layer (6) is spin-coated on the outer surface of the oxide dielectric layer (5). A first metal electrode (7) is disposed at the top center of the germanium-silicon alloy layer (4), and the first metal electrode (7) penetrates the polyimide dielectric layer (6) and contacts the upper surface of the germanium-silicon alloy layer (4). A second metal electrode (8) is disposed on the back side of the silicon-on-insulator substrate (1) and is located around the oxide dielectric layer (5).

2. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 1, characterized in that, The silicon-on-insulator substrate (1) includes a low-doped silicon filter layer (11), a silicon oxide layer (12), and a high-doped n-type device layer (13) arranged sequentially from bottom to top.

3. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 2, characterized in that, The p-type silicon charge region (3) is embedded in the upper surface of the intrinsic silicon layer (2).

4. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 3, characterized in that, The germanium-silicon alloy layer (4) includes an intrinsic germanium-silicon alloy layer (41) and a p-type germanium-silicon alloy layer (42) formed on top thereon.

5. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 4, characterized in that, The intrinsic germanium-silicon alloy layer (41) is a germanium-silicon alloy epitaxial structure, wherein the Si / Ge composition ratio is 7:

3.

6. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 5, characterized in that, The p-type germanium-silicon alloy layer (42) is a p-type doped germanium-silicon alloy epitaxial structure, in which the Si / Ge composition ratio is 7:

3. Based on this, heavy doping is carried out, and the doping element is boron.

7. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 6, characterized in that, The silicon-on-insulator substrate (1) is silicon-on-insulator, and the thickness of the highly doped n-type device layer (13) is 0.5~2μm. The doping element is phosphorus or arsenic, and the phosphorus doping concentration is 5×10⁻⁶. 18 ~1×10 20 cm -3 .

8. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 7, characterized in that, The low-doped silicon filter layer (11) has a thickness of 150~200μm, and the doping element is phosphorus or arsenic, with a phosphorus doping concentration of 1×10⁻⁶. 15 ~5×10 15 cm -3 .

9. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 8, characterized in that, The p-type silicon charge region (3) is doped with boron, with a doping concentration of 7 × 10⁻⁶. 16 / cm 3 ~1×10 18 / cm 3 .

10. The near-infrared avalanche photodetector with tunable absorption enhancement layer based on germanium-silicon alloy as described in claim 9, characterized in that, The oxide medium layer (5) is aluminum oxide grown by atomic layer deposition, silicon oxide grown by plasma-enhanced chemical vapor deposition, or a combination of both; the first metal electrode (7) is an aluminum electrode; the second metal electrode (8) is an aluminum electrode.

Images