Display device

Abstract

The application relates to a display device, comprising an assembly substrate and a light-emitting unit arranged on the surface of the assembly substrate. The light-emitting unit comprises a chip substrate, a plurality of chip groups, a pad group, an electrode group and a connecting group. The chip substrate is provided with a first surface, a second surface opposite to the first surface and a first via hole connecting the first surface and the second surface; the plurality of chip groups are arranged on the first surface, the plurality of chip groups are used for emitting light of different colors, at least one chip group comprises a plurality of light-emitting chips connected in series; the pad group is arranged on the first surface and connected with the light-emitting chips; the electrode group is arranged on the second surface; and the connecting group is used for connecting the pad group and the electrode group through the first via hole. The application can improve the light-emitting efficiency of the light-emitting unit and effectively improve the mura problem.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to display devices. Background Technology

[0002] In the LED (Light-Emitting Diode) display manufacturing process, in order to eliminate the image quality degradation caused by wavelength and brightness dispersion, the "test one chip at a time → divide into bins (intervals) → mix bins" strategy is usually adopted: first, a high-speed probe station is used to sample the photoelectric parameters of a single chip, then it is divided into several bins according to a preset precision, and finally, different bins are mixed according to a predetermined ratio so that the macroscopic visual color difference of the human eye meets the display requirements.

[0003] However, Micro LED chips have a smaller side length, and the number of chips per wafer is two orders of magnitude higher than that of Mini LED, causing traditional separate / mixed-bin processes to become almost ineffective in large-screen applications.

[0004] Therefore, Micro LED cannot follow the same quality control path as Mini LED, which involves "separate binning / mixing binning" for each individual LED. Summary of the Invention

[0005] Therefore, it is necessary to provide a display device to address the aforementioned technical problems.

[0006] This application provides a display device, including:

[0007] Component substrate;

[0008] A light-emitting unit disposed on the surface of the component substrate, the light-emitting unit comprising:

[0009] A chip substrate is provided with a first surface, a second surface opposite to the first surface, and a first via connecting the first surface and the second surface;

[0010] Multiple chip groups are disposed on the first surface, and the multiple chip groups are used to emit light of different colors, and at least one of the chip groups includes multiple light-emitting chips connected in series;

[0011] A pad assembly is disposed on the first surface and connected to the light-emitting chip;

[0012] An electrode assembly is disposed on the second surface;

[0013] A connection group is used to connect to the pad group and the electrode group via the first via.

[0014] Beneficial effects: Firstly, at least one chipset includes multiple LEDs connected in series. Compared to a chipset with only one LED, a chipset with multiple LEDs can emit significantly more light under the same driving current, resulting in higher luminous efficiency. Secondly, including multiple LEDs in series in at least one chipset increases the volume of the LED unit, enabling separate or combined LED integration. This effectively addresses the current issues of low utilization and ineffective integration of LED units, thereby improving module consistency. Furthermore, since at least one chipset includes multiple LEDs connected in series, the amount of light emitted can be increased by increasing the number of LEDs, reducing wavelength differences in different regions and effectively mitigating mura issues.

[0015] In one embodiment, the light-emitting unit includes:

[0016] A planarization layer is disposed on the first surface, wherein the surface of the planarization layer away from the chip substrate is flush with the light-emitting surface of the light-emitting chip.

[0017] Beneficial effects: On the one hand, the planarization layer is disposed on the first surface, and the surface of the planarization layer away from the chip substrate is flush with the light-emitting surface of the light-emitting chip. This makes the light-emitting surfaces of each light-emitting chip coplanar, the emission starting points of each light-emitting chip as consistent as possible, and the optical path difference of the beams emitted by each light-emitting chip approaching zero. Different colors of light can radiate into space from the same starting point and mix synchronously during propagation, improving the light mixing effect of the display device. On the other hand, the planarization layer is disposed on the first surface, and the surface of the planarization layer away from the chip substrate is flush with the light-emitting surface of the light-emitting chip. This makes the light-emitting surfaces of each light-emitting chip coplanar, the light radiation central axis height of each light-emitting chip consistent, and the radiation ranges of different colors of light almost overlap. This allows the beams emitted by the light-emitting units to be received almost simultaneously, reducing the probability of light uniformity loss due to radiation area misalignment and improving the display uniformity of the display device.

[0018] In one embodiment, the pad group includes a first pad and a plurality of second pads;

[0019] The chipset includes a first end and a second end. The first end of each chipset is connected to the first pad, and the second ends of the multiple chipsets are respectively connected to the multiple second pads.

[0020] Wherein, the second end of the chip group is located on the side of the chip group close to the chip substrate, and the first end of the chip group is located on the side of the chip group away from the chip substrate;

[0021] In the case where the chipset includes multiple light-emitting chips, the multiple light-emitting chips are stacked in the thickness direction of the light-emitting unit.

[0022] Beneficial effects: The second end of the chipset is located on the side of the chipset closer to the chip substrate, and the first end of the chipset is located on the side of the chipset farther from the chip substrate. Therefore, the chipset is packaged in a positive mounting manner. After being packaged into a light-emitting unit, conventional die bonding and other module manufacturing processes can be reused without adding additional processes or improving existing equipment, thus avoiding a significant increase in manufacturing costs.

[0023] In one embodiment, the light-emitting unit includes:

[0024] A common polarity layer is disposed on the planarization layer, on the side of the chipset facing away from the chip substrate;

[0025] The second via is used to connect the first pad and the common polarity layer.

[0026] Beneficial effects: By setting a common polarity layer on the planarization layer and the side of the chipset away from the chip substrate, and setting a second via for connecting the first pad and the common polarity layer, the common polarity connection of the upright light-emitting chip can be realized, and the electrical stability of the light-emitting unit can be improved.

[0027] In one embodiment, the pad group includes a plurality of first pads and a plurality of second pads;

[0028] The chipset includes a first end and a second end, both of which are located on the side of the chipset close to the chip substrate. The first ends of multiple chipsets are respectively connected to the first pad, and the second ends of each chipset are respectively connected to the second pad.

[0029] The light-emitting unit includes:

[0030] Multiple third connection lines are used to connect to the first end of each of the chipsets respectively;

[0031] The fourth connection line is used to connect the first and second pads corresponding to the multiple light-emitting chips in series when the chipset includes multiple light-emitting chips.

[0032] Beneficial effects: Both the first and second ends of the chipset are located on the side of the chipset closest to the chip substrate, forming a flip-chip structure. This reduces the obstruction of light by the electrodes and improves the light extraction efficiency of the light-emitting unit. Furthermore, since both the first and second ends of the chipset are in contact with the chip substrate, heat dissipation can be achieved through the chip substrate, optimizing the heat dissipation path and reducing thermal resistance.

[0033] In one embodiment, the number of the first vias is multiple;

[0034] The electrode assembly includes a first electrode and multiple second electrodes;

[0035] The connection group includes a first connection line and a plurality of second connection lines. The first connection line is connected to the first pad and to the first electrode through the first via. The plurality of second connection lines are respectively connected to a plurality of second pads. The first connection line and the plurality of second connection lines are used to transmit the driving signal connected to the first electrode and the second electrode, so that the corresponding light-emitting chip emits light under the drive of the driving signal.

[0036] Beneficial effects: The connection group includes a first connecting line and multiple second connecting lines. The first connecting line is connected to a first pad and to a first electrode via a first via. The multiple second connecting lines are respectively connected to multiple second pads. The first connecting line and the multiple second connecting lines are used to transmit driving signals to the first and second electrodes, causing the corresponding light-emitting chips to emit light under the drive of the driving signals. Therefore, only the light-emitting chips are disposed on the first surface of the chip substrate, and the light-emitting chips receive driving signals from the second surface. This avoids the light-emitting area occupied by the driving chip on the first surface, resulting in a larger aperture ratio for the light-emitting unit and improved luminous efficiency.

[0037] In one embodiment, the pad group includes a plurality of third pads; the light-emitting unit includes:

[0038] A driver chip is disposed on the first surface, and the driver chip is connected to the first pad and the plurality of third pads;

[0039] Multiple fifth connection lines are provided for connecting the third pad and the second pad;

[0040] The driver chip is used to output a driving signal to the light-emitting chip through the third pad, the fifth connection line and the second pad, so that the light-emitting chip emits light under the drive of the driving signal;

[0041] The connection group is used to receive control signals, which are transmitted to the driver chip via a portion of the third pad, and are used to control the driver chip to output the drive signal.

[0042] Beneficial effects: The driver chip is disposed on the first surface and connected to the first pad and multiple third pads. Multiple fifth connection lines connect the third pads and second pads, allowing the driver chip to output a driving signal to the light-emitting chip via the third pads, fifth connection lines, and second pads, causing the light-emitting chip to emit light under the drive of the driving signal. A control signal is connected via a connection group and transmitted to the driver chip via a portion of the third pads to control the driver chip's output of the driving signal. Therefore, disposing the driver chip on the first surface avoids the increased thickness of the light-emitting unit that would occur if the driver chip were disposed on the second surface, thus reducing the thickness of the light-emitting unit.

[0043] In one embodiment, the number of control signals is multiple; the number of first vias is multiple;

[0044] The plurality of the third pads include power supply pads, clock pads, data pads and a plurality of drive pads;

[0045] The driver chip is configured with multiple pins, which are respectively connected to the first pad, the power supply pad, the clock pad, the data pad, and multiple driver pads.

[0046] The electrode group includes a first electrode and multiple signal transmission electrodes;

[0047] The connection group includes a first connection line and multiple sixth connection lines. The first connection line is connected to the first pad and to the first electrode via the first via. The multiple sixth connection lines are respectively connected to the power supply pad, the clock pad, and the data pad, and are respectively connected to the multiple signal transmission electrodes via the multiple first vias.

[0048] Among them, multiple sixth connection lines are used to transmit multiple control signals respectively.

[0049] Beneficial effects: Power supply pads, clock pads, data pads and multiple driver pads are provided on the first surface. Each pad is connected to multiple pins of the driver chip. The driver chip can receive multiple control signals through each pad, multiple sixth connection lines and multiple signal transmission electrodes provided on the second surface. This avoids the need to provide complex driving circuits, such as thin film transistors (TFTs) or complementary metal oxide semiconductors (CMOS), and simplifies the driving architecture of the light-emitting unit.

[0050] In one embodiment, a chipset includes a plurality of light-emitting chips for emitting red light.

[0051] Beneficial effects: Due to the limitations of the light-emitting materials that emit red light (red light uses the AGaInP material system, while blue and green light use the InGaN material system, and the former has a carrier recombination efficiency that is an order of magnitude lower than that of the latter, mainly due to the inherent properties of the materials), the luminous efficiency of red light-emitting chips is relatively low. By increasing the number of red light-emitting chips, the amount of red light emitted can be increased, thereby improving the luminous efficiency of the red chip group.

[0052] In one embodiment, each chipset includes a plurality of the light-emitting chips.

[0053] Beneficial effects: Each chipset includes multiple light-emitting chips. Since the number of light-emitting chips in each chipset has increased, the amount of light emitted by each color has also increased, thereby improving the luminous efficiency of each chipset. Attached Figure Description

[0054] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0055] Figure 1 This is a schematic diagram of the structure of a display device according to an embodiment of this application;

[0056] Figure 2 This is one of the structural schematic diagrams of the light-emitting unit in one embodiment of this application;

[0057] Figure 3 This is a second schematic diagram of the structure of the light-emitting unit in one embodiment of this application;

[0058] Figure 4 This is one of the top views of the first surface of the chip substrate in one embodiment of this application;

[0059] Figure 5 This is a top view of the second surface of the chip substrate in one embodiment of this application;

[0060] Figure 6 This is one of the cross-sectional views of the light-emitting unit in one embodiment of this application;

[0061] Figure 7 This is a second cross-sectional view of the light-emitting unit in one embodiment of this application;

[0062] Figure 8 This is the third schematic diagram of the structure of the light-emitting unit in one embodiment of this application;

[0063] Figure 9 This is a third cross-sectional view of the light-emitting unit in one embodiment of this application;

[0064] Figure 10 This is a second top view of the first surface of the chip substrate in one embodiment of this application;

[0065] Figure 11 This is a fourth cross-sectional view of the light-emitting unit in one embodiment of this application;

[0066] Figure 12 This is a third top view of the first surface of the chip substrate in one embodiment of this application;

[0067] Figure 13 This is the fourth schematic diagram of the structure of the light-emitting unit in one embodiment of this application;

[0068] Figure 14 This is one of the circuit diagrams of the driver chip and chipset in one embodiment of this application;

[0069] Figure 15 This is a second circuit diagram of the driver chip and chipset in one embodiment of this application;

[0070] Figure 16 This is the fifth cross-sectional view of the light-emitting unit in one embodiment of this application;

[0071] Figure 17 This is a sixth cross-sectional view of the light-emitting unit in one embodiment of this application;

[0072] Figure 18 This is the seventh cross-sectional view of the light-emitting unit in one embodiment of this application.

[0073] Explanation of icon numbers:

[0074] 110: Component substrate; 120: Light-emitting unit; 121: Chip substrate; 122: Chipset; 123: Pad group; 1231: First pad; 1232: Second pad; 1233: Third pad; 124: Electrode group; 1241: First electrode; 1242: Second electrode; 125: Connector group; 1251: First connecting line; 1252: Second connecting line; 126: Planarization layer; 127: Common polarity layer; 128: Third connecting line; 129: Fourth connecting line; 130: Driver chip; 131: Fifth connecting line; 132: Second via. Detailed Implementation

[0075] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0076] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0077] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0078] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0079] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0080] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0081] In the display field, Micro LED large screens face two major performance bottlenecks: high power consumption and poor image quality consistency. High power consumption primarily stems from insufficient chip luminous efficiency (i.e., photoelectric conversion efficiency). Poor image quality consistency arises because Micro LEDs, due to their smaller size, cannot achieve the same binning / mixing capabilities as mini LED chips.

[0082] For example, the luminescent material of red LED chips mainly uses AlInGaP (Aluminum Indium Gallium Phosphide), whose quantum efficiency is significantly lower than that of blue and green LED chips. Especially at the micrometer scale, nonradiative recombination caused by sidewall defects exacerbates the efficiency loss, becoming the main source of power consumption in full-color displays. The power consumption of red LED chips can generally reach more than 50% of the total power consumption of the chip.

[0083] When the size of the light-emitting chip is reduced to the micrometer level, the proportion of the sidewall surface area increases, and surface defects and etching damage lead to a decrease in carrier recombination efficiency, further reducing the light efficiency.

[0084] Furthermore, Micro LED chips are typically 50 (length) × 30 (width) × 10 (height) μm in size, while Mini LED chips are typically 100 (length) × 200 (width) × 100 (height) μm in size. Taking these dimensions as an example, the volume of a mini chip is 133 times that of a micro chip. Therefore, mini chips can be binned individually (based on the chip's wavelength and brightness; for example, a sorting machine can be used to group mini chips with a wavelength deviation of <2nm into a single bin). During the fabrication of mini LED modules, a die bonder can be used to mix and bond mini LED chips from the same bin together (randomly bonding the light-emitting chips onto the module substrate). This can compensate for the mura (spot) problem caused by wavelength deviation in mini chips, resulting in higher image quality consistency in display devices. However, due to the extremely small size of micro chips (more than 100 times smaller than mini chips), it is impossible to separate each chip into individual bins (because micro chips require the removal of the sapphire substrate, they cannot be cut into individual chips like mini chips; they can only be transferred in batches to a temporary substrate before the substrate is removed). Therefore, micro chips cannot currently be used for module manufacturing through effective bin separation and bin mixing, and the mura problem of micro modules is more serious.

[0085] A single light-emitting unit typically includes multiple light-emitting chips that emit different colors. The consistency of brightness and wavelength among these chips directly affects the white balance and chromaticity of the display screen. Achieving uniformity through drive compensation would increase power consumption. While reducing the size of the light-emitting chips (e.g., <20μm) can improve resolution, the increased current density leads to a sharp drop in efficiency (the "efficiency roll-off" phenomenon). Furthermore, the low yield of mass transfer necessitates redundant design, indirectly increasing power consumption. Traditional PWM (Pulse Width Modulation) dimming technology suffers from high switching losses at high refresh rates, and its inefficient current control circuitry generates additional heat.

[0086] While it's impossible to achieve individual binning and mixing of individual microchips, in related technical fields, it's possible to try dividing the microchip into several small regions on a COW (Chip-On-Wafer) substrate and transferring the microchips from different regions onto the module. This approach can improve module consistency, but because the microchips within these small regions also exhibit wavelength deviations, it cannot completely solve the module mura problem.

[0087] To address the mura issue, microchips on the wafer (chip substrate) are divided into different small regions and transferred in batches to reduce mura. However, due to wavelength deviations in the microchips within these small regions, the micro-module still suffers from a small-scale mura problem.

[0088] Therefore, we seek a solution that can achieve both high luminous efficacy and improve the mura problem.

[0089] See Figure 1 , Figure 1 The diagram shows a schematic of the structure of a display device according to an embodiment of this application. The display device in this embodiment can be a mobile terminal such as a mobile phone, tablet computer, or television, or a display screen, monitor, or other display device.

[0090] The display device provided in this application embodiment may include a component substrate 110 and a light-emitting unit 120 disposed on the surface of the component substrate 110.

[0091] The component substrate 110 is an electrode plate used to support multiple light-emitting chips. The number of light-emitting units 120 can be multiple. When there are multiple light-emitting units 120, the multiple light-emitting units 120 can be arranged in an array or in other non-array arrangements. This application does not make specific limitations on this.

[0092] The light-emitting unit 120 in this embodiment may include a chip substrate 121, multiple chip groups 122, a pad group 123, an electrode group 124, and a connection group 125. (See attached document) Figure 2 , attached Figure 2 One of the structural schematic diagrams of the light-emitting unit 120 in one embodiment of this application is shown.

[0093] The chip substrate 121 may be a substrate for carrying a chip assembly 122, a pad assembly 123, an electrode assembly 124, and a connection assembly 125. The chip substrate 121 is provided with a first surface and a second surface opposite to the first surface, and a first via connecting the first surface and the second surface.

[0094] Multiple chip groups 122 are disposed on the first surface, and the multiple chip groups 122 are used to emit light of different colors. At least one chip group 122 includes multiple light-emitting chips connected in series.

[0095] The number of chipsets 122 can be at least two. For example, the number of chipsets 122 can be two. For instance, one chipset 122 can be used to emit cyan light and another chipset 122 can be used to emit red light; or, one chipset 122 can be used to emit blue light and another chipset 122 can be used to emit yellow light; or, one chipset 122 can be used to emit violet light and another chipset 122 can be used to emit green light.

[0096] As another example, the number of chipsets 122 can be three. For example, the three chipsets 122 can be used to emit red light, green light, and blue light respectively, and are not limited thereto.

[0097] In other embodiments, the number of chipsets 122 may also be different; for example, four chipsets 122 may be used to emit white light, red light, green light, and blue light, respectively. This is not a limitation.

[0098] At least one chipset 122 includes multiple light-emitting chips connected in series, and the multiple light-emitting chips connected in series can be packaged in a conventional or flip-chip manner.

[0099] The luminous efficiency of a chip group 122, which includes multiple light-emitting chips, can be lower than that of other chip groups 122. Therefore, by increasing the number of light-emitting chips, the amount of light emitted can be increased, thereby compensating for the efficiency loss caused by the lower luminous efficiency of the chip group 122 compared to other chip groups 122.

[0100] Pad group 123 may include multiple pads. Electrode group 124 may include multiple electrodes. Connection group 125 may include multiple connection lines. The material of at least one of the pads, electrodes, and connection lines may include, but is not limited to, at least one of the following metals: Ti (titanium), Al (aluminum), Mo (molybdenum), Pt (platinum), Pb (lead), Ni (nickel), Cu (copper), Au (gold), Ag (silver), In (indium), Sn (tin), etc.

[0101] The connection group 125 connects the pad group 123 and the electrode group 124 through the first via. Exemplarily, when the driver chip 130 is not disposed on the first surface but on the second surface, the pins of the driver chip 130 can be connected via the trace electrode group 124. The electrode group 124 can be used to drive the drive signal output by the driver chip 130. This drive signal is transmitted to the corresponding chipset 122 via the connection group 125 and the pad group 123, thereby driving the chipset 122 to emit light. When the driver chip 130 is disposed on the first surface, the electrode group 124 can be used to connect an external controller, such as a backlight controller, timing controller, system-on-a-chip, etc. The external controller outputs control signals to the driver chip 130 on the first surface through the electrode group 124, the connection group 125, and the pads, controlling the driver chip 130 to output the corresponding drive signal.

[0102] In this embodiment, on one hand, at least one chipset 122 includes multiple light-emitting chips connected in series. Compared to a chipset 122 containing only one light-emitting chip, a chipset 122 with multiple light-emitting chips can emit several times more light under the same driving current, resulting in higher luminous efficiency under the same driving current. Secondly, the inclusion of multiple light-emitting chips in series in at least one chipset 122 increases the volume of the light-emitting unit 120, thereby enabling separate binning and mixed binning of the light-emitting unit 120. This effectively improves the current problem of low utilization and ineffective binning of the light-emitting unit 120, thus enhancing module consistency. Furthermore, since at least one chipset 122 includes multiple light-emitting chips connected in series, the amount of light emitted can be increased by increasing the number of light-emitting chips, reducing wavelength differences in different regions and effectively improving the mura problem.

[0103] Combination Figure 3 As shown, Figure 3 The second schematic diagram shows the structure of the light-emitting unit 120 in one embodiment of this application. In some embodiments, the light-emitting unit 120 in this embodiment may include a planarization layer 126. The planarization layer 126 is disposed on the first surface, and the surface of the planarization layer 126 away from the chip substrate 121 is flush with the light-emitting surface of the light-emitting chip.

[0104] The planarization layer 126 may be made of materials including but not limited to: organic compounds such as PI (Polyimide), PET (Polyethylene Terephthalate), epoxy resin, acrylic resin or silicone resin, or inorganic materials such as silicon oxide and silicon nitride.

[0105] In this embodiment, on one hand, the planarization layer 126 is disposed on the first surface. The surface of the planarization layer 126 away from the chip substrate 121 is flush with the light-emitting surface of the light-emitting chip, making the light-emitting surfaces of each light-emitting chip coplanar, the emission starting points of each light-emitting chip as consistent as possible, and the optical path difference of the light beams emitted by each light-emitting chip approaching zero. Different colors of light can radiate into space from the same starting point and mix synchronously during propagation, improving the light mixing effect of the display device. On the other hand, the planarization layer 126 is disposed on the first surface. The surface of the planarization layer 126 away from the chip substrate 121 is flush with the light-emitting surface of the light-emitting chip, making the light-emitting surfaces of each light-emitting chip coplanar, the light radiation central axis height of each light-emitting chip consistent, and the radiation ranges of different colors of light almost overlapping. This allows the light beams emitted by the light-emitting unit 120 to be received almost simultaneously, reducing the probability of light uniformity loss due to radiation area misalignment and improving the display uniformity of the display device.

[0106] In some embodiments, the pad group 123 includes a first pad 1231 and a plurality of second pads 1232. The chipset 122 includes a first end and a second end, the first end of each chipset 122 is connected to the first pad 1231, and the second ends of the plurality of chipsets 122 are respectively connected to the plurality of second pads 1232.

[0107] The second end of the chipset 122 is located on the side of the chipset 122 closest to the chip substrate 121, and the first end of the chipset 122 is located on the side of the chipset 122 furthest from the chip substrate 121. When the chipset 122 includes multiple light-emitting chips, the multiple light-emitting chips are stacked in the thickness direction of the light-emitting unit 120.

[0108] The first and second terminals of the chipset 122 have different polarities. For example, if multiple light-emitting chips are driven using a common cathode, the first terminal of the chipset 122 can be a cathode, and the second terminal of the chipset 122 can be an anode. Alternatively, if multiple light-emitting chips are driven using a common anode, the first terminal of the chipset 122 can be an anode, and the second terminal of the chipset 122 can be a cathode.

[0109] It is understood that when the chipset 122 includes a single light-emitting chip, the first and second terminals of the chipset 122 can be understood as the negative and positive terminals of that light-emitting chip. When the chipset 122 includes multiple light-emitting chips, the first and second terminals of the chipset 122 can be understood as the negative terminal of one light-emitting chip farther from the first surface and the positive terminal of one light-emitting chip closer to the first surface.

[0110] The first pad 1231 and the second pad 1232 can be the negative pad and the positive pad, respectively. When the first pad 1231 is the negative pad and the second pad 1232 is the positive pad, the first end can be the cathode and the second end can be the anode. When the first pad 1231 is the positive pad and the second pad 1232 is the negative pad, the first end can be the anode and the second end can be the cathode.

[0111] The light-emitting chip is configured with a positive electrode and a negative electrode. When the chip group 122 includes multiple light-emitting chips, the multiple light-emitting chips are stacked in the thickness direction of the light-emitting unit 120, and the positive electrode of one light-emitting chip is connected to the negative electrode of the adjacent light-emitting chip. In the case of common cathode driving, the positive electrode of the light-emitting chip near the first surface is connected to the corresponding second pad 1232, and the negative electrode of the light-emitting chip near the first surface is connected to the positive electrode of the adjacent light-emitting chip. In the case of common anode driving, the negative electrode of the light-emitting chip near the first surface is connected to the corresponding second pad 1232, and the positive electrode of the light-emitting chip near the first surface is connected to the negative electrode of the adjacent light-emitting chip.

[0112] The number of second pads 1232 can be the same as the number of chipset 122. Therefore, the second pads 1232 can be connected one-to-one with the second end of chipset 122.

[0113] For example, taking a chipset 122 with three chipsets as an example, see Appendix Figures 4-7 , attached Figure 4 One of the top views of the first surface of a chip substrate 121 according to an embodiment of this application is shown, illustrating a pad group 123 comprising a first pad 1231 and three second pads 1232. (See attached image.) Figure 5 A top view of the second surface of a chip substrate 121 according to an embodiment of this application is shown, wherein the electrode group 124 includes four electrodes. (See attached image.) Figure 6 One of the cross-sectional views of the light-emitting unit 120 in one embodiment of this application is shown, illustrating that four connecting lines are connected to the pad group 123 and the electrode group 124 respectively through four second vias 132. (See attached image.) Figure 7 A cross-sectional view of the light-emitting unit 120 is shown when all three chipsets 122 include two light-emitting chips, and multiple light-emitting chips in the same chipset 122 are stacked in the thickness direction of the light-emitting unit 120.

[0114] In this embodiment, the second end of the chip group 122 is located on the side of the chip group 122 close to the chip substrate 121, and the first end of the chip group 122 is located on the side of the chip group 122 away from the chip substrate 121. Therefore, the chip group 122 is packaged in a positive manner. After being packaged into a light-emitting unit 120, conventional die bonding and other module manufacturing processes can be reused without adding additional processes or improving existing equipment, thus avoiding a significant increase in manufacturing costs.

[0115] In some embodiments, when the chipset 122 includes multiple light-emitting chips, the multiple light-emitting chips are stacked in the thickness direction of the light-emitting unit 120, and the electrodes of the light-emitting chips can be transparent electrodes, thereby avoiding the use of other electrodes and causing light shading, and ensuring the light shading rate of the light-emitting unit 120.

[0116] In some embodiments, the light-emitting unit 120 in this embodiment may include a common polarity layer 127 and a second via 132. The common polarity layer 127 is disposed on the side of the planarization layer 126 and the chip assembly 122 opposite to the chip substrate 121. The second via 132 is used to connect the first pad 1231 and the common polarity layer 127.

[0117] For example, taking a chipset 122 with three chips, each including two light-emitting chips, as shown in the appendix. Figure 8 ~Appendix Figure 9 , attached Figure 8 This is the third schematic diagram of the structure of the light-emitting unit 120. (Attached) Figure 9 A cross-sectional view is shown of the case where the light-emitting unit 120 includes a common polarity layer 127.

[0118] When the light-emitting chip is driven by a common cathode, the common polarity layer 127 can be a common cathode layer. When the light-emitting chip is driven by a common anode, the common polarity layer 127 can be a common anode layer.

[0119] In this embodiment, by providing a common polarity layer 127 on the side of the planarization layer 126 and the chipset 122 facing away from the chip substrate 121, and providing a second via 132 for connecting the first pad 1231 and the common polarity layer 127, the common polarity connection of the upright light-emitting chip can be realized, thereby improving the electrical stability of the light-emitting unit 120.

[0120] In some embodiments, the pad group 123 includes a plurality of first pads 1231 and a plurality of second pads 1232.

[0121] The chipset 122 includes a first end and a second end. Both the first end and the second end of the chipset 122 are located on the side of the chipset 122 close to the chip substrate 121. The first ends of multiple chipsets 122 are respectively connected to the first pad 1231, and the second ends of each chipset 122 are respectively connected to the second pad 1232.

[0122] The light-emitting unit 120 includes a fourth connecting line 129 and a plurality of third connecting lines 128. The third connecting lines 128 are used to connect to the first end of each chip group 122 respectively. The fourth connecting line 129 is used to connect the first pad 1231 and the second pad 1232 corresponding to the plurality of light-emitting chips in series when the chip group 122 includes a plurality of light-emitting chips.

[0123] The number of first pads 1231 and second pads 1232 is the same as the number of light-emitting chips. For example, taking a chipset 122 with three chips, each including two light-emitting chips, as shown in the appendix... Figure 10 , attached Figure 10 A second top view of the first surface of the chip substrate 121 is shown. There are six first pads 1231 and six second pads 1232. The first ends of the three chip groups 122 are connected by two third connecting lines 128. A fourth connecting line 129 is used to connect the positive and negative electrodes of the light-emitting chips in the same chip group 122.

[0124] In this embodiment, both the first and second ends of the chipset 122 are located on the side of the chipset 122 closest to the chip substrate 121, forming a flip-chip structure. This reduces the obstruction of light by the electrodes and improves the light extraction efficiency of the light-emitting unit 120. Furthermore, since both the first and second ends of the chipset 122 are in contact with the chip substrate 121, heat dissipation can be achieved through the chip substrate 121, optimizing the heat dissipation path and reducing thermal resistance.

[0125] In some embodiments, the number of first vias is multiple; the electrode group 124 includes a first electrode 1241 and multiple second electrodes 1242; the connection group 125 includes a first connection line 1251 and multiple second connection lines 1252. The first connection line 1251 is connected to the first pad 1231 and is connected to the first electrode 1241 through the first via. The multiple second connection lines 1252 are respectively connected to multiple second pads 1232. The first connection line 1251 and the multiple second connection lines 1252 are used to transmit the driving signal connected to the first electrode 1241 and the second electrode 1242, so that the corresponding light-emitting chip emits light under the drive of the driving signal.

[0126] For example, when the light-emitting chips are mounted in the correct orientation, taking a chip group 122 of 3 units, each chip group 122 including 2 light-emitting chips as an example, and continuing to refer to the appendix. Figure 7 In the case where the light-emitting chips are flip-chip, taking a chipset 122 with 3 chips and each chipset 122 including 2 light-emitting chips as an example, please refer to the appendix. Figure 11 , attached Figure 11 This is a fourth cross-sectional view of the light-emitting unit 120 in the embodiments of this application. The first connecting line 1251 can be connected to one of the first pads 1231 and connected to the first electrode 1241 through the first via.

[0127] In this embodiment, the connection group 125 includes a first connection line 1251 and a plurality of second connection lines 1252. The first connection line 1251 is connected to the first pad 1231 and to the first electrode 1241 via a first via. The plurality of second connection lines 1252 are respectively connected to the plurality of second pads 1232. The first connection line 1251 and the plurality of second connection lines 1252 are used to transmit the driving signals received by the first electrode 1241 and the second electrode 1242, so that the corresponding light-emitting chip emits light under the drive of the driving signal. Thus, only the light-emitting chip is disposed on the first surface of the chip substrate 121, and the light-emitting chip receives the driving signal from the second surface. This avoids the light-emitting area occupied by the driving chip 130 on the first surface, resulting in a larger aperture ratio of the light-emitting unit 120 and improved light-emitting efficiency.

[0128] In some embodiments, the pad group 123 includes a plurality of third pads 1233; the light-emitting unit 120 includes a driver chip 130 and a plurality of fifth connection lines 131. The driver chip 130 is disposed on a first surface and is connected to the first pad 1231 and the plurality of third pads 1233; the fifth connection lines 131 are used to connect the third pads 1233 and the second pads 1232; wherein, the driver chip 130 is used to output a driving signal to the light-emitting chip through the third pads 1233, the fifth connection lines 131 and the second pads 1232, so that the light-emitting chip emits light under the drive of the driving signal.

[0129] The connection group 125 is used to receive control signals. The control signals are transmitted to the driver chip 130 via part of the third pad 1233 to control the driver chip 130 to output drive signals.

[0130] For example, see Appendix Figures 12-13 Among them, attached Figure 12 This is a third top view of the first surface of the chip substrate 121. Figure 13 The fourth schematic diagram shows the structure of the light-emitting unit 120 when the light-emitting unit 120 includes the driving chip 130.

[0131] It is understandable that, when the LED is driven by a common cathode, the LED can share the cathode pad with the driver chip 130. (See appendix.) Figure 14 and 15 Under the condition of common anode driving, attached Figure 14 Taking a configuration of three chipsets 122 as an example, the circuit diagram of the driver chip 130 and the three chipsets 122 is shown; (attached) Figure 15 The circuit diagram of the driver chip 130 and the three chipsets 122 is shown when there are three chipsets 122, each of which includes two light-emitting chips.

[0132] When the light-emitting unit 120 includes a driver chip 130, the light-emitting chip can be upright or flip-chip. For example, see attached... Figures 16-17 A cross-sectional view of the light-emitting unit 120 is shown with the light-emitting chip mounted upright. Another example is shown below. Figure 18 A cross-sectional view of the light-emitting unit 120 is shown when the light-emitting chip is flip-chip.

[0133] It is understood that the above schematic diagram is only used to illustrate the connection relationship between the driver chip 130 and the light-emitting chip. The number of light-emitting chips, the number of chipset 122, the setting of pads, etc. can be other than those shown above.

[0134] In this embodiment, the driver chip 130 is disposed on the first surface. The driver chip 130 is connected to the first pad 1231 and a plurality of third pads 1233. The third pads 1233 and second pads 1232 are connected via a plurality of fifth connection lines 131. This allows the driver chip 130 to output a driving signal to the light-emitting chip via the third pads 1233, the fifth connection lines 131, and the second pads 1232, causing the light-emitting chip to emit light under the drive of the driving signal. A control signal is received through the connection group 125 and transmitted to the driver chip 130 via a portion of the third pads 1233, used to control the driver chip 130 to output the driving signal. Therefore, by disposing the driver chip 130 on the first surface, the increased thickness of the light-emitting unit 120 caused by disposing the driver chip 130 on the second surface can be avoided, thus reducing the thickness of the light-emitting unit 120.

[0135] In some embodiments, the number of control signals can be multiple. The number of first vias can be multiple. The multiple third pads 1233 may include power supply pads, clock pads, data pads, and multiple drive pads.

[0136] The driver chip 130 is configured with multiple pins, which are respectively connected to the first pad 1231, the power supply pad, the clock pad, the data pad, and multiple driver pads.

[0137] The electrode group 124 includes a first electrode 1241 and multiple signal transmission electrodes.

[0138] The connection group 125 includes a first connection line 1251 and multiple sixth connection lines. The first connection line 1251 is connected to the first pad 1231 and to the first electrode 1241 via a first via. The multiple sixth connection lines are respectively connected to the power supply pad, the clock pad, and the data pad, and are respectively connected to multiple signal transmission electrodes via multiple first vias.

[0139] Among them, multiple sixth connection lines are used to transmit multiple control signals respectively.

[0140] Multiple control signals can be power supply signals, data signals, and clock signals.

[0141] In this embodiment, a power supply pad, a clock pad, a data pad, and multiple driver pads are provided on the first surface. Each pad is connected to multiple pins of the driver chip 130. The driver chip 130 can receive multiple control signals through each pad, multiple sixth connection lines, and multiple signal transmission electrodes provided on the second surface, avoiding the need for complex external driving circuits, such as thin film transistors (TFTs) or complementary metal oxide semiconductors (CMOS), thus simplifying the driving architecture of the light-emitting unit 120.

[0142] In some embodiments, a chipset 122 includes a plurality of light-emitting chips for emitting red light.

[0143] In this embodiment, due to the limitations of the light-emitting material for emitting red light (red light uses the AGaInP material system, while blue and green light use the InGaN material system, and the former has a carrier recombination efficiency that is an order of magnitude lower than the latter, mainly due to the inherent properties of the material itself), the luminous efficiency of the red light-emitting chip is relatively low. By increasing the number of red light-emitting chips, the amount of red light emitted can be increased, thereby improving the luminous efficiency of the red chip group 122.

[0144] In some embodiments, each chipset 122 includes a plurality of light-emitting chips.

[0145] In this embodiment, each chip group 122 includes multiple light-emitting chips. Since the number of light-emitting chips in each chip group 122 has increased, the amount of light emitted by each color has also increased, thereby improving the light emission efficiency of each chip group 122.

[0146] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0147] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A display device, characterized in that, include: Component substrate; A light-emitting unit disposed on the surface of the component substrate, the light-emitting unit comprising: A chip substrate is provided with a first surface, a second surface opposite to the first surface, and a first via connecting the first surface and the second surface; Multiple chip groups are disposed on the first surface, and the multiple chip groups are used to emit light of different colors, and at least one of the chip groups includes multiple light-emitting chips connected in series; A pad assembly is disposed on the first surface and connected to the light-emitting chip; An electrode assembly is disposed on the second surface; A connection group is used to connect to the pad group and the electrode group via the first via.

2. The display device according to claim 1, characterized in that, The light-emitting unit includes: A planarization layer is disposed on the first surface, wherein the surface of the planarization layer away from the chip substrate is flush with the light-emitting surface of the light-emitting chip.

3. The display device according to claim 2, characterized in that, The pad group includes a first pad and a plurality of second pads; The chipset includes a first end and a second end. The first end of each chipset is connected to the first pad, and the second ends of the multiple chipsets are respectively connected to the multiple second pads. Wherein, the second end of the chip group is located on the side of the chip group close to the chip substrate, and the first end of the chip group is located on the side of the chip group away from the chip substrate; In the case where the chipset includes multiple light-emitting chips, the multiple light-emitting chips are stacked in the thickness direction of the light-emitting unit.

4. The display device according to claim 3, characterized in that, The light-emitting unit includes: A common polarity layer is disposed on the planarization layer, on the side of the chipset facing away from the chip substrate; The second via is used to connect the first pad and the common polarity layer.

5. The display device according to claim 2, characterized in that, The pad group includes a plurality of first pads and a plurality of second pads; The chipset includes a first end and a second end, both of which are located on the side of the chipset close to the chip substrate. The first ends of multiple chipsets are respectively connected to the first pad, and the second ends of each chipset are respectively connected to the second pad. The light-emitting unit includes: Multiple third connection lines are used to connect to the first end of each of the chipsets respectively; The fourth connection line is used to connect the first and second pads corresponding to the multiple light-emitting chips in series when the chipset includes multiple light-emitting chips.

6. The display device according to claim 3 or 5, characterized in that, The number of the first vias is multiple; The electrode assembly includes a first electrode and multiple second electrodes; The connection group includes a first connection line and a plurality of second connection lines. The first connection line is connected to the first pad and to the first electrode through the first via. The plurality of second connection lines are respectively connected to a plurality of second pads. The first connection line and the plurality of second connection lines are used to transmit the driving signal connected to the first electrode and the second electrode, so that the corresponding light-emitting chip emits light under the drive of the driving signal.

7. The display device according to claim 3 or 5, characterized in that, The pad group includes multiple third pads; the light-emitting unit includes: A driver chip is disposed on the first surface, and the driver chip is connected to the first pad and the plurality of third pads; Multiple fifth connection lines are provided for connecting the third pad and the second pad; The driver chip is used to output a driving signal to the light-emitting chip through the third pad, the fifth connection line and the second pad, so that the light-emitting chip emits light under the drive of the driving signal; The connection group is used to receive control signals, which are transmitted to the driver chip via a portion of the third pad, and are used to control the driver chip to output the drive signal.

8. The display device according to claim 7, characterized in that, The number of control signals is multiple; the number of the first vias is multiple; The plurality of the third pads include power supply pads, clock pads, data pads and a plurality of drive pads; The driver chip is configured with multiple pins, which are respectively connected to the first pad, the power supply pad, the clock pad, the data pad, and multiple driver pads. The electrode group includes a first electrode and multiple signal transmission electrodes; The connection group includes a first connection line and multiple sixth connection lines. The first connection line is connected to the first pad and to the first electrode via the first via. The multiple sixth connection lines are respectively connected to the power supply pad, the clock pad, and the data pad, and are respectively connected to the multiple signal transmission electrodes via the multiple first vias. Among them, multiple sixth connection lines are used to transmit multiple control signals respectively.

9. The display device according to claim 1, characterized in that, The chipset includes a plurality of light-emitting chips, which are used to emit red light.

10. The display device according to claim 1, characterized in that, Each chipset includes multiple light-emitting chips.

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