Isolation voltage monitoring circuit based on mos switching and internal reference calibration

Abstract

The utility model is suitable for electronic measurement technical field provides the isolated voltage monitoring circuit based on MOS tube switching and system internal reference source calibration, include: isolated amplifier, difference conversion single -end operational amplifier, ADC and MCU, still include: MOS tube control module and 5V reference source module, MOS tube control module includes first MOS tube Q1, second MOS tube Q2 and third MOS tube Q3, the utility model passes through the MCU control conduction / turn -off of different MOS tube, realizes two kinds of state of zero drift calibration and gain calibration, and the calibration coefficient is calculated based on linear relationship, and the zero drift, gain and peripheral component error are offset, ensure that long -term work, temperature change or after replacement still maintain stable sampling accuracy, be applicable to industrial control, instrument and apparatus, power monitoring and other fields.

Description

Technical Field

[0001] This utility model relates to the field of electronic measurement technology, specifically to an isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration. Background Technology

[0002] In industrial control, instrumentation, and power monitoring, ADC (Analog-to-Digital Converter) voltage monitoring circuits are commonly used. These circuits employ isolation amplifiers to achieve electrical isolation between the input analog signal and the system circuitry, preventing common-mode interference from affecting sampling accuracy. A typical existing solution involves: after the external analog voltage input is isolated by an isolation amplifier, an operational amplifier converts the differential signal into a single-ended signal, which is then input to the ADC for sampling.

[0003] However, existing technologies have the following drawbacks:

[0004] The isolation amplifier has zero drift voltage. During long-term operation or when the ambient temperature changes, the accumulation of zero drift will cause the reference zero point of the ADC sampling to shift, introducing sampling error.

[0005] Different models of isolation amplifiers have inherent differences in gain. Existing circuits lack an adaptation and calibration mechanism. Replacing with alternative components requires redesigning the peripheral circuit, resulting in poor compatibility.

[0006] The gain error of the isolation amplifier and the accuracy error of the external sampling resistor are superimposed, which leads to a further reduction in the sampling accuracy of the ADC;

[0007] The existing circuit lacks a power-on self-test calibration function, and cannot correct zero drift, gain, and errors caused by the superposition of external components in real time.

[0008] Therefore, in view of the above situation, there is an urgent need to provide an isolated voltage monitoring circuit based on MOSFET switching and internal system reference source calibration to overcome the shortcomings in current practical applications. Utility Model Content

[0009] The purpose of this invention is to provide an isolated voltage monitoring circuit based on MOSFET switching and internal system reference source calibration, thereby solving the problems mentioned in the background art.

[0010] This invention is implemented as follows: an isolated voltage monitoring circuit based on MOSFET switching and internal system reference source calibration, comprising:

[0011] Isolation amplifiers, differential-to-single-ended op-amps, ADCs, and MCUs;

[0012] Also includes:

[0013] MOSFET control module and 5V reference source module;

[0014] The MOS transistor control module includes:

[0015] The first MOSFET Q1 is an N-channel MOSFET. Its source is connected to analog ground, its drain is connected to the output terminal V+ of the isolation amplifier, and its gate is connected to IO3 of the MCU through the current limiting resistor R9.

[0016] The second MOSFET Q2 is an N-channel MOSFET. Its source is connected to analog ground, its drain is connected to the output terminal V- of the isolation amplifier, and its gate is connected to IO2 of the MCU through the current limiting resistor R11.

[0017] The third MOSFET, Q3, is a P-channel MOSFET. Its source is connected to a 5V reference source, its drain is connected to V+, and its gate is connected to the MCU's IO1 through a pull-up resistor R7.

[0018] The input terminals VI+ and VI- of the differential-to-single-ended op-amp are connected to V+ and V- respectively, and the output terminal is connected to the ADC.

[0019] As a further aspect of this invention: the 5V reference source is a voltage source with 1% accuracy.

[0020] As a further embodiment of this utility model: the isolation amplifier is a TLP7820, and the differential-to-single-ended operational amplifier is an OPA333.

[0021] As a further embodiment of this invention: during the zero-drift calibration phase, the MCU controls IO2 and IO3 to output high levels, turning on the first MOSFET Q1 and the second MOSFET Q2, and shorting V+ and V- to analog ground; during the gain calibration phase, the MCU controls IO1 to output low levels and IO2 to output high levels, turning on the third MOSFET Q3 and the second MOSFET Q2, connecting V+ to a 5V reference source and V- to analog ground.

[0022] As a further aspect of this utility model: during the normal sampling phase, the MCU controls IO1 to be high level and IO2 and IO3 to be low level, thereby turning off the first MOS transistor Q1, the second MOS transistor Q2, and the third MOS transistor Q3, and allowing the differential signal output from the isolation amplifier to be normally input into the operational amplifier.

[0023] As a further aspect of this utility model: the MCU calculates the gain coefficient K = (Y2-Y1) / 5 and the zero-drift coefficient B = Y1 based on the zero-drift calibration sampling value Y1 and the gain calibration sampling value Y2, and calculates the actual input voltage in reverse according to the formula X = (YB) / K during normal sampling.

[0024] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0025] Precise calibration of zero drift and gain error: This invention directly cancels the zero drift voltage of the isolation amplifier by acquiring Y1 (B value) in the zero drift calibration state; and calculates the gain coefficient K by acquiring Y2 in the gain calibration state to adapt to the gain differences of different isolation amplifiers, thus solving the problems of "zero drift accumulation and poor compatibility of substitute materials" in existing solutions. For example, if the isolation amplifier's zero drift causes Y1 = 0.1V, after calibration B = 0.1V, and during normal sampling X = (Y - 0.1) / K, the influence of zero drift can be completely eliminated.

[0026] Error superposition cancellation and accuracy assurance: The linear coefficient calibration method of this utility model can simultaneously cancel the superposition effect of isolation amplifier gain error and external resistor (R1, R3, R14) accuracy error. For example, if the accuracy deviation of R3 causes the actual gain to be 2% lower than the theoretical value, the K value will be automatically corrected to the actual gain after calibration, ensuring that the linear relationship between the ADC sampling value and the input voltage meets the design requirements. There is no need to replace high-precision components, thus reducing costs.

[0027] Power-on self-test and automated calibration: This utility model automatically completes calibration when the system is powered on, without the need for manual adjustment of potentiometers or redesign of circuits, making it suitable for industrial mass production scenarios; after replacing the isolation amplifier with a replacement component, only a power-on calibration is required for adaptation, resulting in strong compatibility and reduced maintenance costs.

[0028] Simplified circuitry and improved reliability: The OPA333 is reused as the conversion channel between calibration and sampling signals, eliminating the need for additional operational amplifiers; the MOSFET control logic is simple (only 3 I / O ports), the number of components is small, the circuit failure rate is low, and it is suitable for long-term stable operation. Attached Figure Description

[0029] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0030] Figure 1 This is a flowchart illustrating the process of this utility model.

[0031] Figure 2 This is a system principle block diagram of this utility model.

[0032] Figure 3 This is the system circuit schematic diagram of this utility model. Detailed Implementation

[0033] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0034] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0035] The specific implementation of this utility model will be described in detail below with reference to specific embodiments.

[0036] Please see Figures 1-3 The isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration provided in this embodiment includes an isolation amplifier U1 and a differential-to-single-ended operational amplifier.

[0037] U2, ADC, and MCU; also includes:

[0038] MOSFET control module and 5V reference source module;

[0039] The MOS transistor control module includes:

[0040] The first MOSFET Q1 is an N-channel MOSFET. Its source is connected to analog ground (CHGND), its drain is connected to the output terminal V+ of the isolation amplifier, and its gate is connected to IO3 of the MCU through the current limiting resistor R9.

[0041] The second MOSFET Q2 is an N-channel MOSFET. Its source is connected to CHGND, its drain is connected to the output terminal V- of the isolation amplifier, and its gate is connected to IO2 of the MCU through the current limiting resistor R11.

[0042] The third MOSFET, Q3, is a P-channel MOSFET. Its source is connected to a 5V reference source (VDD5V), its drain is connected to V+, and its gate is connected to the MCU's IO1 through a pull-up resistor R7.

[0043] The input terminals VI+ and VI- of the differential-to-single-ended op-amp are connected to V+ and V- respectively, and the output terminal is connected to the ADC.

[0044] Furthermore, the 5V reference source is a voltage source with 1% accuracy;

[0045] The isolation amplifier is a TLP7820, and the differential-to-single-ended operational amplifier is an OPA333.

[0046] During the zero-drift calibration phase, the MCU controls IO2 and IO3 to output a high level, causing the first MOSFET to...

[0047] Q1 and the second MOSFET Q2 are turned on, and V+ and V- are shorted to analog ground; during the gain calibration stage, IO1 is controlled to output a low level and IO2 to output a high level, so that the third MOSFET Q3 and the second MOSFET Q2 are turned on, V+ is connected to a 5V reference source, and V- is connected to analog ground;

[0048] During the normal sampling phase, the MCU controls IO1 to be high and IO2 and IO3 to be low, thereby turning off the first MOSFET Q1, the second MOSFET Q2, and the third MOSFET Q3, and allowing the differential signal output from the isolation amplifier to be normally input into the operational amplifier.

[0049] The MCU calculates the gain coefficient K = (Y2 - Y1) / 5 and the zero-drift coefficient B = Y1 based on the zero-drift calibration sample value Y1 and the gain calibration sample value Y2, and calculates the actual input voltage according to the formula X = (YB) / K during normal sampling.

[0050] In the embodiments of this utility model, based on the existing ADC voltage monitoring circuit, a MOSFET calibration control module (Q1, Q2, Q3) and a 1% accuracy 5V reference source (VDD5V) are added. The MCU controls the MOSFET to turn on / off, realizing two calibration states (zero drift calibration and gain calibration). Then, based on the linear relationship Y = KX + B (X is the input voltage, Y is the OPA333 output voltage corresponding to ADC sampling, K is the gain coefficient, and B is the zero drift coefficient), the calibration coefficient is calculated, and finally the ADC sampling calibration is completed.

[0051] In this embodiment, the key component parameters are based on the following:

[0052] MOSFET selection criteria: Q1 and Q2 are selected from NCE3416 (N-channel), with an on-resistance ≤50mΩ, ensuring a voltage drop ≤0.01V when V+ and V- are grounded, so as not to affect the zero drift calibration accuracy; Q3 is selected from JMTP4435A (P-channel), with an on-resistance ≤80mΩ, ensuring a voltage drop ≤0.04V when transmitting from a 5V reference, meeting the 1% accuracy requirement.

[0053] 5V reference accuracy requirement: VDD5V uses a 1% accuracy power supply. Since the input X2 for gain calibration is 5V, if the reference error is ±1%, then the X2 error is ±0.05V. The final calibrated sampling error is ≤±0.5%, which meets the requirements of industrial-grade monitoring (usually the allowable error is ≤±1%).

[0054] Selection criteria for OPA333: The input offset voltage of OPA333 is ≤25μV, which is much smaller than the typical error of zero drift calibration (about 0.1V) and will not introduce additional calibration error; the bandwidth is ≥1MHz, which meets the conversion speed requirements of analog signals (0-24V).

[0055] The derivation of the calibration formula is as follows:

[0056] Given that the input voltage X - OPA333 output Y satisfy a linear relationship: Y = KX + B, where:

[0057] K: Gain coefficient (unknown) determined by the isolation amplifier, OPA333, and external resistors;

[0058] B: Output coefficient corresponding to zero drift voltage (unknown, i.e., the Y value when X=0).

[0059] Through two calibration samplings:

[0060] Zero drift calibration: X1=0V→Y1=K×0+B→B=Y1;

[0061] Gain calibration: X2=5V→Y2=K×5+B→K=(Y2-B) / 5=(Y2-Y1) / 5.

[0062] During normal sampling, the ADC collects the Y value and calculates the actual input voltage: X = (YB) / K = (Y-Y1) × 5 / (Y2-Y1).

[0063] The application scenarios are expanded as follows:

[0064] This circuit can be directly applied to the following scenarios:

[0065] In the field of industrial control: monitoring of analog quantities (such as current and voltage) of frequency converters and PLCs (programmable logic controllers);

[0066] Instrumentation field: Isolation sampling modules for multimeters and oscilloscopes;

[0067] In the field of power monitoring: DC voltage sampling for photovoltaic inverters and energy storage systems.

[0068] When adapting to different systems, only the 5V reference source voltage needs to be adjusted (e.g., a 3.3V reference can be used for a 3.3V system) or the calibration resistor parameters need to be adjusted, without changing the core circuit structure.

[0069] In one embodiment of this utility model, please refer to Figures 1-3 The isolation amplifier isolates the external analog input from the system circuit and outputs differential signals (VOUT+, VOUT-) to suppress common-mode interference. It includes U1TLP7820, R1, R3, R4, and R8.

[0070] The MOSFET control module is controlled by the MCU IO ports (IO1, IO2, IO3) to achieve switching between two states: "zero drift calibration" and "gain calibration". It includes Q1 (NCE3416), Q2 (NCE3416), Q3 (JMTP4435A), R7, R9, R10, R11, and R12.

[0071] The differential-to-single-ended op-amp converts the differential signal output from the isolation amplifier into a single-ended signal (ADC_VIN) referenced to the system GND. It includes U2OPA333, C1, C2, and C4.

[0072] The 5V reference source module provides a 5V calibration reference with 1% accuracy for gain calibration, and its core is VDD5V;

[0073] The MCU control and calculation module controls the MOSFET to turn on / off, acquires ADC data, calculates calibration coefficients (K, B), and calculates the actual input voltage. It includes the MCU and ADC.

[0074] In this embodiment, the core components and their connections are shown in Table 1:

[0075] Table 1 Core Components and Connection Relationships

[0076]

[0077]

[0078] In one embodiment of this utility model, the following alternative is also included:

[0079] Alternative Solution 1: Replace the MOSFET with a relay

[0080] Solution Description: Replace Q1, Q2, and Q3 with two single-pole double-throw (SPDT) relays. Relay 1 controls V+ to connect to GND or a 5V reference, and relay 2 controls V- to connect to GND. The MCU controls their switching through the relay drive circuit to achieve zero drift and gain calibration.

[0081] Disadvantages: Relays are much larger than MOSFETs (such as 0603 packaged MOSFETs), making them unsuitable for miniaturized circuits; relays suffer from mechanical contact wear and have a short lifespan (approximately 100,000 cycles), failing to meet the requirements for long-term, frequent power-on calibration; the drive circuit requires an additional power supply (such as 12V), increasing system power consumption.

[0082] Alternative Solution 2: Use a multi-channel analog switch chip

[0083] Solution Description: Replace the MOSFET with a multi-channel analog switch (such as ADG715), and control the channel selection of the analog switch through the MCU to achieve the switching between "V+ connected to GND / 5V" and "V- connected to GND".

[0084] Disadvantages: Analog switch chips are integrated devices, and their cost is higher than that of discrete MOSFETs (about 3 times); analog switches have on-resistance (about 50Ω), which introduces additional voltage drop and affects calibration accuracy; additional chip power supply (such as 3.3V) is required, which increases circuit complexity.

[0085] Alternative Option 3: Manual Calibration (Polypotentiometer Adjustment)

[0086] Solution Description: Connect an adjustable potentiometer in series at the input of the OPA333. During zero drift calibration, manually adjust the potentiometer to make Y1 = 0V. During gain calibration, manually adjust Y2 to make Y2 = the preset value (such as the theoretical output corresponding to a 5V input).

[0087] Disadvantages: It requires manual operation, cannot be automated, and is not suitable for mass production; potentiometers are subject to temperature drift and mechanical drift, and calibration accuracy is prone to failure during long-term use; manual recalibration is required after replacing the isolation amplifier, resulting in high maintenance costs.

[0088] This invention adopts a solution of "discrete MOS transistor + 1% accuracy 5V reference + linear coefficient calculation", which is superior to the above alternatives in terms of cost, size, reliability and automation. It is the optimal choice for realizing "self-test calibration ADC voltage monitoring".

[0089] In summary, the working principle of this utility model is as follows:

[0090] Zero-drift calibration phase (X1 = 0V):

[0091] When the MCU controls IO2 and IO3 to output a high level, Q1 (NCE3416, N-channel MOSFET) and Q2 (NCE3416, N-channel MOSFET) are turned on, shorting the differential signal terminals (V+, V-) of the isolation amplifier output to the system GND. At this time, the equivalent voltage of the input isolation amplifier is 0V, and the output voltage Y1 of OPA333 is the "output value corresponding to the zero drift voltage" (i.e., the B value).

[0092] Gain calibration phase (X2 = 5V):

[0093] The MCU controls IO1 to output a low level and IO2 to output a high level. Q3 (JMTP4435A, P-channel MOSFET) is turned on (VDD5V is a 5V reference with 1% accuracy), and Q2 is turned on. V+ is connected to the 5V reference and V- is connected to GND. At this time, the voltage input to the isolation amplifier is 5V, and the output voltage Y2 of OPA333 is the "output value corresponding to the 5V input" (i.e., 5K+B).

[0094] Coefficient calculation: Based on the linear relationship Y=KX+B, substitute X1=0, Y1 and X2=5, Y2, and we get K=(Y2-Y1) / 5 (gain coefficient) and B=Y1 (zero drift coefficient);

[0095] During normal sampling, the MCU acquires the Y value through the ADC, calculates the actual input voltage X = (YB) / K, and completes the calibration.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. An isolated voltage monitoring circuit based on MOSFET switching and internal system reference source calibration, comprising an isolation amplifier, a differential-to-single-ended operational amplifier, an ADC, and an MCU, characterized in that, Also includes: MOSFET control module and 5V reference source module; The MOS transistor control module includes: The first MOSFET Q1 is an N-channel MOSFET. Its source is connected to analog ground, its drain is connected to the output terminal V+ of the isolation amplifier, and its gate is connected to IO3 of the MCU through the current limiting resistor R9. The second MOSFET Q2 is an N-channel MOSFET. Its source is connected to analog ground, its drain is connected to the output terminal V- of the isolation amplifier, and its gate is connected to IO2 of the MCU through the current limiting resistor R11. The third MOSFET, Q3, is a P-channel MOSFET. Its source is connected to a 5V reference source, its drain is connected to V+, and its gate is connected to the MCU's IO1 through a pull-up resistor R7. The input terminals VI+ and VI- of the differential-to-single-ended op-amp are connected to V+ and V- respectively, and the output terminal is connected to the ADC.

2. The isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration according to claim 1, characterized in that, The 5V reference source is a voltage source with 1% accuracy.

3. The isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration according to claim 1, characterized in that, The isolation amplifier is a TLP7820, and the differential-to-single-ended operational amplifier is an OPA333.

4. The isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration according to claim 1, characterized in that, During the zero-drift calibration phase, the MCU controls IO2 and IO3 to output high levels, turning on the first MOSFET Q1 and the second MOSFET Q2, and shorting V+ and V- to analog ground. During the gain calibration phase, the MCU controls IO1 to output low levels and IO2 to output high levels, turning on the third MOSFET Q3 and the second MOSFET Q2, connecting V+ to a 5V reference source and V- to analog ground.

5. The isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration according to claim 1, characterized in that, During the normal sampling phase, the MCU controls IO1 to be high and IO2 and IO3 to be low, thereby turning off the first MOSFET Q1, the second MOSFET Q2, and the third MOSFET Q3, allowing the differential signal output from the isolation amplifier to be normally input into the operational amplifier.

6. The isolated voltage monitoring circuit based on MOS transistor switching and internal system reference source calibration according to claim 1, characterized in that, The MCU calculates the gain coefficient K = (Y2-Y1) / 5 and the zero drift coefficient B = Y1 based on the zero drift calibration sample value Y1 and the gain calibration sample value Y2, and calculates the actual input voltage in reverse according to the formula X = (YB) / K during normal sampling.

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