IO architecture and distributed IO system

CN224907241UActive Publication Date: 2026-10-27NANJING YOUBEI ELECTRIC TECH CO LTD
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Patent Information

Application Number
CN202522570204.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-12-03
Publication Date
2026-10-27
Estimated Expiration
2035-12-03

AI Technical Summary

Technical Problem

[0004]然而,由于现有技术中IO从总线背板插槽的硬件地址获取唯一的ID(地址),当IO模块数量多时,硬件地址占用的更多IO口线,使得布线复杂,增加了产品设计和制造成本

Benefits of technology

[0015]根据本实用新型的另一方面,提供了一种分布式IO系统,包括至少两个本实用新型任意实施例所提供的IO架构;所述总线耦合器包括第一网口和第二网口;

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Abstract

The utility model discloses an IO architecture and distributed IO system belong to industrial automation control technical field. IO architecture includes bus coupler and N IO module, bus coupler includes first interface and second interface, bus coupler is used for through first interface output first handshaking signal, IO module includes first connecting end, second connecting end and third connecting end, the first connecting end of every IO module is used for connecting second interface, IO module is used for through first connecting end to send the online message to second interface, the second connecting end of first IO module connects bus coupler's first interface, the third connecting end of i IO module is connected with the second connecting end of i+1 IO module, wherein N is the integer that is greater than or equal to 2, 1 ≦ i ≦ N-1, the third connecting end of N IO module is used for connecting terminal module, and the third connecting end of IO module is used for output second handshaking signal. The utility model can simplify IO architecture wiring, reduce IO architecture cost.
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Description

Technical Field

[0001] This utility model relates to the field of industrial automation control technology, and in particular to an IO architecture and a distributed IO system. Background Technology

[0002] In traditional centralized control systems, all input / output (IO) modules are centrally mounted on a rack near the central controller (PLC), and field devices (such as sensors, buttons, and actuators) are directly connected to the main control cabinet via long cables, resulting in high cost, low reliability, low flexibility, and poor maintainability.

[0003] To address the aforementioned issues, distributed I / O places these I / O modules closer to the field devices, forming distributed I / O stations. These distributed I / O stations are connected to the central controller via a high-speed fieldbus (such as PROFIBUS, PROFINET, etc.) for data exchange.

[0004] However, in the existing technology, IO obtains a unique ID (address) from the hardware address of the bus backplane slot. When there are many IO modules, the hardware address occupies more IO lines, which makes the wiring complex and increases the product design and manufacturing costs. Utility Model Content

[0005] This invention provides an I / O architecture and a distributed I / O system to simplify I / O architecture wiring and reduce I / O architecture costs.

[0006] According to one aspect of this utility model, an I / O architecture is provided, comprising: A bus coupler includes a first interface and a second interface; the bus coupler is used to output a first handshake signal through the first interface. There are N IO modules, each IO module including a first connection terminal, a second connection terminal, and a third connection terminal. The first connection terminal of each IO module is used to connect to the second interface, and the IO module is used to send an online message to the second interface through the first connection terminal. The second connection terminal of the first IO module is connected to the first interface of the bus coupler, and the third connection terminal of the i-th IO module is connected to the second connection terminal of the (i+1)-th IO module, where N is an integer greater than or equal to 2, 1 ≦ i ≦ N-1. The third connection terminal of the N-th IO module is used to connect to a terminal module, and the third connection terminal of the IO module is used to output a second handshake signal.

[0007] Optionally, the IO architecture further includes: a terminal module; the terminal module includes a third interface and a fourth interface; the third interface is used to receive the second handshake signal, and the fourth interface is used to connect to the second interface.

[0008] Optionally, the IO module further includes a fourth connection terminal, which is connected to its own first connection terminal; the first connection terminal of the first IO module is connected to the second interface, the fourth connection terminal of the i-th IO module is connected to the first connection terminal of the (i+1)-th IO module, and the fourth connection terminal of the N-th IO module is connected to the terminal module.

[0009] Optionally, the bus coupler and the N I / O modules are arranged sequentially along the same straight line. The bus coupler includes a first side and a second side opposite to each other along the straight line direction, and the IO module includes a third side and a fourth side opposite to each other along the straight line direction; the second side and the third side are in contact, and the third side and the fourth side are in contact; The first interface and the second interface are located on the second side, the first connection end and the second connection end are located on the third side, and the third connection end is located on the fourth side.

[0010] Optionally, the bus coupler includes: The first main control unit is used to output a handshake trigger signal based on the online message; A first handshake signal transmitting unit, wherein a first end of the first handshake signal transmitting unit is connected to the first main control unit, and a second end of the first handshake signal transmitting unit is connected to the first interface; the first handshake signal transmitting unit is used to output a first handshake signal according to the handshake trigger signal. A first communication unit, wherein a first end of the first communication unit is connected to the first main control unit and a second end of the first communication unit is connected to the second interface, and the first communication unit is used to transmit the online message to the first main control unit.

[0011] Optionally, the first master control unit includes: a disconnection signal detection subunit, used to detect whether the IO module is interrupted in communication; the first master control unit is used to reclaim the ID of the IO module in the event of the IO module being interrupted; the first master control unit is also used to send the first handshake signal to the first IO module after the remaining IO modules are reconnected.

[0012] Optionally, the IO module includes: Second main control unit; A first handshake signal receiving unit, wherein a first end of the first handshake signal receiving unit is connected to the second main control unit, and a second end of the first handshake signal receiving unit is connected to the second connection end; The second handshake signal sending unit has a first end connected to the second main control unit and a second end connected to the third connection terminal; the second main control unit is used to control the second handshake signal sending unit to send the second handshake signal after receiving the ID allocation signal sent by the first main control unit. The second communication unit has a first end connected to the second main control unit and a second end connected to the first connection end.

[0013] Optionally, the terminal module includes: Third main control unit; The second handshake signal receiving unit has a first end connected to the third main control unit, and a second end used to receive the second handshake signal; the third main control unit is used to output a termination message to the bus coupler after the second handshake signal receiving unit receives the second handshake signal. The third communication unit has a first end connected to the third main control unit and a second end connected to the second interface.

[0014] Optionally, the first handshake signal transmitting unit includes a level conversion circuit; And / or, The second handshake signal sending unit includes: a first switching circuit and a second switching circuit. The control terminal of the first switching circuit is connected to the second main control unit, and the output terminal of the second switching circuit is connected to the control terminal of the first switching circuit. The output terminal of the second switching circuit is connected to the third connection terminal. The first switching circuit is used to turn on or off according to the first control signal output by the second main control unit, and outputs a second control signal to the control terminal of the second switching circuit when it is on. The second switching circuit is used to output the second handshake signal according to the second control signal.

[0015] According to another aspect of the present invention, a distributed I / O system is provided, including at least two I / O architectures provided in any embodiment of the present invention; the bus coupler includes a first network port and a second network port; Different bus couplers are cascaded via the first network port, and the second network port of one of the bus couplers is connected to the central controller.

[0016] The technical solution of this utility model embodiment includes an I / O architecture comprising a bus coupler and N I / O modules. The first connection end of each I / O module is connected to the second interface of the bus coupler. The bus coupler continuously monitors the power-on information of each I / O module through the second interface. The bus coupler sends a first handshake signal to the first I / O module, completing ID allocation for the first I / O module upon receiving its confirmation. The second to N I / O modules sequentially transmit second handshake signals to subsequent adjacent modules, enabling the bus coupler to allocate IDs to the I / O modules upon receiving their confirmations, and to stop ID allocation upon receiving confirmations from the terminal modules. Furthermore, through this connection relationship, even when at least one of the N I / O modules disconnects, the bus coupler, I / O modules, and terminal modules are still connected according to the original connection relationship, allowing the bus coupler to continue allocating IDs to the existing I / O modules using the aforementioned process. In other words, in the technical solution of this utility model embodiment, the bus coupler, each IO module, and the terminal module are connected sequentially through corresponding interfaces or connection terminals, and mutual communication between modules can be achieved through a single communication bus. This allows the bus coupler to dynamically allocate addresses to each IO module after power-on, improving the reliability, flexibility, and versatility of the IO architecture. Furthermore, it avoids the problem of complex wiring caused by a large number of IO modules occupying more IO lines, thus reducing product design and manufacturing costs.

[0017] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A schematic diagram of an I / O architecture provided for an embodiment of this utility model; Figure 2 A schematic diagram of another I / O architecture provided in this embodiment of the present utility model; Figure 3 A schematic diagram of another I / O architecture provided in this embodiment of the present utility model; Figure 4 A schematic diagram of another I / O architecture provided in this embodiment of the present utility model; Figure 5 A schematic diagram of the structure of a first handshake signal transmitting unit provided in an embodiment of this utility model; Figure 6 A schematic diagram of the structure of a second handshake signal transmitting unit provided in an embodiment of this utility model; Figure 7 A schematic diagram of the structure of a handshake signal receiving unit provided in an embodiment of this utility model; Figure 8 A schematic diagram of the structure of a communication unit provided in an embodiment of this utility model; Figure 9 A flowchart of IO module online and ID allocation is provided for an embodiment of this utility model; Figure 10 A flowchart illustrating the working process of an ID allocation bus coupler is provided for an embodiment of this utility model. Figure 11 A flowchart illustrating the working process of an ID allocation process IO module provided in this embodiment of the utility model. Detailed Implementation

[0020] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0021] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and their variations, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0022] This utility model provides an IO architecture. Figure 1 A schematic diagram of an I / O architecture provided for an embodiment of this utility model is shown below. Figure 1The IO architecture includes a bus coupler 10 and N IO modules 20.

[0023] Bus coupler 10 includes a first interface N1 and a second interface N2; bus coupler 10 is used to output a first handshake signal through the first interface N1; IO module 20 includes a first connection terminal J1, a second connection terminal J2 and a third connection terminal J3, the first connection terminal J1 of each IO module 20 is used to connect to the second interface N2, and the IO module 20 is used to send an online message to the second interface N2 through the first connection terminal J1; the second connection terminal J2 of the first IO module 20 is connected to the first interface N1 of the bus coupler 10, the third connection terminal J3 of the i-th IO module 20 is connected to the second connection terminal J2 of the (i+1)-th IO module 20, where N is an integer greater than or equal to 2, 1≦i≦N-1, the third connection terminal J3 of the N-th IO module 20 is used to connect to the terminal module 30, and the third connection terminal J3 of the IO module 20 is used to output a second handshake signal.

[0024] The bus coupler 10, as the core of the I / O architecture, is responsible for communicating with the central controller. The second interface N2 of the bus coupler 10 is a bus interface used to connect the backbone communication cable (bus) and manage data exchange throughout the I / O architecture. I / O modules 20 are used to connect field devices to complete signal acquisition and output. For example, field devices may include digital input (DI), digital output (DO), analog input (AI), and analog output (AO) modules. Therefore, I / O modules 20 connected to digital input modules receive switching signals, such as limit switches and sensor contacts; I / O modules 20 connected to digital output modules output switching signals to control indicator lights and relays; I / O modules 20 connected to analog input modules receive analog signals, such as temperature transmitters (4-20mA); and I / O modules 20 connected to analog output modules output analog signals to control inverter speed, valve opening, etc.

[0025] For ease of description, the connection line between the first connection terminal J1 of the IO module 20 and the second interface N2 can be referred to as the communication bus 110, and the second interface N2 of the bus coupler 10 is equivalent to the bus slot.

[0026] The bus coupler 10 continuously monitors the communication bus 110 and captures the online message sent by the IO module 20 after it is powered on in real time. After receiving the online message, it first performs a legality check on the message format, the unique ID of the IO module 20 and the type identifier, and filters out invalid or illegal requests. After the check is passed, the corresponding IO module 20 is marked as "pending handshake" and the first handshake signal is output.

[0027] Specifically, after each IO module 20 is powered on, it sends an online message to the communication bus 110. Upon detecting the online message, the bus coupler 10 first sends a first handshake signal to the first IO module 20 through the first interface N1. After receiving the first handshake signal from the second connection terminal J2, the first IO module 20 sends an acknowledgment message to the bus coupler through the communication bus 110, confirming that the IO module 20 is in normal working condition. The bus coupler 10 then sends an ID allocation signal to the IO module 20 to allocate an ID. After allocation, the first IO module 20 sends a second handshake signal from the third connection terminal J3 to the second connection terminal J2 of the second IO module 20. Upon receiving the second handshake signal, the second IO module 20 sends an acknowledgment message to the bus coupler 10 through the communication bus 110, confirming that the second IO module 20 is in normal working condition. The bus coupler 10 then sends an ID allocation signal to the second IO module 20 to allocate an ID. The above operation is repeated until the Nth IO module 20 completes ID allocation and sends a second handshake signal to the terminal module 30. After receiving the second handshake signal, the terminal module 30 sends an acknowledgment message to the bus coupler 10 so that the bus coupler 10 confirms that the module is the terminal module 30, thereby stopping ID allocation and completing the ID allocation of all IO modules 20.

[0028] Understandably, after the second IO module 20 to the Nth IO module 20 completes ID allocation, they sequentially send a second handshake signal from the third connection terminal J3 to the adjacent module (IO module 20 or terminal module 30). After receiving the second handshake signal, the adjacent module sends an acknowledgment message to the bus coupler through the communication bus 110, so that the bus coupler 10 can confirm that the module is IO module 20 or terminal module 30. When the adjacent module is IO module 20, the bus coupler 10 continues to perform the ID allocation action until the adjacent module is terminal module 30, at which point the ID allocation stops, thus completing the ID allocation for all IO modules 20.

[0029] The technical solution of this utility model embodiment includes an I / O architecture comprising a bus coupler and N I / O modules. The first connection end of each I / O module is connected to the second interface of the bus coupler. The bus coupler continuously monitors the power-on information of each I / O module through the second interface. The bus coupler sends a first handshake signal to the first I / O module, completing ID allocation for the first I / O module upon receiving its confirmation. The second to N I / O modules sequentially transmit second handshake signals to subsequent adjacent modules, enabling the bus coupler to allocate IDs to the I / O modules upon receiving their confirmations, and to stop ID allocation upon receiving confirmations from the terminal modules. Furthermore, through this connection relationship, even when at least one of the N I / O modules disconnects, the bus coupler, I / O modules, and terminal modules are still connected according to the original connection relationship, allowing the bus coupler to continue allocating IDs to the existing I / O modules using the aforementioned process. In other words, the bus coupler, each I / O module, and the terminal module are connected sequentially through corresponding interfaces or connectors, and communication between modules can be achieved through a single communication bus. This allows the bus coupler to dynamically allocate addresses to each I / O module after power-on, improving the reliability, flexibility, and versatility of the I / O architecture. Furthermore, it avoids the problem of complex wiring caused by a large number of I / O modules occupying more I / O lines, thus reducing product design and manufacturing costs.

[0030] See also Figure 1 Optionally, the IO architecture also includes: a terminal module 30; the terminal module 30 includes a third interface N3 and a fourth interface N4; the third interface N3 is used to receive a second handshake signal, and the fourth interface N4 is used to connect to the second interface N2. That is, the fourth interface N4 is connected to the communication bus 110.

[0031] Specifically, after receiving the second handshake signal transmitted by the Nth IO module 20, the terminal module 30 sends an acknowledgment message to the bus coupler 10 through the communication bus 110. The acknowledgment message of the terminal module 30 is different from that of the IO module 20, so that the bus coupler 10 can determine whether the current module is the IO module 20 or the terminal module 30 based on the acknowledgment message after receiving different acknowledgment signals, and perform different operations accordingly.

[0032] Figure 2 This is a schematic diagram of another I / O architecture provided in an embodiment of the present invention, specifically showing the connection diagram of the first connection terminal J1 and the fourth connection terminal J4 of the I / O module 20 inside the I / O module 20. See also... Figure 2Based on the above embodiments, optionally, the IO module 20 further includes a fourth connection terminal J4, which is connected to its own first connection terminal J1; the first connection terminal J1 of the first IO module 20 is connected to the second interface N2, the fourth connection terminal J4 of the i-th IO module 20 is connected to the first connection terminal J1 of the (i+1)-th IO module 20, and the fourth connection terminal J4 of the N-th IO module 20 is connected to the terminal module 30. That is, the first connection terminal J1 and the fourth connection terminal J4 of the IO module 20 are connected. The first connection terminal J1 of the first IO module 20 is equivalent to being inserted into the bus slot (second interface N2) of the bus coupler 10, and the first connection terminal J1 of the second IO module 20 is equivalent to being inserted into the bus slot (fourth connection terminal J4) of the first IO module 20.

[0033] Figure 3 This is a schematic diagram of another I / O architecture provided in an embodiment of the present invention, specifically illustrating the actual connection relationship between the bus coupler, I / O module, and terminal module. See also... Figure 2 and Figure 3 Based on the above embodiments, optionally, the bus coupler 10 and the N IO modules 20 are arranged sequentially along the same straight line direction; The bus coupler 10 includes a first side and a second side opposite to each other along a straight line, and the IO module 20 includes a third side and a fourth side opposite to each other along a straight line; the second side and the third side are in contact, and the third side and the fourth side are in contact; a first interface N1 and a second interface N2 are disposed on the second side, a first connection terminal J1 and a second connection terminal J2 are disposed on the third side, and a third connection terminal J3 is disposed on the fourth side.

[0034] Optionally, the terminal module 30 includes a fifth side and a sixth side along a straight line, the fifth side being in contact with the fourth side of the Nth IO module, and the third interface N3 and the fourth interface N4 being disposed on the fifth side.

[0035] By setting the bus coupler, IO module, and terminal module 30 to all be in contact, the second connection terminal of the first IO module can be connected to the first interface, the third connection terminal of the i-th IO module can be connected to the second connection terminal of the (i+1)-th IO module, and the third connection terminal of the N-th IO module can be connected to the third interface of the terminal module; the first connection terminal of the first IO module can be connected to the second interface, the fourth connection terminal of the i-th IO module can be connected to the first connection terminal of the (i+1)-th IO module, and the fourth connection terminal of the N-th IO module can be connected to the fourth interface of the terminal module. This reduces the use of external wiring harnesses and lowers costs.

[0036] Optionally, the bus coupler 10, the N IO modules 20 and the terminal module 30 are arranged sequentially along the same straight line, and the bus coupler 10, the N IO modules 20 and the terminal module 30 are mounted on the mounting rail 100. Figure 3 The diagram illustrates, for example, a bus coupler 10, three I / O modules 20 and a terminal module 30 arranged sequentially along the same straight line.

[0037] See also Figure 3 Optionally, the bus coupler 10 includes a power interface 11, a first network port 12, a second network port 13, a first communication interface 14, and a first indicator light 15. The first communication interface 14 can be a USB interface, and the first indicator light 15 can include multiple LEDs.

[0038] See also Figure 3 Optionally, the IO module 20 includes a first signal input terminal 21 and a second indicator light 22. The first signal input terminal 21 includes multiple sets of first signal input terminals for connecting different field devices, and the second indicator light 22 may include multiple LEDs.

[0039] See also Figure 3 Optionally, the terminal module 30 includes a second signal access terminal 31 and a third indicator light 32. The second signal access terminal 31 includes multiple sets of second signal access terminals for connecting different field devices, and the third indicator light 32 may include multiple LEDs.

[0040] The specific hardware structure of the bus coupler 10, IO module 20 and terminal module 30 is described below, but this is not intended to limit the present invention.

[0041] Figure 4 A schematic diagram of another I / O architecture provided in this embodiment of the present invention is shown below. Figure 4 Based on the above embodiments, the bus coupler 10 may optionally include a first master control unit 101, a first handshake signal sending unit 102, and a first communication unit 103.

[0042] The first main control unit 101 is used to output a handshake trigger signal based on the online message; the first end of the first handshake signal sending unit 102 is connected to the first main control unit 101, and the second end of the first handshake signal sending unit 102 is connected to the first interface N1; the first handshake signal sending unit 102 is used to output a first handshake signal according to the handshake trigger signal; the first end of the first communication unit 103 is connected to the first main control unit 101, and the second end of the first communication unit 103 is connected to the second interface N2; the first communication unit 103 is used to transmit the online message to the first main control unit 101.

[0043] Optionally, the first main control unit 101 includes a disconnection signal detection subunit for detecting whether the IO module 20 is interrupted in communication. The first main control unit 101 is used to reclaim the ID of the IO module 20 when the IO module 20 is interrupted. The first main control unit 101 is also used to send a first handshake signal to the first IO module 20 after the remaining IO modules 20 are reconnected.

[0044] During normal operation of the IO module 20, the disconnection signal detection subunit periodically (e.g., at 100ms intervals) monitors the status of the communication bus 110. It determines whether the communication link is normal by detecting whether the IO module 20 continuously sends heartbeat messages (or periodic status messages). If a communication interruption is detected, it determines that the IO module 20 is disconnected, marks its status as "offline", records the exception code, and triggers subsequent fault alarms or reconnection mechanisms to ensure that the system can promptly perceive the offline status of the module.

[0045] Specifically, when at least one of the first to the Nth IO modules 20 disconnects, the disconnection signal detection subunit detects that the IO module is disconnected, marks the IO module 20 as offline, reclaims the ID of the IO module 20, and puts it back into the ID address pool for use by the reconnected IO module 20. Simultaneously, the next IO module 20 along the straight line from the disconnected IO module 20 is connected to the previous IO module 20 along the opposite straight line from the disconnected IO module 20, and so on, until the bus coupler 10, IO modules 20, and terminal module 30 are connected according to the connection relationship between the bus coupler 10 and IO modules 20 provided in any of the above embodiments. After all modules are connected, the bus coupler 10 receives the online message of each IO module 20 and outputs the first handshake signal to the first IO module 20 again through the first interface N1 to assign an ID to it. After the ID assignment of the first IO module 20 is completed, the first IO module 20 sends a second handshake signal to the second IO module 20, and sends an acknowledgment message to the bus coupler 10 after receiving the second handshake signal. Thus, the bus coupler 10 assigns an ID to the second IO module 20. Then, the ID assignment of the remaining IO modules 20 is performed in the same manner as described above until all IO modules 20 have completed ID assignment.

[0046] Optionally, the first main control unit 101 may also include an access signal detection subunit and an ID allocation management subunit.

[0047] Specifically, the bus coupler 10 operates as follows: the access signal detection subunit continuously monitors the communication bus, capturing the online message sent by the IO module 20 after power-on; upon receiving the online message, it first verifies the validity of the message format, the unique ID of the IO module 20, and the type identifier, filtering out invalid or illegal requests; after successful verification, it marks the corresponding IO module 20 as "pending handshake" and generates a handshake trigger signal, which is then transmitted to the first handshake signal sending unit 102. After receiving the handshake trigger signal from the signal detection unit, the first handshake signal sending unit 102 immediately sets the handshake signal line transmitting the first handshake signal to a high level through the GPIO driver unit, and synchronously starts a timer (preset timing duration of 10ms); during the timing period, it uses a resource locking mechanism to shield handshake requests from other modules, ensuring that the current pulse signal is not interfered with; when the timer reaches 10ms, it triggers an interrupt and immediately pulls the handshake signal line back to a low level, completing the pulse transmission; subsequently, it updates the status of the IO module 20 to "handshake completed" and releases resources to respond to the next access request, while simultaneously feeding back handshake completion information to the communication bus. The ID allocation management subunit has a built-in preset pool of unallocated ID addresses (the address range can be set according to actual needs, such as 1-128), and stores a mapping table of currently allocated IDs (recording the correspondence between "port-IO module-ID address"). When an IO module access signal is received, a unique unused ID address is automatically selected from the ID address pool; when an IO module disconnection signal is received, the ID address corresponding to that IO module 20 is immediately marked as unallocated and put back into the ID address pool, realizing dynamic recycling and reuse of ID addresses.

[0048] See also Figure 4 Optionally, the IO module 20 includes a second main control unit 201, a first handshake signal receiving unit 202, a second handshake signal sending unit 203, and a second communication unit 204.

[0049] The first end of the first handshake signal receiving unit 202 is connected to the second main control unit 201, and the second end of the first handshake signal receiving unit 202 is connected to the second connection terminal J2; the first end of the second handshake signal sending unit 203 is connected to the second main control unit 201, and the second end of the second handshake signal sending unit 203 is connected to the third connection terminal J3; the second main control unit 201 is used to control the second handshake signal sending unit 203 to send out the second handshake signal after receiving the ID allocation signal sent by the first main control unit 101; the first end of the second communication unit 204 is connected to the second main control unit 201, and the second end of the second communication unit 204 is connected to the first connection terminal J1.

[0050] Optionally, the second main control unit 201 includes an ID allocation processing storage subunit, which is used to store the ID address allocated by the bus coupler 10.

[0051] Specifically, the ID allocation process of IO module 20 is as follows: After IO module 20 powers on and sends an online message, it immediately enters the "signal listening" state and continuously monitors the level change of the first handshake signal line through its own dedicated hardware interface. When a 10ms high-level pulse is detected from bus coupler 10 (the internal counter is started when the pulse changes from low to high, and the duration of the high level is determined to be valid if it is within the range of 9.5ms to 10.5ms), it immediately confirms that the physical layer handshake with bus coupler 10 is successful, and then switches to the "data receiving" state. At this time, bus coupler 10 sends an ID allocation signal (including module address, communication parameters, etc.) through communication bus 110. The receiving unit inside IO module 20 (such as the second master control unit) will verify the integrity of the information (such as CRC check). After confirming that there is no error, it stores the ID information in the local register, marks itself as "ID allocated", and triggers an internal signal to inform the second handshake signal sending unit 203 that it can start the subsequent actions. The ID allocation processing storage unit uses volatile memory (such as SRAM) to store the ID addresses allocated by the bus coupler 10. This memory retains data only when the IO module 20 is powered on. Once the IO module 20 is powered off (e.g., removed or under power-off maintenance), the stored ID addresses are immediately cleared. When the IO module 20 is reconnected to the system, a new ID address needs to be allocated by the bus coupler 10 to avoid ID address conflicts caused by the reuse of the IO module 20.

[0052] See also Figure 4 Optionally, the terminal module 30 includes a third main control unit 301, a second handshake signal receiving unit 302, and a third communication unit 303.

[0053] The first end of the second handshake signal receiving unit 302 is connected to the third main control unit 301, and the second end of the second handshake signal receiving unit 302 is used to receive the second handshake signal. The third main control unit 301 is used to output a termination message to the bus coupler 10 after the second handshake signal receiving unit 302 receives the second handshake signal. The first end of the third communication unit 303 is connected to the third main control unit 301, and the second end of the third communication unit 303 is connected to the second interface N2. Specifically, the termination message is a set of special fixed messages that the terminal module 30 sends to the communication bus after receiving the second handshake signal.

[0054] Specifically, the terminal module 30 operates as follows: The second handshake signal receiving unit 302 continuously monitors the level changes of the dedicated handshake signal line (the connection line between the third connection terminal of the Nth IO module and the second handshake signal receiving unit). When a low-to-high transition is detected, a high-precision timer is immediately started to record the duration of the high level in real time. If the duration is in the range of 9ms to 11ms (compatible with the 10ms standard pulse of the preceding module), it is determined to be a valid second handshake signal, and an internal flag of "valid second handshake signal" is generated. If the signal duration exceeds the threshold (e.g., <8ms or >12ms) or an abnormal level occurs (e.g., a continuous high level for more than 50ms), it is marked as "invalid second handshake signal" and maintains the "waiting for a valid second handshake signal" state to re-monitor. When the third communication unit 303 confirms the valid second handshake signal, it immediately triggers the generation of a handshake end message (fixed message) and sends the fixed message to the communication bus.

[0055] In other words, the IO architecture provided by this utility model embodiment can automatically assign IDs to IO modules, and after an IO module is disconnected, the bus coupler can reassign addresses to existing IO modules, enabling hot-swapping of IO modules. This solves the problem that in existing technologies, IO modules have built-in ID setting functions, but in projects with a large number of IO modules, IDs need to be set one by one, which is not only cumbersome but also prone to duplicate or incorrect ID addresses due to human error, affecting project debugging efficiency and delivery cycle. It also solves the problem that IO modules obtain unique IDs from the hardware address of the bus backplane slot; when the number of IO modules is large, the hardware address occupies more IO lines, increasing product design and manufacturing costs. Furthermore, it solves the problem that most traditional distributed IO systems do not support hot-swapping functionality; if IO modules are plugged in or unplugged during system operation, the newly connected module cannot be automatically recognized by the system, which may lead to system crashes and data loss.

[0056] The specific structures of the first handshake signal transmitting unit, the first communication unit, the first handshake signal receiving unit, the second handshake signal transmitting unit, the second communication unit, the second handshake signal receiving unit, and the third communication unit are described below, but this is not intended to limit the present invention. In other embodiments, as long as the same function can be achieved, it is acceptable. Exemplarily, the structures of the first handshake signal receiving unit and the second handshake signal receiving unit may be the same, and the structures of the first communication unit, the second communication unit, and the third communication unit may be the same.

[0057] Figure 5 A schematic diagram of the structure of a first handshake signal transmitting unit provided in an embodiment of this utility model is shown below. Figure 4 and Figure 5Optionally, based on the above embodiments, the first handshake signal sending unit 102 includes a level conversion circuit.

[0058] The level conversion circuit includes a first level conversion chip U1 and peripheral circuitry, such as resistors and capacitors. The first terminal of the first level conversion chip U1 is connected to a 3.3V voltage, the second terminal is connected to a 5V voltage, the third terminal is grounded (GND), the fourth terminal is connected to a 3.3V voltage, the fifth terminal is connected to the first main control unit 101, and the first main control unit 101 transmits a handshake trigger signal REL_REQ_PER to the first handshake signal sending unit 102. The sixth terminal of the first level conversion chip U1 is connected to the second connection terminal J2, and transmits the first handshake signal ADDR_REQ_PER to the second connection terminal J2.

[0059] Specifically, the level conversion circuit is used to transmit the first handshake signal between the first main control unit 101 and the external interface. The first handshake signal transmitting unit 102 converts the level of the received handshake trigger signal REL_REQ_PER to generate the first handshake signal ADDR_REQ_PER, and transmits it to the second connection terminal J2. For example, the handshake trigger signal REL_REQ_PER can be a 3.3V handshake trigger signal, and the first level conversion chip U1 can directly convert the 3.3V handshake trigger signal sent from the first main control unit 101 into a 5V signal for the lower-level IO module 20 to pick up.

[0060] Figure 6 A schematic diagram of the structure of a second handshake signal transmitting unit provided in an embodiment of this utility model is shown below. Figure 4 and Figure 6 Based on the above embodiments, optionally, the second handshake signal sending unit 203 includes a first switch circuit 213 and a second switch circuit 223; the control terminal of the first switch circuit 213 is connected to the second main control unit 201, the output terminal of the second switch circuit 223 is connected to the control terminal of the first switch circuit 213, and the output terminal of the second switch circuit 223 is connected to the third connection terminal J3; the first switch circuit 213 is used to turn on or off according to the first control signal output by the second main control unit 201, and outputs a second control signal to the control terminal of the second switch circuit 223 when it is turned on, and the second switch circuit 223 is used to output a second handshake signal according to the second control signal.

[0061] The first switching circuit 213 includes a first transistor Q1 and its peripheral circuitry. For example, the peripheral circuitry may include a resistor connected in series with the control electrode of the first transistor Q1, and a resistor connected between the control electrode and the first electrode of the first transistor Q1. The second electrode of the first transistor Q1 is connected to the second switching circuit. The second switching circuit 223 includes a second transistor Q2 and its peripheral circuitry. For example, the peripheral circuitry may include a resistor connected to the control electrode of the second transistor Q2, a resistor connected between the control electrode and the first electrode of the second transistor Q2, and a resistor connected to the second electrode of the second transistor Q2. The first electrode of the second transistor Q2 is connected to a 5V voltage. The control electrode of the first transistor Q1 serves as the first terminal S_OUT of the second handshake signal transmitting unit 203, connected to the second main control unit 201. The second electrode of the second transistor Q2 serves as the second terminal ADDR_REQ_OUT of the second handshake signal transmitting unit, connected to the third connection terminal J3.

[0062] Specifically, since the ID configuration signal of the IO module 20 is issued by the first main control unit 101 and transmitted to the next-level IO module 20, a 3.3V to 5V circuit composed of the first transistor Q1, the second transistor Q2, and peripheral circuitry is added to the transmitting port of the second main control unit 201 to ensure the consistency of the 5V level. When the first terminal S_OUT of the second handshake signal transmitting unit 203 outputs a 3.3V level, the base (control terminal) of the first transistor Q1 is pulled high, the emitter (first terminal) is forward biased, and the collector (second terminal) is reverse biased, turning on the first transistor Q1. At the same time, the base (control terminal) of the second transistor Q2 is pulled low, the emitter (first terminal) is forward biased, and the collector (second terminal) is reverse biased, turning on the second transistor Q2. This converts the 3.3V to a 5V signal and outputs it to the second terminal ADDR_REQ_OUT of the second handshake signal transmitting unit 203 for the next-level IO module 20 to pick up, thus realizing the second main control unit 201 sending the second handshake signal to the external interface.

[0063] Figure 7 This is a schematic diagram of the structure of a handshake signal receiving unit provided in an embodiment of the present invention, specifically a schematic diagram of the structure of a first handshake signal receiving unit and a second handshake signal receiving unit. See also... Figure 4 and Figure 7 Based on the above embodiments, optionally, both the first handshake signal receiving unit 202 and the second handshake signal receiving unit 302 include a voltage divider circuit, which may include a resistor.

[0064] Specifically, the voltage divider circuit in the first handshake signal receiving unit 202 is located between the receiving port of the first handshake signal receiving unit 202 and the second main control unit 201 for level matching, allowing the 3.3V voltage system of the second main control unit 201 to pick up the signal, thus enabling the second main control unit 201 to receive the second handshake signal from the external interface. The first terminal ADDR_REQ_IN of the voltage divider circuit in the first handshake signal receiving unit 202 is connected to the second main control unit 201, and the second terminal SIN of the voltage divider circuit in the first handshake signal receiving unit 202 is connected to the second connection terminal J2.

[0065] Similarly, the voltage divider circuit in the second handshake signal receiving unit 302 is located between the receiving port of the second handshake signal receiving unit 302 and the third main control unit 301 for level matching, allowing the 3.3V voltage system of the third main control unit 301 to pick up the signal, thus enabling the third main control unit 301 to receive the second handshake signal from the external interface. Specifically, the first terminal ADDR_REQ_IN of the voltage divider circuit in the second handshake signal receiving unit 302 is connected to the third main control unit 301, and the second terminal SIN of the voltage divider circuit in the second handshake signal receiving unit 302 is connected to the third connection terminal J3.

[0066] Figure 8 This is a schematic diagram of the structure of a communication unit provided in an embodiment of the present invention, specifically a schematic diagram of the structure of a first communication unit, a second communication unit, and a third communication unit. See also... Figure 4 and Figure 8 Based on the above embodiments, optionally, the first communication unit 103, the second communication unit 204 and the third communication unit 303 each include a first level conversion circuit, a second level conversion circuit and a CAN transceiver circuit.

[0067] The circuit comprises a first level conversion circuit including a second level conversion chip U2, a second level conversion circuit including a third level conversion chip U3, and a CAN transceiver circuit including a CAN transceiver chip U4 and peripheral circuitry, such as resistors. The first power supply terminals of the second level conversion chip U2 are connected to 3.3V and 5V respectively, the second power supply terminal of the second level conversion chip U2 is grounded (GND), the input terminal of the second level conversion chip U2 is connected to the signal CAN_TX, and the output terminal of the second level conversion chip U2 is connected to the CAN transceiver chip U4. Similarly, the first power supply terminals of the third level conversion chip U3 are connected to 3.3V and 5V respectively, the second power supply terminals of the third level conversion chip U3 are grounded (GND), the input terminal of the third level conversion chip U3 is connected to the signal CAN_RX, and the output terminal of the third level conversion chip U3 is connected to the CAN transceiver chip U4. Each of the first power supply terminals of the CAN transceiver chip U4 is connected to a 5V voltage, each of the second power supply terminals of the CAN transceiver chip U4 is grounded (GND), the first output terminal of the CAN transceiver chip U4 outputs the signal CANH, and the second output terminal of the CAN transceiver chip U4 outputs the signal CANL.

[0068] Specifically, the communication unit is used for sending and receiving CAN signals between the main control unit and the external interface within the module containing the communication unit. The CAN transceiver chip U4 handles the physical layer conversion and signal driving functions for bus data. Since this chip uses a 5V power supply, while the main control unit's I / O interface uses a 3.3V level standard, there is a difference in their logic levels. To ensure accurate signal transmission and circuit safety, a first level conversion circuit and a second level conversion circuit need to be added between the CAN transceiver chip U4 and the main control unit interface to guarantee reliable signal transmission.

[0069] In summary, this utility model embodiment, through the collaborative design of hot-swap detection, automatic ID allocation, and hardware protection, can achieve multi-dimensional performance improvement in industrial automation scenarios.

[0070] The specific beneficial effects are as follows: 1. This utility model, through the built-in functional units of the I / O module and bus coupler, supports the hot-swapping function of the I / O module, realizing "hot-swappable" operation of the I / O module. That is, by enabling hot-swapping, maintenance costs and downtime losses can be significantly reduced. 2. Relying on the ID allocation management unit of the bus coupler, when a new IO module is connected, the system can automatically select a unique unused address from the preset ID pool, eliminating the need for manual configuration using dedicated tools. In other words, fully automatic ID allocation eliminates the risk of human error.

[0071] 3. After the new I / O module completes ID assignment, it can quickly establish communication with the upper-layer system via the bus coupler and immediately participate in signal acquisition and instruction execution. When the I / O module is removed, its ID address is automatically returned to the ID pool, without affecting the normal operation of other modules. The entire hot-swapping and ID assignment process does not require a system restart, avoiding problems such as "data loss, parameter recalibration, and process interruption" that occur during traditional system restarts. This allows for restart-free operation, ensuring continuous and stable production processes.

[0072] The following section provides a detailed explanation of the ID allocation process for each I / O module by the bus coupler.

[0073] Figure 9 A flowchart of IO module online and ID allocation provided for an embodiment of this utility model is shown below. Figure 9 Based on the above embodiments, the IO module deployment and ID allocation process includes: S101, the IO module powers on and sends an online message.

[0074] Among them, the online message is a set of fixed messages sent by the IO module to the communication bus when it is powered on.

[0075] S102, Bus coupler detects online message.

[0076] Specifically, the first master control unit in the bus coupler detects the legitimacy of the online message.

[0077] S103, The first handshake signal sending unit in the bus coupler sends the first handshake signal.

[0078] S104. The first handshake signal receiving unit in the IO module receives the first handshake signal or the second handshake signal and sends confirmation information to the bus coupler.

[0079] S105, The bus coupler sends an ID allocation signal to the IO module.

[0080] Specifically, the ID allocation management subunit in the first master control unit of the bus coupler sends the ID allocation signal.

[0081] S106, IO module stores ID address.

[0082] Specifically, the ID allocation processing storage unit in the second main control unit of the IO module stores the ID address.

[0083] S107, the IO module sends the second handshake signal.

[0084] Specifically, the second handshake signal sending unit in the IO module sends the second handshake signal.

[0085] S108. Determine if it is a terminal module; if yes, execute S109; if no, execute S104.

[0086] Specifically, the bus coupler determines whether a module is an I / O module or a terminal module based on the module's acknowledgment signal.

[0087] S109, The terminal module receives the second handshake signal.

[0088] Specifically, the second handshake signal receiving unit of the terminal module receives the second handshake signal.

[0089] Based on the above embodiments, the IO module unplugging and ID recycling process includes: 1) When a faulty IO module needs to be replaced, simply remove the IO module from the bus slot and disconnect the IO module from the signal connection of the field communication bus.

[0090] 2) When the bus coupler detects the communication interruption of the IO module, it immediately sends an IO module unplug notification to the ID allocation management unit.

[0091] 3) After receiving the notification, the ID allocation management unit updates the ID number corresponding to the IO module from the "allocated" state to the "reclaimed" state, and then marks it as "unallocated" and re-includes it in the ID pool for use by newly connected IO modules.

[0092] Figure 10 A flowchart illustrating the working process of the ID allocation bus coupler provided in this embodiment of the utility model is shown below. Figure 10 Based on the above embodiments, the bus coupler ID allocation process includes: S201. Determine whether an online message has been received; if yes, proceed to S202; if no, proceed to S201.

[0093] S202, Send the first handshake signal.

[0094] S203. Determine if a 1-second timer is needed; if yes, execute S213; otherwise, execute S204.

[0095] S204. Determine whether to receive the default ID acknowledgment message; if yes, proceed to S205; if no, proceed to S209.

[0096] The default ID acknowledgment message is a set of fixed messages with a default ID (0xFF) sent by the IO module to the bus after detecting a 10ms high level.

[0097] S205. Send a configuration message with MAX_ID.

[0098] Among them, the MAX_ID configuration message is a set of fixed messages with the ID (MAX_ID) configured for the IO module sent by the bus coupler to the communication bus after receiving the acknowledgment message with the default ID sent by the IO module.

[0099] S206. Determine if a 1-second timer is needed; if yes, execute S213; otherwise, execute S207.

[0100] S207. Determine whether the end message has been received; if yes, proceed to S208; if no, proceed to S211.

[0101] The termination message is a special set of fixed messages sent to the communication bus by the terminal module after receiving the second handshake signal. MAX_ID is the currently available ID.

[0102] S208, MAX_ID=1.

[0103] S209. Determine whether to receive the assigned ID acknowledgment message; if yes, proceed to S210; if no, proceed to S203.

[0104] Among them, the assigned ID confirmation message is a set of fixed messages with assigned IDs that the IO module will send to the bus after detecting a 5ms high level or receiving a configuration message from the bus coupler (not the last module, i.e., the terminal module).

[0105] S210, MAX_ID = MAX_ID + 1.

[0106] S211. Determine whether to receive the assigned ID acknowledgment message; if yes, proceed to S212; if no, proceed to S206.

[0107] S212, MAX_ID = MAX_ID + 1.

[0108] S213, No IO module responds and reports an error.

[0109] In short, the bus coupler ID allocation process is as follows: Real-time detection of whether an IO module's online message is received; the access signal detection unit (IO module access signal detection unit) receives the online message indicating an IO module with an ID to be allocated, and the first handshake signal sending unit sends a hardware handshake signal to the first card (the first IO module); a 1-second countdown is performed, and if no card responds, an error is reported, and the process returns to the beginning; if an acknowledgment message is received from an IO module, if it is a reply from an IO module with an allocated ID, then MAX_ID is incremented by 1; if it is a reply from an IO module with a default ID, then a configuration message with MAX_ID is sent; a 1-second countdown is performed, and if no card responds, an error is reported, and the process returns to the beginning; if an acknowledgment message is received, then MAX_ID is incremented by 1; if an end message is received, then MAX_ID is reinitialized and the process waits for the next ID allocation.

[0110] Figure 11 A flowchart illustrating the working process of the ID allocation process IO module provided in this embodiment of the utility model is shown below. Figure 11 Based on the above embodiments, the IO module ID allocation process includes: S301. Determine if ID allocation is complete; if yes, proceed to S302; otherwise, proceed to S307.

[0111] S302. Determine whether a hardware handshake signal has been received; if yes, proceed to S303; if no, proceed to S301.

[0112] The hardware handshake signal is a 10ms high level, and this hardware handshake signal is the second handshake signal.

[0113] S303. Determine if it is a terminal module; if yes, execute S304; if no, execute S305.

[0114] S304. Send end message.

[0115] S305. Send an acknowledgment message with the assigned ID.

[0116] S306, Send hardware handshake signal.

[0117] S307. Determine if a 1-second timer is needed; if yes, proceed to S308; otherwise, proceed to S309.

[0118] S308, Send online message.

[0119] S309. Determine whether a hardware handshake signal has been received; if yes, proceed to S310; if no, proceed to S308.

[0120] The hardware handshake signal is a 10ms high level, and this hardware handshake signal is the first handshake signal.

[0121] S310. Send an acknowledgment message with the default ID.

[0122] S311. Determine if a 1-second timer is needed; if yes, execute S308; otherwise, execute S312.

[0123] S312. Determine whether to receive the configuration message; if yes, execute S313; if no, execute S311.

[0124] S313. Save the assigned ID.

[0125] In short, the IO module ID allocation process is as follows: First, determine if the current ID allocation is complete. If ID allocation is complete, continuously monitor whether the hardware handshake signal (second handshake signal) has been sent. If the second handshake signal is detected by the terminal module, send an end message and return to the repeat process. If the second handshake signal is not detected by the terminal module, send an acknowledgment message with the allocated ID and send the hardware handshake signal to the next IO module. If ID allocation is incomplete, send an online message every 1 second (to prevent the bus coupler from not receiving it). Continuously monitor whether the hardware handshake signal (first handshake signal) from the bus coupler has been received. After detecting the first handshake signal, send an acknowledgment message with the default ID. Wait 1 second to receive the configuration message; if no message is received after the timeout, return to send the online message. After receiving the configuration message, save the ID and jump to the terminal module detection process.

[0126] This invention also provides a distributed I / O system, including at least two I / O architectures provided in any embodiment of this invention; therefore, the distributed I / O system has corresponding beneficial effects.

[0127] The bus coupler includes a first network port and a second network port; different bus couplers are cascaded through the first network port, and the second network port of one of the bus couplers is connected to the central controller. This improves the compatibility, flexibility, scalability, and maintainability of the distributed I / O system, while reducing costs.

[0128] It should be understood that the various forms of the process shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this utility model can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this utility model can be achieved, and this is not limited herein.

[0129] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. An I / O architecture, characterized in that, include: A bus coupler includes a first interface and a second interface; the bus coupler is used to output a first handshake signal through the first interface. There are N IO modules, each IO module including a first connection terminal, a second connection terminal, and a third connection terminal. The first connection terminal of each IO module is used to connect to the second interface, and the IO module is used to send an online message to the second interface through the first connection terminal. The second connection terminal of the first IO module is connected to the first interface of the bus coupler, and the third connection terminal of the i-th IO module is connected to the second connection terminal of the (i+1)-th IO module, where N is an integer greater than or equal to 2, 1 ≦ i ≦ N-1. The third connection terminal of the N-th IO module is used to connect to a terminal module, and the third connection terminal of the IO module is used to output a second handshake signal.

2. The I / O architecture according to claim 1, characterized in that, Also includes: A terminal module; the terminal module includes a third interface and a fourth interface; the third interface is used to receive the second handshake signal, and the fourth interface is used to connect to the second interface.

3. The I / O architecture according to claim 1, characterized in that, The IO module further includes a fourth connection terminal, which is connected to its own first connection terminal; the first connection terminal of the first IO module is connected to the second interface, the fourth connection terminal of the i-th IO module is connected to the first connection terminal of the (i+1)-th IO module, and the fourth connection terminal of the N-th IO module is connected to the terminal module.

4. The I / O architecture according to claim 1, characterized in that, The bus coupler and the N I / O modules are arranged sequentially along the same straight line. The bus coupler includes a first side and a second side opposite to each other along the straight line direction, and the IO module includes a third side and a fourth side opposite to each other along the straight line direction; the second side and the third side are in contact, and the third side and the fourth side are in contact; The first interface and the second interface are located on the second side, the first connection end and the second connection end are located on the third side, and the third connection end is located on the fourth side.

5. The I / O architecture according to claim 1, characterized in that, The bus coupler includes: The first main control unit is used to output a handshake trigger signal based on the online message; A first handshake signal transmitting unit, wherein a first end of the first handshake signal transmitting unit is connected to the first main control unit, and a second end of the first handshake signal transmitting unit is connected to the first interface; the first handshake signal transmitting unit is used to output a first handshake signal according to the handshake trigger signal. A first communication unit, wherein a first end of the first communication unit is connected to the first main control unit and a second end of the first communication unit is connected to the second interface, and the first communication unit is used to transmit the online message to the first main control unit.

6. The I / O architecture according to claim 5, characterized in that, The first master control unit includes: a disconnection signal detection subunit, used to detect whether the IO module is interrupted in communication; the first master control unit is used to reclaim the ID of the IO module in the event of an IO module interruption; the first master control unit is also used to send the first handshake signal to the first IO module after the remaining IO modules are reconnected.

7. The I / O architecture according to claim 5, characterized in that, The IO module includes: Second main control unit; A first handshake signal receiving unit, wherein a first end of the first handshake signal receiving unit is connected to the second main control unit, and a second end of the first handshake signal receiving unit is connected to the second connection end; The second handshake signal sending unit has a first end connected to the second main control unit and a second end connected to the third connection terminal; the second main control unit is used to control the second handshake signal sending unit to send the second handshake signal after receiving the ID allocation signal sent by the first main control unit. The second communication unit has a first end connected to the second main control unit and a second end connected to the first connection end.

8. The I / O architecture according to claim 7, characterized in that, The terminal module includes: Third main control unit; The second handshake signal receiving unit has a first end connected to the third main control unit, and a second end used to receive the second handshake signal; the third main control unit is used to output a termination message to the bus coupler after the second handshake signal receiving unit receives the second handshake signal. The third communication unit has a first end connected to the third main control unit and a second end connected to the second interface.

9. The I / O architecture according to claim 7, characterized in that, The first handshake signal sending unit includes a level conversion circuit; And / or, The second handshake signal sending unit includes: a first switching circuit and a second switching circuit. The control terminal of the first switching circuit is connected to the second main control unit, and the output terminal of the second switching circuit is connected to the control terminal of the first switching circuit. The output terminal of the second switching circuit is connected to the third connection terminal. The first switching circuit is used to turn on or off according to the first control signal output by the second main control unit, and outputs a second control signal to the control terminal of the second switching circuit when it is on. The second switching circuit is used to output the second handshake signal according to the second control signal.

10. A distributed I / O system, characterized in that, It includes at least two I / O architectures as described in any one of claims 1-9; the bus coupler includes a first network port and a second network port; Different bus couplers are cascaded via the first network port, and the second network port of one of the bus couplers is connected to the central controller.