A control circuit and super input-output chip

Abstract

The application provides a control circuit and a super input-output chip. The circuit comprises a first adjusting module, a first switching module and a control module. The first end of the first adjusting module is connected to a state indication signal. The controlled end of the first switching module is connected to the second end of the first adjusting module and grounded. The first end of the first switching module is grounded. The second end of the first switching module is connected to a heat dissipation unit. The control module is connected to the third end of the first adjusting module, the second end of the first switching module and the heat dissipation unit. In a default control mode, the control module is configured to control the first switching module to be turned on through the first adjusting module. In an active control mode, the control module is configured to control the first switching module to be turned off through the first adjusting module. The circuit can effectively shield the control signal output by the super input-output chip by default in the initial power-on stage, so as to avoid the phenomenon that the heat dissipation unit runs at a non-controlled high speed, thereby reducing the boot noise and improving the user experience.

Description

Technical Field

[0001] This application relates to the field of control chip technology, and in particular to a control circuit and a super input / output chip. Background Technology

[0002] Currently, PC systems typically include a SuperInput / Output (SIO) chip to manage low-speed peripheral interfaces. This SIO chip usually incorporates a heatsink (e.g., a fan), and adjusting the fan speed balances cooling performance with operating noise.

[0003] However, due to the limitations of the Super PLO chip, during the transition from the default control mode to the active control mode after the Super PLO chip is powered on, the fan in the relevant technology is in a state of being powered but uncontrolled, causing the fan to run at high speed uncontrolled. This phenomenon results in a brief but noticeable increase in noise during startup, affecting the user's auditory experience and posing a risk of exceeding noise limits. Utility Model Content

[0004] To address the aforementioned issues, this application provides a control circuit and a super input / output chip, aiming to solve the problem in related technologies where the fan operates at high speed in an uncontrolled state, resulting in a brief but significant increase in noise during startup, affecting the user's auditory experience, and posing a risk of excessive noise.

[0005] In a first aspect, embodiments of the present application provide a control circuit comprising a first adjustment module, a first switch module, and a control module; a first terminal of the first adjustment module is connected to a status indication signal; a controlled terminal of the first switch module is connected to and grounded to a second terminal of the first adjustment module, the first terminal of the first switch module is grounded, and the second terminal of the first switch module is connected to a heat dissipation unit; the control module is connected to a third terminal of the first adjustment module, the second terminal of the first switch module, and the heat dissipation unit; wherein, in a default control mode, the control module is configured to control the first switch module to conduct via the first adjustment module; and in an active control mode, the control module is configured to control the first switch module to turn off via the first adjustment module.

[0006] Based on the control circuit provided in this application, when the control circuit is in the default control mode, the control module controls the first switch module to turn on via the first adjustment module, thereby pulling down the default duty cycle control signal output by the control module to ground. By pulling down the default control signal, the heat dissipation unit is prevented from operating at high speed uncontrolled. This effectively shields the fixed duty cycle control signal output by the control circuit itself at the initial power-on stage, effectively shielding the fixed duty cycle control signal output by the super input / output chip, preventing uncontrolled high-speed operation of the heat dissipation unit, significantly reducing startup noise, lowering the risk of excessive noise, and improving the user experience. Simultaneously, when the control circuit is in the active control mode, the control module controls the first switch module to turn off via the first adjustment module, restoring the normal output path of the control signal, allowing the heat dissipation unit to enter a controlled speed regulation state. That is, after the basic input / output system of the super input / output chip is ready, it can seamlessly switch to the normal speed regulation mode, achieving a smooth transition of the heat dissipation unit from "silent start" to "intelligent speed regulation," achieving a good balance between quiet operation and heat dissipation safety. Secondly, this application adopts an intervention mechanism of software (control module) and hardware circuit (i.e., first adjustment module and first switch module), which does not rely on the startup timing of the basic input / output system or firmware updates. It can be universally deployed on different motherboard platforms and different central processing unit architectures, with high adaptability, reducing development and verification costs.

[0007] As an optional implementation, the first adjustment module includes a first level holding unit and a first unidirectional conduction unit; one end of the first level holding unit serves as the first end of the first adjustment module and is connected to a status indication signal, and the other end of the first level holding unit serves as the third end of the first adjustment module and is connected to the control module; the input end of the first unidirectional conduction unit is connected to the other end of the first level holding unit, and the output end of the first unidirectional conduction unit serves as the second end of the first adjustment module, is connected to the controlled end of the first switch module and is grounded.

[0008] Based on the aforementioned optional methods, when the control circuit is in the default control mode, the first level holding unit can provide a high-level drive signal with stable amplitude and strong noise suppression capability to the controlled terminal of the first switching module, thereby significantly improving the reliability of the first switching module's conduction and effectively reducing the operating noise of the heat dissipation unit. Secondly, by setting the first unidirectional conduction unit, only the first adjustment signal is allowed to be transmitted forward to the first switching module, preventing current or voltage from flowing back from the subsequent stage to the preceding stage circuit, thus improving the overall reliability of the circuit.

[0009] As an optional implementation, the first level holding unit includes a first resistor, and the first unidirectional conduction unit includes a first diode; one end of the first resistor serves as one end of the first level holding unit and is connected to a status indication signal, the other end of the first resistor serves as the other end of the first level holding unit, the anode of the first diode serves as the input terminal of the first unidirectional conduction unit, the other end of the first resistor is connected to the control module and the anode of the first diode, and the cathode of the first diode serves as the output terminal of the first unidirectional conduction unit, is connected to the controlled terminal of the first switch module and is grounded.

[0010] Based on the above-mentioned optional methods, a pull-up resistor is used to achieve pull-up retention, and a first diode enables unidirectional conduction. This solves the problems of insufficient driving capability, reverse interference, and unstable voltage levels inherent in the direct drive method without increasing complexity. Furthermore, it is low-cost, has a simple circuit, and is small in size, making it suitable for integration into a super input / output chip.

[0011] As an optional implementation, the control circuit further includes a second adjustment module and a second switch module; the first terminal of the second adjustment module is connected to a status indication signal, the second terminal of the second adjustment module is connected to the controlled terminal of the first switch module and grounded; the controlled terminal of the second switch module is connected to the control module, the first terminal of the second switch module is grounded, and the second terminal of the second switch module is connected to the third terminal of the second adjustment module; wherein, when the control circuit is powered off, the control module is configured to control the second switch module to turn off.

[0012] Based on the aforementioned optional methods, by adding a second adjustment module and a second switch module, when the control circuit is about to be powered down, the first switch module can be actively turned on by turning off the second switch module, forcibly pulling the control signal down to ground. That is, the second adjustment module and the second switch module can actively pull the control signal low at the moment the control circuit is powered down, avoiding safety hazards such as malfunction of the heat dissipation unit or asynchronous power-off during power-down, thus improving the reliability and safety of the chip when it is powered down.

[0013] As an optional implementation, the second adjustment module includes a second level holding unit and a second unidirectional conduction unit; one end of the second level holding unit serves as the first end of the second adjustment module and is connected to a status indication signal, and the other end of the second level holding unit serves as the third end of the second adjustment module and is connected to the second end of the second switch module; the input end of the second unidirectional conduction unit is connected to the other end of the second level holding unit and the second end of the second switch module, and the output end of the second unidirectional conduction unit serves as the second end of the second adjustment module and is connected to the controlled end of the first switch module.

[0014] Based on the above-mentioned optional methods, when the control circuit needs to be powered off, the second level holding unit can achieve a stable pull-up function, ensuring the deterministic turn-off action of the second switch module, thereby ensuring the overall reliability of the control circuit's power-off. Secondly, by setting a second unidirectional conduction unit, only the status indication signal is allowed to be transmitted positively to the first switch module, preventing current or voltage from flowing back from the subsequent stage to the preceding stage, thus improving the overall reliability of the circuit.

[0015] As an optional implementation, the second level holding unit includes a second resistor, and the second unidirectional conduction unit includes a second diode; one end of the second resistor serves as one end of the second level holding unit and is connected to a status indication signal, the other end of the second resistor serves as the other end of the second level holding unit, the anode of the second diode serves as the input terminal of the second unidirectional conduction unit, the other end of the second resistor is connected to the anode of the second diode and the second terminal of the second switching module, and the cathode of the second diode serves as the output terminal of the second unidirectional conduction unit and is connected to the controlled terminal of the first switching module.

[0016] Based on the above-mentioned optional methods, a second resistor is used to achieve pull-up retention, and a second diode enables unidirectional conduction, achieving reliable system shutdown without increasing complexity. Furthermore, it is low-cost, has a simple circuit, and is small in size, making it suitable for integration into a super input / output chip.

[0017] As an optional implementation, the control circuit further includes a third level holding unit, one end of which is connected to the controlled terminal of the first switching module, the second terminal of the first adjustment module, and the second terminal of the second adjustment module, and the other end of which is grounded.

[0018] Based on the above optional methods, when the control circuit is in active control mode, the basic input / output system has been initialized and can be actively controlled. In this mode, the controlled terminal of the first switching module can be pulled low and maintained at a low level by the third level holding unit, so that the first switching module is turned off. The control signal is not pulled down to ground at this time, but is completely controlled by the PWM pin of the control module. That is, at this time, the control module can output control signals to the heat dissipation unit according to the controllable normal logic, so as to make the heat dissipation unit operate. By setting the third level holding unit, the reliability of releasing the control signal can be guaranteed, thereby ensuring the reliability of the control module driving the heat dissipation unit to operate based on the control signal.

[0019] As an optional implementation, the third level holding unit includes a third resistor. One end of the third resistor serves as one end of the third level holding unit and is connected to the controlled terminal of the first switching module, the second terminal of the first adjustment module, and the second terminal of the second adjustment module. The other end of the third resistor serves as the other end of the third level holding unit and is grounded.

[0020] Based on the above options, the pull-down function can be achieved using a third resistor, resulting in a simple structure and low cost.

[0021] As an optional implementation, the first switch module includes at least one first switch, the number of first switches corresponding one-to-one with the number of heat dissipation units; the first end of the first switch is grounded as the first end of the first switch module, the second end of the first switch is connected to the heat dissipation unit and the control module as the second end of the first switch module, and the controlled end of the first switch is connected to the second end of the first adjustment module as the controlled end of the first switch module.

[0022] Based on the above optional methods, the uncontrolled operation state of multiple heat dissipation units can be precisely controlled simultaneously through the first adjustment module and the first switch module, and the control reliability and synchronization are high.

[0023] Secondly, embodiments of this application provide a super input / output chip, which includes at least one heat dissipation unit and a control circuit as described in any optional manner of the first aspect, wherein the control circuit is connected to the heat dissipation unit. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0025] Figure 1 A schematic diagram of a module structure for a super input / output chip provided in an embodiment of this application; Figure 2 A schematic diagram of a control circuit module structure provided in an embodiment of this application; Figure 3 A schematic diagram of the circuit structure of a control circuit provided in an embodiment of this application; Figure 4 A schematic diagram of the circuit structure of another control circuit provided in an embodiment of this application; Figure 5 A schematic diagram of the circuit structure of another control circuit provided in an embodiment of this application; Figure 6 A schematic diagram of the circuit structure of another control circuit provided in an embodiment of this application; Figure 7 This is a schematic diagram of the circuit structure of another control circuit provided in an embodiment of this application.

[0026] The following are explanations of the icon numbers: 1. Heat dissipation unit; 2. Control circuit; 21. First adjustment module; 211. First level holding unit; 212. First unidirectional conduction unit; 22. First switch module; 23. Control module; 24. Second adjustment module; 241. Second level holding unit; 242. Second unidirectional conduction unit; 25. Second switch module; 26. Third level holding unit; R1, first resistor; R2, second resistor; R3, third resistor; D1, first diode; D2, second diode; Q1, first switch; Q2, second switch; FAN_SCTL, first adjustment signal; SIO_FAN_PWM, control signal; SLP_S3_N, second adjustment signal; 3V3, status indication signal. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0028] In the description of this application, it should be understood that if terms such as "upper," "lower," "left," and "right" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, they are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the accompanying drawings are only for illustrative purposes and should not be construed as limiting this application. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0029] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying or suggesting relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0030] In the description of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0031] Currently, computer systems typically include a Super Input / Output (SIO) chip to manage low-speed peripheral interfaces. This SIO chip usually incorporates a heatsink (e.g., a fan) that adjusts its speed in real-time based on system temperature to balance cooling performance and operating noise. For example, the fan speed can be adjusted based on the internal ambient temperature of the Central Processing Unit (CPU) and the SIO chip itself, ensuring effective system cooling while maintaining a reasonable level of noise, thus achieving a balance between cooling performance and user experience.

[0032] However, due to the limitations of the Super I / O chip's hardware architecture and functional definition, its fan control function can only be enabled after the Basic Input / Output System (BIOS) has completed initialization and executed up to the fan control module. Understandably, the Super I / O chip contains a control circuit for adjusting fan speed. After power-on, the Super I / O chip's control circuit first enters the default control mode (i.e., BIOS initialization), and then enters the active control mode (i.e., active control is possible after BIOS initialization). During the transition from the default control mode to the active control mode, the BIOS has not completed its initialization; that is, the BIOS control code has not yet run. At this time, although the fan has received power, it is in an uncontrolled state. During this period, the Super I / O chip's control circuit automatically outputs a pulse width modulation (PWM) square wave signal with a fixed duty cycle (usually 50%) to drive the fan, based on its internal preset hardware default configuration. Only after the Super I / O chip's control circuit enters the active control mode will the fan be under control. In this configuration, during the transition from the default control mode to the active control mode after the super input / output chip's control circuit is powered on, the fan in the related technology is in a state of being powered but uncontrolled, causing the fan to run at high speed uncontrolled. This phenomenon results in a brief but noticeable increase in noise during startup, affecting the user's auditory experience and posing a risk of exceeding noise limits.

[0033] To address these issues, common techniques involve optimizing the BIOS firmware code by inserting fan control logic into the boot process as early as possible to shorten the time window of uncontrolled fan operation. However, this method is limited by differences in boot timing across hardware platforms, the complexity of the BIOS self-test process, and the dependencies between component initialization sequences, limiting its optimization potential and preventing the complete elimination of the uncontrolled phase. Furthermore, due to variations in motherboard design, CPU models, and peripheral device response speeds, this solution exhibits poor compatibility and consistency across multiple platforms, failing to effectively eliminate the aforementioned problems.

[0034] To address this, this application provides a control circuit and a super input / output chip. This circuit can effectively shield the default output control signal of the super input / output chip during the initial power-on phase, thereby preventing the heat dissipation unit from operating at uncontrolled high speed, thus reducing startup noise and improving the user experience.

[0035] The control circuit and super input / output chip provided in this application will be described exemplarily below with reference to the accompanying drawings.

[0036] This application provides a super input / output chip, such as... Figure 1 As shown, the Super POWER chip includes a heat dissipation unit 1 and a control circuit 2, with the heat dissipation unit 1 connected to the control circuit 2. The control circuit 2 is used to adjust the rotation speed of the heat dissipation unit 1 in real time based on the system temperature, such as the internal ambient temperature of the CPU and the Super POWER chip, so as to ensure effective heat dissipation of the system while taking into account the operating noise level, and to achieve a balance between heat dissipation performance and user experience.

[0037] The heat dissipation unit 1 is typically a fan or other heat dissipation structure. The super input / output chip also includes a basic input / output system, other conventional structures, circuits, and devices, which will not be described in detail in this application.

[0038] After power-on, the control circuit 2 of the Super POWER chip first enters the default control mode, and then enters the active control mode. During the transition from the default control mode to the active control mode, to prevent the heat dissipation unit 1 from operating at high speed in an uncontrolled state, which could cause significant noise in the Super POWER chip after power-on, in one example, such as... Figure 2 As shown, the control circuit 2 includes a first adjustment module 21, a first switch module 22, and a control module 23. The first terminal of the first adjustment module 21 is connected to a status indication signal 3V3. The controlled terminal of the first switch module 22 is connected to the second terminal of the first adjustment module 21 and grounded. The first terminal of the first switch module 22 is grounded, and the second terminal of the first switch module 22 is connected to the heat dissipation unit 1. The control module 23 is connected to the third terminal of the first adjustment module 21, the second terminal of the first switch module 22, and the heat dissipation unit 1.

[0039] It is worth noting that the status indicator signal 3V3 is a power status indicator signal for the electronic device. When the status indicator signal 3V3 is present, it indicates that the electronic device has a power supply voltage, which can be 3V3, i.e., 3.3V (volts). The power supply voltage can also be 5V, in which case the corresponding status indicator signal is 5V. The illustration only uses the status indicator signal 3V3 as an example. The specific setting can be made according to actual needs, and this application does not impose specific restrictions on it.

[0040] When the control circuit 2 is operating normally, the control module 23 outputs a control signal SIO_FAN_PWM to the heat dissipation unit 1, and the heat dissipation unit 1 operates based on this control signal SIO_FAN_PWM. When it is necessary to change the rotation speed of the heat dissipation unit 1, the control module 23 can adjust the duty cycle of the control signal SIO_FAN_PWM to change the rotation speed of the heat dissipation unit 1 accordingly, so as to achieve a balance between heat dissipation performance and operating noise.

[0041] It is worth noting that when control circuit 2 is in the default control mode, the basic input / output system has not completed its initialization. In this mode, control module 23 will output a control signal SIO_FAN_PWM to heat dissipation unit 1 by default. This control signal SIO_FAN_PWM is the default control signal output by the super input / output chip. At this time, the control signal SIO_FAN_PWM is a square wave signal automatically output to heat dissipation unit 1 by control circuit 2 according to its internal preset hardware default configuration. The duty cycle of this control signal SIO_FAN_PWM is 50% by default. This control signal SIO_FAN_PWM will also drive heat dissipation unit 1 to operate, that is, cause heat dissipation unit 1 to operate at high speed in an uncontrolled state.

[0042] Therefore, when control circuit 2 is in the default control mode, control module 23 is configured to control the first switch module 22 to conduct via the first adjustment module 21. Specifically, control module 23 outputs a first adjustment signal FAN_SCTL to the first adjustment module 21, which can be either a high-level or low-level signal. When control circuit 2 is in the default control mode, control module 23 outputs a high-level first adjustment signal FAN_SCTL to the first adjustment module 21. This high-level signal FAN_SCTL is pulled up by the first adjustment module 21 and then output to the controlled terminal of the first switch module 22, thus turning on the first switch module 22. After the first switch module 22 is turned on, its first and second terminals are connected to pull down the control signal SIO_FAN_PWM output by control module 23 to ground.

[0043] Understandably, in the default control mode, pulling the control signal SIO_FAN_PWM to ground disables the 50% duty cycle control signal output by the control module 23, which in turn disables the default control signal output from the super input / output chip to the heat dissipation unit 1. In this state, the heat dissipation unit 1 will not rotate even when powered on. This achieves the goal of disabling the default control signal SIO_FAN_PWM in the default control mode of the control circuit 2, preventing the heat dissipation unit 1 from operating at high speed in an uncontrolled state. This improves the brief but noticeable noise surge during startup, enhances the user's auditory experience, and avoids the risk of excessive noise.

[0044] When control circuit 2 is in active control mode, the basic input / output system has been initialized and can be actively controlled. In this mode, to ensure the controlled operation of heat dissipation unit 1, control module 23 is configured to control the first switch module 22 to turn off via the first adjustment module 21. Specifically, when control circuit 2 is in active control mode, control module 23 outputs a low-level first adjustment signal FAN_SCTL to the first adjustment module 21. The low-level first adjustment signal FAN_SCTL is output to the controlled terminal of the first switch module 22 via the first adjustment module 21, causing the first switch module 22 to turn off. After the first switch module 22 is turned off, the first terminal and the second terminal of the first switch module 22 are disconnected. The control signal SIO_FAN_PWM is not pulled down to ground at this time, but is completely controlled by the PWM pin of control module 23. That is, at this time, control module 23 can output the control signal SIO_FAN_PWM to heat dissipation unit 1 according to controllable normal logic to make heat dissipation unit 1 operate.

[0045] In the default control mode and the active control mode, the first adjustment signal FAN_SCTL needs to be set to opposite levels, and this setting needs to be combined with the conduction characteristics of the first switch module 22. For example, if the conduction characteristic of the first switch module 22 is high-level conduction and low-level cutoff, the first adjustment signal FAN_SCTL in the default control mode is set to high level, and the first adjustment signal FAN_SCTL in the active control mode is set to low level. Conversely, if the conduction characteristic of the first switch module 22 is low-level conduction and high-level cutoff, the first adjustment signal FAN_SCTL in the default control mode is set to low level, and the first adjustment signal FAN_SCTL in the active control mode is set to high level. The specific settings can be configured according to actual needs, and this application does not impose specific restrictions on this.

[0046] It is worth noting that in the default control mode, the initialization time of the basic input / output system is extremely short (e.g., usually less than a few seconds). During this period, the system generates very little heat, and stopping the cooling unit 1 at this time will not cause any risk of overheating. After the basic input / output system initialization is complete, the cooling unit 1 will immediately engage temperature feedback closed-loop control to ensure heat dissipation safety during operation. In other words, the above scheme achieves a good balance between quiet operation and heat dissipation safety.

[0047] Thus, when the control circuit 2 is in the default control mode, the control module 23 in this application controls the first switch module 22 to turn on via the first adjustment module 21, thereby pulling down the control signal SIO_FAN_PWM with a 50% duty cycle output by the control module 23 to ground. By pulling down, the default control signal SIO_FAN_PWM is shielded, preventing the heat dissipation unit 1 from operating at high speed in an uncontrolled state. This effectively shields the fixed duty cycle control signal SIO_FAN_PWM output by the control circuit 2 itself at the initial stage of system power-on, effectively shielding the fixed duty cycle control signal output by the super input / output chip, avoiding uncontrolled high-speed operation of the heat dissipation unit 1, thereby significantly reducing startup noise, reducing the risk of excessive noise, and improving the user experience. Secondly, when the control circuit 2 is in the active control mode, the control module 23 controls the first switch module 22 to turn off via the first adjustment module 21, restoring the normal output path of the control signal SIO_FAN_PWM, allowing the heat dissipation unit 1 to enter a controlled speed regulation state. Once the basic input / output system of the super input / output chip is ready, it can seamlessly switch to normal speed regulation mode, achieving a smooth transition of heat dissipation unit 1 from "silent start" to "intelligent speed regulation", achieving a good balance between quiet operation and heat dissipation safety.

[0048] Furthermore, this application employs an intervention mechanism combining software (control module 23) and hardware circuits (i.e., the first adjustment module 21 and the first switch module 22), which does not rely on the basic input / output system startup timing or firmware updates. It can be universally deployed on different motherboard platforms and different CPU architectures, significantly improving the portability and compatibility of the solution and reducing development and verification costs.

[0049] For example, the control circuit 2 provided in the embodiments of this application will be described below with the first switch module 22 having a high-level conduction characteristic and a low-level cutoff characteristic.

[0050] In one example, such as Figure 3As shown, the first adjustment module 21 includes a first level holding unit 211 and a first unidirectional conduction unit 212. One end of the first level holding unit 211 serves as the first terminal of the first adjustment module 21, receiving a status indication signal. The other end of the first level holding unit 211 serves as the third terminal of the first adjustment module 21, connected to the control module 23. The input terminal of the first unidirectional conduction unit 212 is connected to the other end of the first level holding unit 211, and the output terminal of the first unidirectional conduction unit 212 serves as the second terminal of the first adjustment module 21, connected to the controlled terminal of the first switch module 22 and grounded.

[0051] The first unidirectional conduction unit 212 is located between the first level holding unit 211 and the controlled terminal of the first switch module 22. Its function is to only allow the first adjustment signal FAN_SCTL to be transmitted in the positive direction, that is, to be output from the first level holding unit 211 to the first switch module 22, and to prevent current or voltage from flowing back from the back stage to the front stage circuit.

[0052] For example, when the control circuit 2 is in the default control mode, the high-level first adjustment signal FAN_SCTL output by the control module 23 is pulled up to the status indication signal 3V3 via the first level holding unit 211, and then output to the first switch module 22 via the first unidirectional conduction unit 212 to turn on the first switch module 22. At this time, by pulling up the high-level first adjustment signal FAN_SCTL to the status indication signal 3V3, it can be ensured that even if the first adjustment signal FAN_SCTL output by the control module 23 has fluctuations or insufficient driving capability, a high-level drive signal with stable amplitude and strong noise suppression capability can still be provided to the controlled terminal of the first switch module 22. This significantly improves the reliability of the first switch module 22's conduction and effectively reduces the operating noise of the heat dissipation unit 1.

[0053] For example, when the control circuit 2 is in active control mode, the control module 23 outputs a low-level first adjustment signal FAN_SCTL. At this time, the first level holding unit 211 stops pulling up. The low-level first adjustment signal FAN_SCTL is output to the first switch module 22 via the first unidirectional conduction unit 212, so that the first switch module 22 is turned off, thereby releasing the control signal SIO_FAN_PWM.

[0054] In this example, when the control circuit 2 is in the default control mode, the first level holding unit 211 can provide a high-level drive signal with stable amplitude and strong noise suppression capability to the controlled terminal of the first switching module 22, thereby significantly improving the reliability of the first switching module 22's conduction and effectively reducing the operating noise of the heat dissipation unit 1. Secondly, by setting the first unidirectional conduction unit 212, only the first adjustment signal FAN_SCTL is allowed to be transmitted positively to the first switching module 22, preventing current or voltage from flowing back from the subsequent stage to the preceding stage circuit, thus improving the overall reliability of the circuit.

[0055] Optional, such as Figure 3 As shown, the first level holding unit 211 may include a first resistor R1, and the first unidirectional conduction unit 212 may include a first diode D1. One end of the first resistor R1 serves as one end of the first level holding unit 211, connected to the status indication signal 3V3. The other end of the first resistor R1 serves as the other end of the first level holding unit 211. The anode of the first diode D1 serves as the input terminal of the first unidirectional conduction unit 212. The other end of the first resistor R1 is connected to the control module 23 and the anode of the first diode D1. The cathode of the first diode D1 serves as the output terminal of the first unidirectional conduction unit 212, connected to the controlled terminal of the first switch module 22.

[0056] In this circuit, the first resistor R1 acts as a pull-up resistor, pulling the first adjustment signal FAN_SCTL up to the status indicator signal 3V3. This creates a valid drive level when the control module 32 outputs a high-level first adjustment signal FAN_SCTL. This achieves the level-holding function without the need for additional active components (such as switch buffers), resulting in a simple circuit structure. Even when the drive capability of the control module 23 is insufficient, the first resistor R1 still ensures that the subsequent switch receives a sufficiently high logic "1" level, preventing misjudgments due to voltage drop.

[0057] The first diode D1 has unidirectional conductivity, enabling forced signal flow control from the front-end circuit to the back-end circuit. Specifically, when the first adjustment signal FAN_SCTL is high, the first diode D1 is forward biased and conducts. At this time, the status indication signal 3V3 provides an enable signal to the first switch module 22 through the first resistor R1 and the first diode D1. When the first adjustment signal FAN_SCTL is low, the first diode D1 is reverse biased and cut off, completely cutting off the influence of the status indication signal 3V3 on the controlled terminal of the first switch module 22, ensuring a rapid and thorough turn-off action. Furthermore, the first diode D1 also has the function of preventing reverse current flow, improving the reliability of the control module 23.

[0058] In this example, pull-up holding is achieved through the first resistor R1, and unidirectional conduction is achieved through the first diode D1. Without increasing complexity, this solves the problems of insufficient driving capability, reverse interference, and unstable voltage levels inherent in direct drive methods. Furthermore, it is low-cost, has a simple circuit, and is small in size, making it suitable for integration into super input / output chips.

[0059] It is worth noting that the first level holding unit 211 and the first unidirectional conduction unit 212 can also be other circuits or devices that can achieve the above functions. This application does not impose specific restrictions on this.

[0060] To enable control circuit 2 to quickly power down, in one example, such as Figure 4 As shown, the control circuit 2 also includes a second adjustment module 24 and a second switch module 25. The first terminal of the second adjustment module 24 is connected to a status indication signal 3V3, and the second terminal of the second adjustment module 24 is connected to the controlled terminal of the first switch module 22 and grounded. The controlled terminal of the second switch module 25 is connected to the control module 23, the first terminal of the second switch module 25 is grounded, and the second terminal of the second switch module 25 is connected to the third terminal of the second adjustment module 24.

[0061] In this example, control module 23 outputs a second adjustment signal SLP_S3_N to second switch module 25. When control circuit 2 is powered on, control module 23 outputs the corresponding second adjustment signal SLP_S3_N to second switch module 25, causing second switch module 25 to conduct. It is worth noting that at this time, second adjustment module 24 shields the signal after second switch module 25 to prevent interference from the switching on / off state of first switch module 22 caused by the switching on / off state of second switch module 25.

[0062] When the control circuit 2 is powered down, the control module 23 is configured to output a corresponding second adjustment signal SLP_S3_N to the second switch module 25, causing the second switch module 25 to turn off. After the second switch module 25 is turned off, the status indication signal 3V3 is output to the first switch module 22 via the second adjustment module 24, causing the first switch module 22 to turn on, thereby pulling the control signal SIO_FAN_PWM to ground, causing the heat dissipation unit 1 to stop operating.

[0063] Thus, by adding a second adjustment module 24 and a second switch module 25, when the control circuit 2 is about to be powered down, the first switch module 22 can be actively turned on by turning off the second switch module 25, forcibly pulling the control signal SIO_FAN_PWM down to ground. That is, the second adjustment module 24 and the second switch module 25 can actively pull the control signal SIO_FAN_PWM low at the moment the control circuit 2 is powered down, avoiding safety hazards such as malfunction of the heat dissipation unit 1 or asynchronous power-off during power-down, thereby improving the reliability and safety of the chip when it is powered down.

[0064] Specifically, when the control circuit 2 is powered on and off, the second adjustment signal SLP_S3_N needs to be set to opposite levels, and this setting needs to be combined with the conduction characteristics of the second switch module 25. For example, if the conduction characteristic of the second switch module 25 is high-level conduction and low-level cutoff, the second adjustment signal SLP_S3_N is set to high level when the control circuit 2 is powered on and low level when the control circuit 2 is powered off. Conversely, if the conduction characteristic of the second switch module 25 is low-level conduction and high-level cutoff, the second adjustment signal SLP_S3_N is set to low level when the control circuit 2 is powered on and high level when the control circuit 2 is powered off. The specific settings can be configured according to actual needs, and this application does not impose specific limitations on this.

[0065] In one example, such as Figure 5 As shown, the second adjustment module 24 includes a second level holding unit 241 and a second unidirectional conduction unit 242. One end of the second level holding unit 241 serves as the first end of the second adjustment module 24, connected to a status indication signal 3V3. The other end of the second level holding unit 241 serves as the third end of the second adjustment module 24, connected to the second end of the second switch module 25. The input end of the second unidirectional conduction unit 242 is connected to the other end of the second level holding unit 241 and the second end of the second switch module 25. The output end of the second unidirectional conduction unit 242 serves as the second end of the second adjustment module 24, connected to the controlled end of the first switch module 22.

[0066] The second unidirectional conduction unit 242 is located between the second level holding unit 241 and the controlled terminal of the first switch module 22. Its function is to allow only the status indication signal 3V3 to be transmitted to the first switch module 22 in the positive direction, and to prevent current or voltage from flowing back from the back stage to the front stage circuit.

[0067] For example, when the control circuit 2 is powered on, the control module 23 outputs a corresponding second adjustment signal SLP_S3_N to the second switch module 25, causing the second switch module 25 to conduct. At this time, the second unidirectional conduction unit 242 shields the signal after the second switch module 25, preventing the switching of the first switch module 22 from being interfered with by the switching of the second switch module 25.

[0068] When the control circuit 2 is powered down, the control module 23 is configured to output a corresponding second adjustment signal SLP_S3_N to the second switch module 25, causing the second switch module 25 to turn off. After the second switch module 25 is turned off, the status indicator signal 3V3 is output to the first switch module 22 via the second adjustment module 24, causing the first switch module 22 to turn on, thereby pulling the control signal SIO_FAN_PWM to ground, causing the heat dissipation unit 1 to stop operating.

[0069] In this example, when the control circuit 2 needs to be powered off, the second level holding unit 241 can achieve a stable pull-up function, ensuring the deterministic shutdown action of the second switch module 25, thereby guaranteeing the overall reliability of the power-off of the control circuit 2. Secondly, by setting the second unidirectional conduction unit 242, only the status indication signal 3V3 is allowed to be transmitted positively to the first switch module 22, preventing current or voltage from flowing back from the subsequent stage to the preceding stage, thus improving the overall reliability of the circuit.

[0070] Optional, such as Figure 5 As shown, the second level holding unit 241 includes a second resistor R2, and the second unidirectional conduction unit 242 includes a second diode D2. One end of the second resistor R2 serves as one end of the second level holding unit 241, connected to a status indication signal; the other end of the second resistor R2 serves as the other end of the second level holding unit 241; the anode of the second diode D2 serves as the input terminal of the second unidirectional conduction unit 242; the other end of the second resistor R2 is connected to the anode of the second diode D2 and the second terminal of the second switch module 25; and the cathode of the second diode D2 serves as the output terminal of the second unidirectional conduction unit 242, connected to the controlled terminal of the first switch module 22.

[0071] In this circuit, the second resistor R2 acts as a pull-up resistor, ensuring that the status indicator signal 3V3 reaches a valid drive level when the control module 32 outputs a low-level second adjustment signal SLP_S3_N. The second diode D2, with its unidirectional conductivity, enables forced signal flow control from the front-end circuit to the rear-end circuit. Specifically, when the second switch module 25 is turned on, the second diode D2 is forward-biased and conducts. At this time, the second diode D2 shields the signal after the second switch module 25, preventing interference from the on / off state of the first switch module 22 caused by the on / off state of the second switch module 25.

[0072] In this example, a pull-up resistor R2 is used to maintain the circuit, and a second diode D2 enables unidirectional conduction, achieving reliable system shutdown without increasing complexity. Furthermore, it is low-cost, has a simple circuit, and is small in size, making it suitable for integration into a super input / output chip.

[0073] It is worth noting that the second level holding unit 241 and the second unidirectional conduction unit 242 can also be selected from other circuits or devices that can achieve the above functions. This application does not impose specific restrictions on this.

[0074] It is worth noting that before the control circuit 2 is powered on, the second switch module 25 needs to be kept off. That is, the second adjustment signal SLP_S3_N is at a low level before power-on, so that the second switch module 25 is turned off. The second resistor R2 pulls up to the first switch module 22 through the second diode D2, so that the first switch module 22 is turned on, thereby pulling the control signal SIO_FAN_PWM down to ground.

[0075] In one example, such as Figure 6 As shown, the control circuit 2 also includes a third level holding unit 26. One end of the third level holding unit 26 is connected to the controlled end of the first switch module 22, the second end of the first adjustment module 21, and the second end of the second adjustment module 24. The other end of the third level holding unit 26 is grounded.

[0076] In this example, with control circuit 2 in active control mode, the basic input / output system has been initialized and is ready for active control. In this mode, the third level holding unit 26 pulls the controlled terminal of the first switch module 22 low to maintain a low level, thus turning off the first switch module 22. The control signal SIO_FAN_PWM is not pulled to ground at this time, but is entirely controlled by the PWM pin of control module 23. That is, at this time, control module 23 can output the control signal SIO_FAN_PWM to heat dissipation unit 1 according to controllable normal logic, causing heat dissipation unit 1 to operate. By setting the third level holding unit 26, the reliability of releasing the control signal SIO_FAN_PWM can be guaranteed, thereby ensuring the reliability of control module 23 driving heat dissipation unit 1 based on the control signal SIO_FAN_PWM.

[0077] In one example, such as Figure 6 As shown, the third level holding unit 26 includes a third resistor R3. One end of the third resistor R3 serves as one end of the third level holding unit 26 and is connected to the controlled end of the first switch module 22, the second end of the first adjustment module 21, and the second end of the second adjustment module 24. The other end of the third resistor R3 serves as the other end of the third level holding unit 26 and is grounded.

[0078] In this example, the pull-down function can be achieved using the third resistor R3, resulting in a simple structure and low cost. Other devices capable of performing the above functions can also be used for the third level holding unit 26; this application does not impose specific limitations on this.

[0079] In one example, please refer to Figure 6 and Figure 7 As shown, the first switch module 22 includes at least one first switch Q1, and the number of first switches Q1 corresponds one-to-one with the number of heat dissipation units 1.

[0080] For example, Figure 6 Taking a super input / output chip including a heat dissipation unit 1 and a first switch module 22 including a first switch Q1 as an example. The first end of the first switch Q1 is grounded as the first end of the first switch module 22, the second end of the first switch Q1 is connected to the heat dissipation unit and the control module 23 as the second end of the first switch module 22, and the controlled end of the first switch Q1 is connected to the second end of the first adjustment module 21 as the controlled end of the first switch module 22.

[0081] For example, Figure 7 Taking a super input / output chip including two heat dissipation units 1 and a first switch module 22 including two first switches Q1 as an example. The first terminals of the two first switches Q1 are grounded as the first terminals of the first switch module 22, the second terminals of the two first switches Q1 are connected to the heat dissipation units 1 and the control module 23 as the second terminals of the first switch module 22, and the controlled terminals of the two first switches Q1 are connected to the second terminals of the first adjustment module 21 as the controlled terminals of the first switch module 22.

[0082] In this example, such as Figure 7 As shown, the second terminal of the first switch Q1 is connected to the control module 23 via the fourth resistor R4.

[0083] It is worth noting that the super input / output chip may also include other numbers of heat dissipation units 1, and the first switch module 22 may also be configured with a corresponding number of first switches Q1, which can be set according to actual needs. For example, if manufacturing costs are to be saved, only one heat dissipation unit 1 and one first switch Q1 may be set. As another example, if the heat dissipation effect is to be improved, multiple heat dissipation units 1 and multiple first switches Q1 may be set. This application does not impose specific limitations on this.

[0084] In this example, the first adjustment module 21 and the first switch module 22 can simultaneously and precisely control the uncontrolled operation of multiple heat dissipation units 1, and the control reliability and synchronization are high.

[0085] Optionally, the second switch module 25 may include a second switch Q2. The first switch Q1 and the second switch Q2 may be an N-type metal-oxide-semiconductor (NMOS) field-effect transistor, a P-type metal-oxide-semiconductor (PMOS) field-effect transistor, an insulated gate bipolar transistor (IGBT), a transistor, a relay circuit, or other devices or circuits capable of switching on and off (such as logic gate circuits). This application does not impose specific limitations on this.

[0086] Optionally, the resistance values ​​of the first resistor R1 and the second resistor R2 can be set to 10kΩ, the resistance value of the third resistor R3 can be set to 100kΩ, and the resistance value of the fourth resistor R4 can be set to 330Ω. The first diode D1 and the second diode D2 can be Schottky diodes. The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 can be set according to actual needs. The first diode D1 and the second diode D2 can also be selected according to actual needs; this application does not impose specific restrictions on this.

[0087] Optionally, the aforementioned control signal SIO_FAN_PWM, the first adjustment signal FAN_SCTL, and the second adjustment signal SLP_S3_N can be provided by the same general purpose input / output (GPIO) interface of the same control module 23, or they can be provided by different control modules 23. The control module 23 can be an embedded controller (EC), a microcontroller unit (MCU), a complex programmable logic device (CPLD), a CPU, or other controllers capable of outputting the aforementioned signals. This application does not impose specific limitations on this.

[0088] For example, after the BIOS starts running, the control module 23 can be the BIOS itself, that is, the BIOS outputs the first adjustment signal FAN_SCTL. Alternatively, the control module 23 can also be other controllers, such as GPIO controlled by the main chip, which does not need to be bound to SIO for output. This application does not impose specific limitations on this.

[0089] In summary, when the control circuit 2 is in the default control mode, the control module 23 in this application controls the first switch module 22 to turn on via the first adjustment module 21, thereby pulling down the control signal SIO_FAN_PWM with a 50% duty cycle output by the control module 23 to ground. By pulling down, the default control signal SIO_FAN_PWM is shielded, preventing the heat dissipation unit 1 from operating at high speed in an uncontrolled state. This effectively shields the fixed duty cycle control signal SIO_FAN_PWM output by the control circuit 2 itself at the initial stage of system power-on, effectively shielding the fixed duty cycle control signal output by the super input / output chip, avoiding uncontrolled high-speed operation of the heat dissipation unit 1, thus significantly reducing startup noise, reducing the risk of excessive noise, and improving the user experience. Secondly, when the control circuit 2 is in the active control mode, the control module 23 controls the first switch module 22 to turn off via the first adjustment module 21, restoring the normal output path of the control signal SIO_FAN_PWM, allowing the heat dissipation unit 1 to enter a controlled speed regulation state. Once the basic input / output system of the super input / output chip is ready, it can seamlessly switch to normal speed regulation mode, achieving a smooth transition of heat dissipation unit 1 from "silent start" to "intelligent speed regulation", achieving a good balance between quiet operation and heat dissipation safety.

[0090] Furthermore, this application employs an intervention mechanism combining software (control module 23) and hardware circuits (i.e., the first adjustment module 21 and the first switch module 22), which does not rely on the basic input / output system startup timing or firmware updates. It can be universally deployed on different motherboard platforms and different CPU architectures, significantly improving the portability and compatibility of the solution and reducing development and verification costs.

[0091] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A control circuit, characterized in that, The control circuit includes: A first adjustment module, wherein a status indication signal is connected to a first end of the first adjustment module; A first switching module, wherein the controlled terminal of the first switching module is connected to the second terminal of the first adjustment module and grounded, the first terminal of the first switching module is grounded, and the second terminal of the first switching module is connected to a heat dissipation unit; and... A control module, which is connected to the third terminal of the first adjustment module, the second terminal of the first switch module, and the heat dissipation unit; Wherein, when the control circuit is in the default control mode, the control module is configured to control the first switch module to be turned on via the first adjustment module; When the control circuit is in active control mode, the control module is configured to control the first switch module to turn off via the first adjustment module.

2. The control circuit according to claim 1, characterized in that, The first adjustment module includes: A first level holding unit, one end of which serves as the first terminal of the first adjustment module and is connected to the status indication signal; the other end of which serves as the third terminal of the first adjustment module and is connected to the control module; and... The first unidirectional conduction unit has its input terminal connected to the other end of the first level holding unit, and its output terminal serves as the second terminal of the first adjustment module, connected to the controlled terminal of the first switch module and grounded.

3. The control circuit according to claim 2, characterized in that, The first level holding unit includes a first resistor, and the first unidirectional conduction unit includes a first diode; One end of the first resistor serves as one end of the first level holding unit and is connected to the status indication signal. The other end of the first resistor serves as the other end of the first level holding unit. The anode of the first diode serves as the input terminal of the first unidirectional conduction unit. The other end of the first resistor is connected to the control module and the anode of the first diode. The cathode of the first diode serves as the output terminal of the first unidirectional conduction unit, is connected to the controlled terminal of the first switch module, and is grounded.

4. The control circuit according to claim 1, characterized in that, The control circuit also includes: A second adjustment module, wherein a first terminal of the second adjustment module is connected to the status indication signal, and a second terminal of the second adjustment module is connected to and grounded to the controlled terminal of the first switch module; and, The second switch module has its controlled terminal connected to the control module, its first terminal grounded, and its second terminal connected to the third terminal of the second adjustment module. When the control circuit is powered off, the control module is configured to control the second switch module to turn off.

5. The control circuit according to claim 4, characterized in that, The second adjustment module includes: A second level holding unit, one end of which serves as the first terminal of the second adjustment module and is connected to the status indication signal; the other end of which serves as the third terminal of the second adjustment module and is connected to the second terminal of the second switch module; and, The second unidirectional conduction unit has its input terminal connected to the other end of the second level holding unit and the second terminal of the second switch module. The output terminal of the second unidirectional conduction unit serves as the second terminal of the second adjustment module and is connected to the controlled terminal of the first switch module.

6. The control circuit according to claim 5, characterized in that, The second level holding unit includes a second resistor, and the second unidirectional conduction unit includes a second diode; One end of the second resistor serves as one end of the second level holding unit and is connected to the status indication signal. The other end of the second resistor serves as the other end of the second level holding unit. The positive terminal of the second diode serves as the input terminal of the second unidirectional conduction unit. The other end of the second resistor is connected to the positive terminal of the second diode and the second terminal of the second switch module. The negative terminal of the second diode serves as the output terminal of the second unidirectional conduction unit and is connected to the controlled terminal of the first switch module.

7. The control circuit according to claim 4, characterized in that, The control circuit also includes: The third level holding unit has one end connected to the controlled terminal of the first switch module, the second terminal of the first adjustment module, and the second terminal of the second adjustment module, and the other end grounded.

8. The control circuit according to claim 7, characterized in that, The third level holding unit includes: The third resistor has one end serving as one end of the third level holding unit, which is connected to the controlled end of the first switch module, the second end of the first adjustment module, and the second end of the second adjustment module. The other end of the third resistor serves as the other end of the third level holding unit and is grounded.

9. The control circuit according to any one of claims 1-8, characterized in that, The first switch module includes at least one first switch, and the number of the first switches corresponds one-to-one with the number of the heat dissipation units; The first terminal of the first switch is grounded as the first terminal of the first switch module, the second terminal of the first switch is connected to the heat dissipation unit and the control module, and the controlled terminal of the first switch is connected to the second terminal of the first adjustment module.

10. A super input / output chip, characterized in that, The super input / output chip includes: At least one heat dissipation unit; and, The control circuit as described in any one of claims 1-9, wherein the control circuit is connected to the heat dissipation unit.

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