A sleep control system supporting both CAN and LIN
Patent Information
- Application Number
- CN202522779272.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-29
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2035-12-29
AI Technical Summary
这对MCU的IO口资源有限的系统来说，造成了设计上的限制和困难
其一，本实用新型通过设计PORTA端口并联连接CAN收发器EN引脚与LIN收发器SLP_N引脚、PORTB端口单独连接CAN收发器STB_N引脚，仅需2个IO口即可实现双总线的睡眠模式控制，直接为MCU节约1个宝贵的端口资源，拓宽适用范围；
Smart Images
Figure CN224907251U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the technical field of automotive electronics, and more specifically, it relates to a sleep control system that simultaneously supports CAN and LIN. Background Technology
[0002] In automotive electronic systems, CAN (Controller Area Network) and LIN (Local Interconnect Network) buses are widely used for communication and control. To reduce power consumption, many CAN and LIN transceivers support sleep mode, entering a low-power state when communication is not needed and resuming from sleep mode by receiving a wake-up signal.
[0003] In the existing technology, commonly used CAN transceivers and LIN transceivers both provide sleep mode functionality. CAN transceivers switch modes via the STB_N pin and the EN pin, while LIN transceivers control sleep mode via the SLP_N pin.
[0004] However, existing technologies have some shortcomings. When a system needs to support both CAN and LIN sleep simultaneously, at least three independent I / O ports are required to control the states of the CAN and LIN transceivers separately. This imposes design limitations and difficulties for systems with limited MCU I / O resources. Furthermore, multiple independent control pins increase hardware complexity and lead to resource waste, failing to efficiently utilize the limited pins of the MCU. Utility Model Content
[0005] In view of the shortcomings of the existing technology, the purpose of this utility model is to provide a sleep control system that supports both CAN and LIN, which has the advantages of saving MCU pin resources and unified power supply control of dual buses.
[0006] The above-mentioned technical objective of this utility model is achieved through the following technical solution: a sleep control system that simultaneously supports CAN and LIN, comprising: an MCU chip, a CAN transceiver, a LIN transceiver, and a power module. The MCU chip is configured with two output I / O ports, namely PORTA and PORTB. The EN pin of the CAN transceiver and the SLP_N pin of the LIN transceiver are connected in parallel to the PORTA port, and the STB_N pin of the CAN transceiver is connected to the PORTB port to receive the level signal output by the MCU chip. The INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are connected in parallel to the wake-up control terminal of the power module to control its power supply.
[0007] In one embodiment, the CANH pin and CANL pin of the CAN transceiver are both electrically connected to the CAN bus for transmitting CAN signals; The CAN0_RX port of the MCU chip is electrically connected to the RXD pin of the CAN transceiver, and the CAN0_TX port of the MCU chip is electrically connected to the TXD pin of the CAN transceiver, so as to realize the signal interaction between the MCU chip and the CAN bus.
[0008] In one embodiment, the LIN pin of the LIN transceiver is electrically connected to the LIN bus for transmitting LIN signals; The LIN_RX port of the MCU chip is electrically connected to the RXD pin of the LIN transceiver, and the LIN_TX port of the MCU chip is electrically connected to the TXD pin of the LIN transceiver, so as to realize the signal interaction between the MCU chip and the LIN bus.
[0009] In one embodiment, the wake-up control terminal of the power module is electrically connected to a common signal node, and the INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are both electrically connected in parallel to the common signal node.
[0010] In one embodiment, a transistor is connected in series between the common signal node and the wake-up control terminal of the power module. The common signal node is electrically connected to the base of the transistor, the collector of the transistor is electrically connected to the wake-up control terminal of the power module, and the emitter of the transistor is grounded.
[0011] In one embodiment, the WAKE pin of the CAN transceiver and the WAKE pin of the LIN transceiver are electrically connected to the WAKE signal terminal of the vehicle to realize the interaction of the vehicle wake-up signal.
[0012] In one embodiment, the power module includes a power input unit, a DC conversion circuit, and a power output unit; The power input unit is electrically connected to the vehicle power supply. The DC conversion circuit is electrically connected between the power input unit and the power output unit. The output terminal of the power output unit is electrically connected to the power pin of the external control module. The INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are connected in parallel to the control terminal of the DC conversion circuit.
[0013] The aforementioned sleep control system that simultaneously supports CAN and LIN has the following beneficial effects: Firstly, this utility model designs a parallel connection between the CAN transceiver EN pin and the LIN transceiver SLP_N pin via the PORTA port, and a separate connection between the CAN transceiver STB_N pin via the PORTB port. This allows for dual-bus sleep mode control with only two I / O ports, directly saving one valuable port resource for the MCU and broadening its applicability. Secondly, the aforementioned port multiplexing structure supports the ordered control logic of "CAN transceiver entering sleep mode first, followed by LIN transceiver entering sleep mode later". CAN sleep mode can be triggered by a low level on PORTB port for a duration longer than the CAN transceiver delay time. After an adaptation interval, a low level on PORTA port for a duration longer than the LIN transceiver delay time can trigger LIN sleep mode. No additional control components are required, achieving "step-by-step, conflict-free" sleep control for the dual buses, maximizing the reduction of standby power consumption while ensuring system stability. Attached Figure Description
[0014] Figure 1 This is a schematic diagram showing the connection relationship of the various components of this utility model; Figure 2 This is a schematic diagram of the sleep triggering sequence and mode switching of this utility model; Figure 3 This is a schematic diagram of the hardware circuit of the power module and CAN / LIN transceiver of this utility model; Figure 4 This is the system functional logic block diagram of this utility model. Detailed Implementation
[0015] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.
[0016] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.
[0017] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "a plurality of" means at least two, unless otherwise explicitly specified.
[0018] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.
[0019] In this utility model, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0020] A sleep control system that supports both CAN and LIN, such as Figure 1 and Figure 3 As shown, it includes: MCU chip, CAN transceiver, LIN transceiver and power module; The MCU chip is configured with two output I / O ports, namely PORTA and PORTB. The EN pin of the CAN transceiver and the SLP_N pin of the LIN transceiver are connected in parallel to the PORTA port, and the STB_N pin of the CAN transceiver is connected to the PORTB port to receive the level signal output by the MCU chip. The INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are connected in parallel to the wake-up control terminal of the power module to control its power supply.
[0021] This invention achieves dual-bus sleep control and power supply linkage through simplified hardware connections. Specifically, the MCU chip is configured with two output I / O ports. Port PORTA is directly branched via a wire and connected to both the EN pin of the CAN transceiver and the SLP_N pin of the LIN transceiver. Port PORTB is connected to the STB_N pin of the CAN transceiver via a separate wire. With this configuration, only two I / O ports need to output level signals to synchronously trigger the CAN transceiver and LIN transceiver into sleep mode, significantly saving MCU pin resources.
[0022] Combination Figure 2 The timing logic of this invention, through precise level timing control, enables the CAN transceiver and LIN transceiver to sequentially enter sleep mode. The specific process is as follows: In the initial working state, both PORTA and PORTB ports of the MCU output a high level: at this time, the EN pin (connected to PORTA) of the CAN transceiver is at a high level and the STB_N pin (connected to PORTB) is at a high level, satisfying the normal mode conditions of "EN=H, STB_N=H"; the SLP_N pin (connected to PORTA) of the LIN transceiver is at a high level, satisfying the normal mode condition of "SLP_N=1". Therefore, both the CAN transceiver and the LIN transceiver are in normal working mode.
[0023] When the system needs to enter sleep mode, first keep the high-level output of PORTA unchanged, then switch PORTB to low level, and maintain this low level for a time t greater than the delay time t. h At this time, the STB_N pin level of the CAN transceiver changes to L, satisfying the sleep trigger condition of "EN=H, STB_N=L", and the CAN transceiver switches from normal mode to sleep mode.
[0024] After the CAN transceiver completes the mode switch, the PORTA port is switched to a low level (there is an interval between switching PORTA and switching PORTB), and this low level is maintained for a time t greater than the delay time t. gotosleep At this time, the SLP_N pin level of the LIN transceiver becomes 0, which satisfies the sleep trigger condition of "SLP_N=0", and the LIN transceiver synchronously switches from normal mode to sleep mode.
[0025] By using this timing logic of "first controlling PORTB to trigger CAN sleep, then controlling PORTA to trigger LIN sleep", orderly sleep switching between the two transceivers can be achieved, avoiding mode conflicts and ensuring the stability of the switching process.
[0026] In this embodiment, the CAN transceiver is preferably a TJA1043 type transceiver, and the LIN transceiver is preferably a TJA1021 type transceiver. Those skilled in the art should know that, in addition to the above-mentioned models, any transceiver that has the same sleep control pin definition and sleep trigger delay characteristics as the TJA1043 type CAN transceiver and the TJA1021 type LIN transceiver, and can realize the same bus communication and sleep control functions, can be used as an equivalent replacement device in the technical solution of this utility model.
[0027] Specifically, such as Figure 3 As shown in the middle section (CAN communication circuit), the CANH and CANL pins of the CAN transceiver are electrically connected to the CAN bus to transmit CAN signals; the CAN0_RX port of the MCU chip is electrically connected to the RXD pin of the CAN transceiver, and the CAN0_TX port of the MCU chip is electrically connected to the TXD pin of the CAN transceiver to realize signal interaction between the MCU chip and the CAN bus.
[0028] Specifically, the LIN pin of the LIN transceiver is electrically connected to the LIN bus to transmit LIN signals; the LIN_RX port of the MCU chip is electrically connected to the RXD pin of the LIN transceiver, and the LIN_TX port of the MCU chip is electrically connected to the TXD pin of the LIN transceiver to realize signal interaction between the MCU chip and the LIN bus.
[0029] Specifically, such as Figure 3 As shown in the upper middle section (power circuit), the wake-up control terminal of the power module is electrically connected to a common signal node, and the INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are both electrically connected in parallel to the common signal node.
[0030] Furthermore, a transistor is connected in series between the common signal node and the wake-up control terminal of the power module. The common signal node is electrically connected to the base of the transistor, the collector of the transistor is electrically connected to the wake-up control terminal of the power module, and the emitter of the transistor is grounded.
[0031] Specifically, the power module includes a power input unit, a DC conversion circuit, and a power output unit; The power input unit is electrically connected to the vehicle power supply. The DC conversion circuit is electrically connected between the power input unit and the power output unit. The output terminal of the power output unit is electrically connected to the power pin of the external control module. The INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are connected in parallel to the control terminal of the DC conversion circuit.
[0032] Specifically, such as Figure 3As shown, the WAKE pin of the CAN transceiver and the WAKE pin of the LIN transceiver are electrically connected to the WAKE signal terminal of the car to realize the interaction of the vehicle wake-up signal.
[0033] Combination Figure 3 The present invention will be further described in detail below. The CAN signal enters the CAN transceiver through the CAN bus via the CANL and CANH pins. The CAN transceiver converts the CAN signal into a recognizable CAN logic signal and transmits it to the MCU chip via the CAN RXD pin and the MCU CAN0_RX port. After the MCU chip recognizes the signal, it adjusts the level to the EN and STB_N pins of the CAN chip through the PORTA and PORTB ports. The CAN chip then outputs the CAN control enable to the DC conversion circuit via the INH1 pin to control the DC conversion circuit to turn on / off.
[0034] The LIN signal enters the LIN transceiver via the LIN bus and the LIN pin. The LIN transceiver converts the LIN signal into a recognizable LIN logic signal and transmits it to the MCU chip via the LIN RXD pin and the MCU's LIN_RX port. After the MCU chip recognizes the signal, it adjusts the level to the LIN chip's SLP_N pin via the PORTA port. The LIN chip then outputs the LIN control enable to the DC conversion circuit via the INH2 pin to control the DC conversion circuit's on / off state.
[0035] like Figure 4 As shown, the wake-up path of this utility model is as follows: wake up the CAN transceiver or LIN transceiver through WAKE signal / CAN signal / LIN signal / power-on input, etc. → output high level on INH1 pin and INH2 pin → DC conversion circuit is turned on → power output unit is powered on → MCU chip and external control module are powered on and restarted → MCU chip controls PORTA port and PORTB port to output high level to maintain normal operation of CAN transceiver and LIN transceiver; The sleep path of this utility model is as follows: the MCU chip puts the CAN transceiver and LIN transceiver into sleep state through timing control → the DC conversion circuit is turned off → the power output unit is powered down → the MCU chip and other external control modules are powered down and stop working.
[0036] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A sleep control system that simultaneously supports CAN and LIN, characterized in that, include: MCU chip, CAN transceiver, LIN transceiver and power module; The MCU chip is configured with two output I / O ports, namely PORTA and PORTB. The EN pin of the CAN transceiver and the SLP_N pin of the LIN transceiver are connected in parallel to the PORTA port, and the STB_N pin of the CAN transceiver is connected to the PORTB port to receive the level signal output by the MCU chip; The INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are connected in parallel to the wake-up control terminal of the power module to control its power supply.
2. A sleep control system that simultaneously supports CAN and LIN according to claim 1, characterized in that: The CANH and CANL pins of the CAN transceiver are electrically connected to the CAN bus for transmitting CAN signals. The CAN0_RX port of the MCU chip is electrically connected to the RXD pin of the CAN transceiver, and the CAN0_TX port of the MCU chip is electrically connected to the TXD pin of the CAN transceiver, so as to realize the signal interaction between the MCU chip and the CAN bus.
3. A sleep control system that simultaneously supports CAN and LIN according to claim 1, characterized in that: The LIN pin of the LIN transceiver is electrically connected to the LIN bus for transmitting LIN signals; The LIN_RX port of the MCU chip is electrically connected to the RXD pin of the LIN transceiver, and the LIN_TX port of the MCU chip is electrically connected to the TXD pin of the LIN transceiver, so as to realize the signal interaction between the MCU chip and the LIN bus.
4. A sleep control system that simultaneously supports CAN and LIN according to claim 1, characterized in that: The wake-up control terminal of the power module is electrically connected to a common signal node, and the INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are both electrically connected in parallel to the common signal node.
5. A sleep control system that simultaneously supports CAN and LIN according to claim 4, characterized in that: A transistor is connected in series between the common signal node and the wake-up control terminal of the power module. The common signal node is electrically connected to the base of the transistor, the collector of the transistor is electrically connected to the wake-up control terminal of the power module, and the emitter of the transistor is grounded.
6. A sleep control system that simultaneously supports CAN and LIN according to claim 1, characterized in that: The WAKE pin of the CAN transceiver and the WAKE pin of the LIN transceiver are electrically connected to the WAKE signal terminal of the vehicle to realize the interaction of the vehicle wake-up signal.
7. A sleep control system that simultaneously supports CAN and LIN according to claim 1, characterized in that: The power module includes a power input unit, a DC conversion circuit, and a power output unit; The power input unit is electrically connected to the vehicle power supply. The DC conversion circuit is electrically connected between the power input unit and the power output unit. The output terminal of the power output unit is electrically connected to the power pin of the external control module. The INH1 pin of the CAN transceiver and the INH2 pin of the LIN transceiver are connected in parallel to the control terminal of the DC conversion circuit.