A small frequency divider for 5G bands

Abstract

The application discloses a small frequency divider for a 5G frequency band, and belongs to the technical field of frequency dividers of radio frequency front-end circuits, and comprises an LTCC ceramic body, a circuit layer in the LTCC ceramic body and an external electrode at the bottom of the LTCC ceramic body, wherein the external electrode comprises a common port, a low-frequency channel output port, a high-frequency channel output port, a first ground port, a second ground port, a third ground port, a fourth ground port, a fifth ground port and a sixth ground port, and the external electrode is connected with the circuit layer via a via hole. The application solves the problem that the traditional frequency divider is prone to causing mutual coupling between lumped components, generating unnecessary parasitic parameters, thereby reducing the Q value of a filter circuit, increasing the insertion loss and reducing the isolation between a low-frequency channel and a high-frequency channel.

Description

Technical Field

[0001] This application relates to the field of frequency divider technology for radio frequency front-end circuits, and more particularly to a small frequency divider for 5G bands. Background Technology

[0002] Current microwave systems are trending towards high integration, high performance, and small size. A single system often integrates two or more channels, some of which require bidirectional communication. To reduce system size and overall power consumption, receivers and transmitters typically share a single antenna and feeder system. To prevent the transmitter's signal from directly coupling to the receiver front-end through the antenna feeder system, causing the receiver to operate in deep saturation and affecting the normal operation of the entire system, a three-port device—a frequency divider—comprising two filters, is needed between the antenna and the transceiver front-end. Its working principle involves extracting signals from multiple operating frequency bands on the common port and outputting them to the corresponding frequency band ports. The frequency divider not only requires low-loss signal transmission within each frequency band but also demands high isolation between the channels to reduce mutual coupling between the receiving and transmitting channels and improve system performance.

[0003] Traditional frequency dividers are mostly designed based on LC low-pass filters and high-pass or band-pass filter circuits. The low-pass filter channel allows relatively low-frequency signals to pass through while suppressing relatively high-frequency signals, while the high-pass or band-pass filter channel allows relatively high-frequency signals to pass through while suppressing relatively low-frequency signals. Because two filter channels need to be integrated into a single device, and high isolation is required between the channels, traditional frequency dividers are often quite large.

[0004] In recent years, the emergence of new materials and processes such as microelectromechanical systems (MEMS), high-temperature superconductivity, low-temperature co-fired ceramics, photonic bandgap structures, and microwave monolithic integrated circuits has driven continuous improvements in the performance and size of RF passive components such as frequency dividers and filters. Some components can now be made in the size of conventional surface-mount resistors, capacitors, and inductors. However, integrating multiple inductors and capacitors in such a compact space to achieve the function of a dual-channel filter can easily cause mutual coupling between lumped components, generating unnecessary parasitic parameters. This results in a decrease in the Q value of the filter circuit, an increase in insertion loss, and a reduction in the isolation between low-frequency and high-frequency channels. Summary of the Invention

[0005] To address the aforementioned shortcomings in the prior art, this application provides a small frequency divider for 5G bands that solves the problem that traditional frequency dividers easily cause mutual coupling between lumped components, generating unnecessary parasitic parameters, thereby reducing the Q value of the filter circuit, increasing insertion loss, and reducing the isolation between low-frequency and high-frequency channels.

[0006] To achieve the aforementioned objectives, the technical solution adopted in this application is as follows: This application provides a small frequency divider for 5G bands, comprising: an LTCC ceramic body, a circuit layer inside the LTCC ceramic body, and an external electrode at the bottom of the LTCC ceramic body. The external electrode includes a common port, a low-frequency channel output port, a high-frequency channel output port, a first ground port, a second ground port, a third ground port, a fourth ground port, a fifth ground port, and a sixth ground port. The external electrode is connected to the circuit layer via vias.

[0007] The beneficial effects of the above solution are as follows: The present invention provides a small frequency divider for 5G bands, which has a multi-layer circuit structure and is embedded in a very small package volume to realize the dual-channel function of a high-performance frequency divider. It minimizes the mutual coupling between lumped components in a very small space and reduces the influence of parasitic parameters. It solves the problem that traditional frequency dividers are prone to mutual coupling between lumped components, generating unnecessary parasitic parameters, which leads to a decrease in the Q value of the filter circuit, an increase in insertion loss, and a decrease in the isolation between low-frequency channels and high-frequency channels.

[0008] Furthermore, the circuit layer includes a low-frequency channel filter and a high-frequency channel filter, both of which are connected to a common port; The low-frequency channel filter includes a first equivalent inductance L1, a second equivalent inductance L2, a third equivalent inductance L3, a fourth equivalent inductance L4, a first equivalent capacitance C1, and a second equivalent capacitance C2. The high-frequency channel filter includes a fifth equivalent inductance L5, a sixth equivalent inductance L6, a seventh equivalent inductance L7, a third equivalent capacitance C3, a fourth equivalent capacitance C4, a fifth equivalent capacitance C5, and a sixth equivalent capacitance C6. One end of the first equivalent inductance L1 is connected to the common port. The other end of the first equivalent inductance L1 is connected to one end of the first equivalent capacitor C1, one end of the second equivalent capacitor C2, and one end of the third equivalent inductance L3. The other end of the first equivalent capacitor C1 is connected to one end of the second equivalent inductance L2. The other end of the second equivalent inductance L2 is connected to the first ground port. The second equivalent capacitor C2 and the third equivalent inductance L3 are connected in parallel. The other ends of the second equivalent capacitor C2 and the third equivalent inductance L3 are connected to one end of the fourth equivalent inductance L4. The other end of the fourth equivalent inductance L4 is connected to the low-frequency channel output port. One end of the fifth equivalent inductance L5 is connected to the common port, and the other end of the fifth equivalent inductance L5 is connected to one end of the third equivalent capacitor C3. The other end of the third equivalent capacitor C3 is connected to one end of the fifth equivalent capacitor C5 and the fourth equivalent capacitor C4, respectively. The other end of the fourth equivalent capacitor C4 is connected to one end of the sixth equivalent inductance L6, and the other end of the sixth equivalent inductance L6 is connected to the first ground port. The other end of the fifth equivalent capacitor C5 is connected to one end of the sixth equivalent capacitor C6 and the high-frequency channel output port, respectively. The other end of the sixth equivalent capacitor C6 is connected to one end of the seventh equivalent inductance L7, and the other end of the seventh equivalent inductance L7 is connected to the first ground port.

[0009] Furthermore, the circuit layers, from top to bottom, include a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, and a seventh circuit layer; The first circuit layer includes a first electrode plate, a second electrode plate, a third electrode plate, a first via, a second via, a third via, a fourth via, a fifth via, and a sixth via; The second circuit layer includes a fourth electrode plate, a first via, a second via, a third via, a fourth via, a fifth via, and a seventh via; The third circuit layer includes a fifth electrode plate, a sixth electrode plate, a seventh electrode plate, an eighth electrode plate, a first via, a second via, a third via, a fourth via, an eighth via, a ninth via, a tenth via, an eleventh via, and a twelfth via; The fourth circuit layer includes a ninth electrode plate, a tenth electrode plate, an eleventh electrode plate, a first via, a second via, a fourth via, a ninth via, a tenth via, an eleventh via, and a twelfth via; The fifth circuit layer includes a twelfth electrode plate, a thirteenth electrode plate, a fourteenth electrode plate, a first via, a ninth via, and a twelfth via; The sixth circuit layer includes a fifteenth electrode plate, a sixteenth electrode plate, a seventeenth electrode plate, an eighteenth electrode plate, a first via, a ninth via, a twelfth via, a thirteenth via, a fourteenth via, and a fifteenth via; The seventh circuit layer includes a nineteenth electrode plate, a twentieth electrode plate, a first via, a ninth via, a fourteenth via, a fifteenth via, a sixteenth via, a seventeenth via, an eighteenth via, and a nineteenth via; The first electrode plate is connected end to end via a first via and a second via, together forming the first equivalent inductance L1; The twelfth and fifteenth electrode plates, through interlayer coupling, together form the second equivalent capacitance C2; The nineteenth electrode plate is connected end to end via the thirteenth and sixteenth vias, together forming the second equivalent inductance L2; The eighth electrode plate is connected end to end via the eleventh and twelfth vias, together forming the third equivalent inductance L3; The eleventh electrode plate and the sixteenth electrode plate are connected via the twelfth through-hole and are coupled with the twelfth electrode plate through interlayer coupling to form the first equivalent capacitance C1. The twentieth electrode plate is connected end to end via the twelfth via and the seventeenth via, together forming the fourth equivalent inductance L4; The fifth electrode plate is connected end to end via the first via and the eighth via, together forming the fifth equivalent inductance L5; The ninth and thirteenth electrode plates are coupled together through interlayer coupling to form the third equivalent capacitance C3; The thirteenth and eighteenth electrode plates are coupled together through interlayer coupling to form the fifth equivalent capacitance C5; The second electrode plate is connected end to end via the fourth and third vias, together forming the sixth equivalent inductance L6; The tenth electrode plate and the seventeenth electrode plate are coupled together through interlayer coupling to form the fourth equivalent capacitance C4; The fourteenth and eighteenth electrode plates are coupled together through interlayer coupling to form the sixth equivalent capacitance C6; The seventh electrode plate, the fourth electrode plate, the third electrode plate, and the sixth electrode plate are connected end to end via the tenth via, the seventh via, the sixth via, the fifth via, and the ninth via, together forming the seventh equivalent inductance L7.

[0010] The beneficial effects of the above solution are as follows: This application integrates the aforementioned inductor and capacitor components into seven circuit layers within the ceramic body, exhibiting miniaturized, high-Q, and wide-stopband microwave characteristics. Furthermore, by rationally selecting the equivalent component values ​​of the filter and optimizing the coupling relationship of its equivalent components in vertical space, four equivalent inductors and two equivalent capacitors are constructed for the low-frequency channel filter, and three equivalent inductors and four equivalent capacitors are constructed for the high-frequency channel filter. This provides a miniature frequency divider for the 5G band, capable of arranging multiple inductor and capacitor components in a very small volume while simultaneously achieving low insertion loss and high suppression effects.

[0011] Furthermore, the first electrode plate and the fifth electrode plate are also connected to the common port via the first via; the twentieth electrode plate is also connected to the low-frequency channel output port via the seventeenth via; the eighteenth electrode plate is also connected to the high-frequency channel output port via the fifteenth via; and the nineteenth electrode plate is also connected to the first ground port, the third ground port, the fourth ground port, the fifth ground port, and the sixth ground port via the ninth via, the fourteenth via, the eighteenth via, and the nineteenth via.

[0012] Furthermore, in the low-frequency channel filter, one end of the first equivalent inductor L1 is connected to the common port via the first via, and the other end is connected to one end of the first equivalent capacitor C1 and one end of the second equivalent capacitor C2 via the second via, and is connected to one end of the third equivalent inductor L3 via the eleventh via. The other end of the first equivalent capacitor C1 is connected to one end of the second equivalent inductor L2 via the thirteenth via. The other end of the second equivalent inductor L2 is connected to the first ground port via the sixteenth via. The other ends of the second equivalent capacitor C2 and the third equivalent inductor L3 are connected to one end of the fourth equivalent inductor L4 via the twelfth via. The other end of the fourth equivalent inductor L4 is connected to the low-frequency channel output port via the seventeenth via. In the high-frequency channel filter, one end of the fifth equivalent inductor L5 is connected to the common port via the first via, and the other end is connected to one end of the third equivalent capacitor C3 via the eighth via. The other end of the third equivalent capacitor C3 is connected to one end of the fifth equivalent capacitor C5 and the fourth equivalent capacitor C4, and is connected to one end of the sixth equivalent inductor L6 via the fourth via. The other end of the sixth equivalent inductor L6 is connected to one end of the fourth equivalent capacitor C4 via the third via. The other end of the fourth equivalent capacitor C4 is connected to the first ground port via the fourteenth via. The other end of the fifth equivalent capacitor C5 is connected to one end of the sixth equivalent capacitor C4 via the fifteenth via and the high-frequency channel output port. The other end of the sixth equivalent capacitor C6 is connected to one end of the seventh equivalent inductor L7 via the sixth, seventh, and tenth vias. The other end of the seventh equivalent inductor L7 is connected to the first ground port via the fifth and ninth vias.

[0013] Furthermore, the external electrode is encapsulated using a planar grid array (LGA).

[0014] The beneficial effects of the above scheme are: the external electrode adopts a planar grid array package LGA and is placed at the bottom of the LTCC ceramic body, and is connected to the circuit layer lines inside the LTCC ceramic body through vias.

[0015] Furthermore, the miniature frequency divider also includes an identifier located on the opposite side of the LTCC ceramic body, opposite the external electrode.

[0016] The beneficial effect of the above scheme is that an identifier is set on the top of the frequency divider to identify the location of each port.

[0017] Furthermore, the circuit layer is embedded in the LTCC ceramic body using a low-temperature co-fired ceramic process.

[0018] The beneficial effects of the above scheme are: This application incorporates the multi-layer circuit of the frequency divider into the ceramic body based on the low-temperature co-fired ceramic process, and realizes the integration of various equivalent components on the three-dimensional circuit substrate, thereby achieving the miniaturization and high density of the circuit.

[0019] Furthermore, the circuit layer uses an embedded metal material, which includes copper or palladium-silver.

[0020] The beneficial effects of the above scheme are: Using the aforementioned high-conductivity metallic materials is beneficial for improving the quality factor of circuit systems. For example, palladium-silver can be used as the embedded metallic material, which does not oxidize during sintering and eliminates the need for electroplating protection. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other embodiments can be obtained based on these drawings.

[0022] Figure 1 This is a schematic diagram of a small frequency divider for 5G bands provided in an embodiment of this application.

[0023] Figure 2 This is a schematic diagram of the internal structure of a small frequency divider for 5G bands provided in an embodiment of this application.

[0024] Figure 3 An equivalent schematic diagram of a small frequency divider for 5G bands provided in this application embodiment.

[0025] Figure 4 This is a schematic diagram of the first layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0026] Figure 5 This is a schematic diagram of the second layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0027] Figure 6 This is a schematic diagram of the third layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0028] Figure 7 This is a schematic diagram of the fourth layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0029] Figure 8 This is a schematic diagram of the fifth layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0030] Figure 9 This is a schematic diagram of the sixth layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0031] Figure 10 This is a schematic diagram of the seventh layer circuit of a small frequency divider for 5G bands provided in an embodiment of this application.

[0032] Figure 11 The attenuation response curve of a small frequency divider for 5G band provided in the embodiments of this application is shown.

[0033] Figure 12 The return loss response curve of a small frequency divider for 5G band provided in this application embodiment is shown.

[0034] Wherein: 1-Common port; 2-Low-frequency channel output port; 3-High-frequency channel output port; 4-First grounding port; 5-Second grounding port; 6-Third grounding port; 7-Fourth grounding port; 8-Fifth grounding port; 9-Sixth grounding port; 10-Identifier; P1-First electrode plate; P2-Second electrode plate; P3-Third electrode plate; P4-Fourth electrode plate; P5-Fifth electrode plate; P6-Sixth electrode plate; P7-Seventh electrode plate; P8-Eighth electrode plate; P9-Ninth electrode plate; P10-Tenth electrode plate; P11-Eleventh electrode plate; P12-Twelfth electrode plate; P13-Thirteenth electrode plate; P14-Fourteenth electrode plate; P15-... Fifteenth electrode plate; P16 - Sixteenth electrode plate; P17 - Seventeenth electrode plate; P18 - Eighteenth electrode plate; P19 - Nineteenth electrode plate; P20 - Twentieth electrode plate; H1 - First via; H2 - Second via; H3 - Third via; H4 - Fourth via; H5 - Fifth via; H6 - Sixth via; H7 - Seventh via; H8 - Eighth via; H9 - Ninth via; H10 - Tenth via; H11 - Eleventh via; H12 - Twelfth via; H13 - Thirteenth via; H14 - Fourteenth via; H15 - Fifteenth via; H16 - Sixteenth via; H17 - Seventeenth via; H18 - Eighteenth via; H19 - Nineteenth via. Detailed Implementation

[0035] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art based on this application are within the scope of protection of this application.

[0036] like Figure 1 , Figure 2As shown, this application embodiment provides a small frequency divider for 5G bands with extremely small mutual frequencies, including: an LTCC ceramic body, a circuit layer inside the LTCC ceramic body, and an external electrode at the bottom of the LTCC ceramic body. The external electrode includes a common port 1, a low-frequency channel output port 2, a high-frequency channel output port 3, a first ground port 4, a second ground port 5, a third ground port 6, a fourth ground port 7, a fifth ground port 8, and a sixth ground port 9. The external electrode is connected to the circuit layer via a via, and the second ground port 5 is not connected in any form.

[0037] This circuit layer includes a low-frequency channel filter and a high-frequency channel filter, both of which are connected to a common port 1.

[0038] like Figure 3 As shown, the low-frequency channel filter includes a first equivalent inductance L1, a second equivalent inductance L2, a third equivalent inductance L3, a fourth equivalent inductance L4, a first equivalent capacitance C1, and a second equivalent capacitance C2. The high-frequency channel filter includes a fifth equivalent inductance L5, a sixth equivalent inductance L6, a seventh equivalent inductance L7, a third equivalent capacitance C3, a fourth equivalent capacitance C4, a fifth equivalent capacitance C5, and a sixth equivalent capacitance C6.

[0039] In the low-frequency channel filter, one end of the first equivalent inductor L1 is connected to the common port 1, and the other end is connected to one end of the first equivalent capacitor C1, one end of the second equivalent capacitor C2, and one end of the third equivalent inductor L3. The other end of the first equivalent capacitor C1 is connected to one end of the second equivalent inductor L2, and the other end of the second equivalent inductor L2 is connected to the first ground port 4. The second equivalent capacitor C2 and the third equivalent inductor L3 are connected in parallel, and their other ends are connected to one end of the fourth equivalent inductor L4. The other end of the fourth equivalent inductor L4 is connected to the low-frequency channel output port 2. In the high-frequency channel filter, one end of the fifth equivalent inductor L5 is connected to the common port 1, and the other end is connected to one end of the third equivalent capacitor C3. The other end of the third equivalent capacitor C3 is connected to one end of the fifth equivalent capacitor C5 and the fourth equivalent capacitor C4, respectively. The other end of the fourth equivalent capacitor C4 is connected to one end of the sixth equivalent inductor L6, and the other end of the sixth equivalent inductor L6 is connected to the first ground port 4. The other end of the fifth equivalent capacitor C5 is connected to one end of the sixth equivalent capacitor C6 and the high-frequency channel output port 3, respectively. The other end of the sixth equivalent capacitor C6 is connected to one end of the seventh equivalent inductor L7, and the other end of the seventh equivalent inductor L7 is connected to the first ground port 4.

[0040] The circuit layers, from top to bottom, include the first circuit layer, the second circuit layer, the third circuit layer, the fourth circuit layer, the fifth circuit layer, the sixth circuit layer, and the seventh circuit layer.

[0041] like Figure 4As shown, the first circuit layer includes a first electrode plate P1, a second electrode plate P2, a third electrode plate P3, a first via H1, a second via H2, a third via H3, a fourth via H4, a fifth via H5, and a sixth via H6.

[0042] like Figure 5 As shown, the second circuit layer includes a fourth electrode plate P4, a first via H1, a second via H2, a third via H3, a fourth via H4, a fifth via H5, and a seventh via H7.

[0043] like Figure 6 As shown, the third circuit layer includes the fifth electrode plate P5, the sixth electrode plate P6, the seventh electrode plate P7, the eighth electrode plate P8, the first via H1, the second via H2, the third via H3, the fourth via H4, the eighth via H8, the ninth via H9, the tenth via H10, the eleventh via H11, and the twelfth via H12.

[0044] like Figure 7 As shown, the fourth circuit layer includes a ninth electrode plate P9, a tenth electrode plate P10, an eleventh electrode plate P11, a first via H1, a second via H2, a fourth via H4, a ninth via H9, a tenth via H10, an eleventh via H11, and a twelfth via H12.

[0045] like Figure 8 As shown, the fifth circuit layer includes the twelfth electrode plate P12, the thirteenth electrode plate P13, the fourteenth electrode plate P14, the first via H1, the ninth via H9, and the twelfth via H12.

[0046] like Figure 9 As shown, the sixth circuit layer includes the fifteenth electrode plate P15, the sixteenth electrode plate P16, the seventeenth electrode plate P17, the eighteenth electrode plate P18, the first via H1, the ninth via H9, the twelfth via H12, the thirteenth via H13, the fourteenth via H14, and the fifteenth via H15.

[0047] like Figure 10 As shown, the seventh circuit layer includes the nineteenth electrode plate P19, the twentieth electrode plate P20, the first via H1, the ninth via H9, the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18, and the nineteenth via H19.

[0048] Specifically, the first electrode plate P1 is connected end-to-end via the first via H1 and the second via H2, forming the first equivalent inductance L1; the twelfth electrode plate P12 and the fifteenth electrode plate P15 are coupled through interlayer to form the second equivalent capacitance C2; ​​the nineteenth electrode plate P19 is connected end-to-end via the thirteenth via H13 and the sixteenth via H16, forming the second equivalent inductance L2; the eighth electrode plate P8 is connected end-to-end via the eleventh via H11 and the twelfth via H12, forming the third equivalent inductance L3; the eleventh electrode plate P11 and the sixteenth electrode plate P16 are connected via the twelfth via H12 and coupled with the twelfth electrode plate P12 through interlayer to form the first equivalent capacitance C1; the twentieth electrode plate P20 is connected end-to-end via the twelfth via H12 and the seventeenth via H17, forming the fourth equivalent inductance L4; the fifth electrode plate P5 is connected end-to-end via the first via H1 and the eighth via H12. Via H8 connects the first and second electrodes, forming the fifth equivalent inductance L5; the ninth electrode plate P9 and the thirteenth electrode plate P13 are coupled through interlayer to form the third equivalent capacitance C3; the thirteenth electrode plate P13 and the eighteenth electrode plate P18 are coupled through interlayer to form the fifth equivalent capacitance C5; the second electrode plate P2 is connected end to end via the fourth via H4 and the third via H3, forming the sixth equivalent inductance L6; the tenth electrode plate P10 and the seventeenth electrode plate P17 are coupled through interlayer to form the fourth equivalent capacitance C4; the fourteenth electrode plate P14 and the eighteenth electrode plate P18 are coupled through interlayer to form the sixth equivalent capacitance C6; the seventh electrode plate P7, the fourth electrode plate P4, the third electrode plate P3, and the sixth electrode plate P6 are connected end to end via the tenth via H10, the seventh via H7, the sixth via H6, the fifth via H5, and the ninth via H9, forming the seventh equivalent inductance L7.

[0049] In one embodiment of this application, in the low-frequency channel filter, one end of the first equivalent inductance L1 is connected via... Figures 4 to 10 The first via H1 is connected to the common port 1, and the other end is connected via... Figures 4 to 7 The second via H2 is connected to one end of the first equivalent capacitor C1 and one end of the second equivalent capacitor C2, and is also connected to one end of the third equivalent inductor L3 via... Figures 6 to 8 The eleventh via H11 is connected, and the other end of the first equivalent capacitance C1 is connected via... Figures 9 to 10 The thirteenth via H13 is connected to one end of the second equivalent inductance L2, and the other end of the second equivalent inductance L2 is connected via... Figure 10 The sixteenth via H16 is connected to the grounding port 4. The second equivalent capacitor C2 and the third equivalent inductor L3 are connected in parallel, and their other ends are connected via... Figures 9 to 10 The twelfth via H12 is connected to one end of the fourth equivalent inductance L4, and the other end of the fourth equivalent inductance L4 is connected via... Figure 10 The seventeenth via H17 is connected to the low-frequency channel output port 2.

[0050] In the high-frequency channel filter, one end of the fifth equivalent inductor L5 is connected via Figures 6 to 10 The first via H1 is connected to the common port 1, and its other end is connected via... Figures 6 to 7 The eighth via H8 is connected to one end of the third equivalent capacitor C3. The other end of the third equivalent capacitor C3 is connected to one end of the fifth equivalent capacitor C5 and the fourth equivalent capacitor C4, respectively. Additionally, it is connected to one end of the sixth equivalent inductor L6 via... Figures 4 to 8 The fourth via H4 connects to the other end of the sixth equivalent inductor L6 via... Figures 4 to 7 The third via H3 is connected to one end of the fourth equivalent capacitor C4, and the other end of the sixth equivalent inductor L6 is connected via... Figures 9 to 10 The fourteenth via H14 is connected to the grounding port 4, and the other end of the fifth equivalent capacitor C5 is connected to one end of the sixth equivalent capacitor C4 via... Figures 9 to 10 The fifteenth via H15 is connected to the high-frequency channel output port 3, and the other end of the sixth equivalent capacitor C6 is connected via... Figures 4 to 8 The sixth via H6, the seventh via H7, and the tenth via H10 are connected to one end of the seventh equivalent inductance L7, and the other end of the seventh equivalent inductance L7 is connected via... Figures 4 to 10 The fifth via H5 and the ninth via H9 are connected to the grounding port 4.

[0051] In one embodiment of this application, the first electrode plate P1 and the fifth electrode plate P5 are also connected to the common port (1) via the first via H1; the twentieth electrode plate P20 is also connected to the low-frequency channel output port 2 via the seventeenth via H17; the eighteenth electrode plate P18 is also connected to the high-frequency channel output port 3 via the fifteenth via H15; and the nineteenth electrode plate P19 is also connected to the first ground port 4, the third ground port 6, the fourth ground port 7, the fifth ground port 8, and the sixth ground port 9 via the ninth via H9, the fourteenth via H14, the eighteenth via H18, and the nineteenth via H19; the second ground port 5 is not connected in any way.

[0052] In one embodiment of this application, the frequency divider further includes a marker 10, which is located on the opposite side of the LTCC ceramic body. The external electrode is encapsulated using a planar grid array (LGA). The circuit layer is embedded in the LTCC ceramic body using a low-temperature co-fired ceramic process. The circuit layer is made of embedded metal material, including copper or palladium-silver. The multi-layer circuit of the frequency divider is embedded inside a 2.5mm × 2.0mm × 0.8mm ceramic body and sintered at a temperature of 890℃ ± 20℃.

[0053] Figure 11 and Figure 12 This is a schematic frequency response characteristic curve of a frequency divider used in a multi-band device according to an embodiment of this application. The attenuation response of the frequency divider is as follows: Figure 11 As shown, its low-frequency channel filter has an insertion loss of only 2.22dB in the 5150-5330MHz operating band, and an out-of-band rejection of 15dB in the 5490-5950MHz band. The high-frequency channel filter has an insertion loss of only 2.03dB in the 5490-5950MHz operating band, while its out-of-band rejection of the low frequency range reaches 15dB from 5150-5330MHz. The return loss response of the frequency divider is as follows... Figure 12 As shown, the return loss of both channels exceeds 15dB. These parameters demonstrate the excellent transmission characteristics and high inter-channel isolation of this frequency divider.

[0054] This application provides a miniature frequency divider for 5G bands, which features excellent performance such as high Q value, small size, low insertion loss, and high isolation. Simultaneously, while ensuring its electrical performance is not affected, the tolerance of the manufacturing process is maximized, achieving high process stability and consistency. Furthermore, it is easily integrated with other circuit modules, and has broad application prospects in the field of next-generation wireless communication.

[0055] It should be noted that those skilled in the art will recognize that the embodiments described herein are for the purpose of helping readers understand the principles of this application, and should be understood as not limiting the scope of protection of this application to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical teachings disclosed in this application without departing from the essence of this application, and these modifications and combinations are still within the scope of protection of this application.

Claims

1. A small frequency divider for 5G frequency bands, comprising: The LTCC ceramic body, the circuit layer inside the LTCC ceramic body, and the external electrode at the bottom of the LTCC ceramic body are characterized in that the external electrode includes a common port (1), a low-frequency channel output port (2), a high-frequency channel output port (3), a first ground port (4), a second ground port (5), a third ground port (6), a fourth ground port (7), a fifth ground port (8), and a sixth ground port (9), and the external electrode is connected to the circuit layer via vias; The circuit layer includes a low-frequency channel filter and a high-frequency channel filter, both of which are connected to a common port (1). The low-frequency channel filter includes a first equivalent inductance L1, a second equivalent inductance L2, a third equivalent inductance L3, a fourth equivalent inductance L4, a first equivalent capacitance C1, and a second equivalent capacitance C2. The high-frequency channel filter includes a fifth equivalent inductance L5, a sixth equivalent inductance L6, a seventh equivalent inductance L7, a third equivalent capacitance C3, a fourth equivalent capacitance C4, a fifth equivalent capacitance C5, and a sixth equivalent capacitance C6. One end of the first equivalent inductance L1 is connected to the common port (1), and the other end of the first equivalent inductance L1 is connected to one end of the first equivalent capacitor C1, one end of the second equivalent capacitor C2 and one end of the third equivalent inductance L3 respectively. The other end of the first equivalent capacitor C1 is connected to one end of the second equivalent inductance L2. The other end of the second equivalent inductance L2 is connected to the first ground port (4). The second equivalent capacitor C2 and the third equivalent inductance L3 are connected in parallel. The other ends of the second equivalent capacitor C2 and the third equivalent inductance L3 are connected to one end of the fourth equivalent inductance L4 respectively. The other end of the fourth equivalent inductance L4 is connected to the low frequency channel output port (2). One end of the fifth equivalent inductance L5 is connected to the common port (1), the other end of the fifth equivalent inductance L5 is connected to one end of the third equivalent capacitor C3, the other end of the third equivalent capacitor C3 is connected to one end of the fifth equivalent capacitor C5 and the fourth equivalent capacitor C4 respectively, the other end of the fourth equivalent capacitor C4 is connected to one end of the sixth equivalent inductance L6, the other end of the sixth equivalent inductance L6 is connected to the first ground port (4), the other end of the fifth equivalent capacitor C5 is connected to one end of the sixth equivalent capacitor C6 and the high-frequency channel output port (3) respectively, the other end of the sixth equivalent capacitor C6 is connected to one end of the seventh equivalent inductance L7, and the other end of the seventh equivalent inductance L7 is connected to the first ground port (4); The circuit layers, from top to bottom, include a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, and a seventh circuit layer. The first circuit layer includes a first electrode plate (P1), a second electrode plate (P2), a third electrode plate (P3), a first via (H1), a second via (H2), a third via (H3), a fourth via (H4), a fifth via (H5), and a sixth via (H6); The second circuit layer includes a fourth electrode plate (P4), a first via (H1), a second via (H2), a third via (H3), a fourth via (H4), a fifth via (H5), and a seventh via (H7); The third circuit layer includes a fifth electrode plate (P5), a sixth electrode plate (P6), a seventh electrode plate (P7), an eighth electrode plate (P8), a first via (H1), a second via (H2), a third via (H3), a fourth via (H4), an eighth via (H8), a ninth via (H9), a tenth via (H10), an eleventh via (H11), and a twelfth via (H12). The fourth circuit layer includes a ninth electrode plate (P9), a tenth electrode plate (P10), an eleventh electrode plate (P11), a first via (H1), a second via (H2), a fourth via (H4), a ninth via (H9), a tenth via (H10), an eleventh via (H11), and a twelfth via (H12). The fifth circuit layer includes a twelfth electrode plate (P12), a thirteenth electrode plate (P13), a fourteenth electrode plate (P14), a first via (H1), a ninth via (H9), and a twelfth via (H12). The sixth circuit layer includes a fifteenth electrode plate (P15), a sixteenth electrode plate (P16), a seventeenth electrode plate (P17), an eighteenth electrode plate (P18), a first via (H1), a ninth via (H9), a twelfth via (H12), a thirteenth via (H13), a fourteenth via (H14), and a fifteenth via (H15). The seventh circuit layer includes a nineteenth electrode plate (P19), a twentieth electrode plate (P20), a first via (H1), a ninth via (H9), a fourteenth via (H14), a fifteenth via (H15), a sixteenth via (H16), a seventeenth via (H17), an eighteenth via (H18), and a nineteenth via (H19). The first electrode plate (P1) is connected end to end via the first via (H1) and the second via (H2), together forming the first equivalent inductance L1; The twelfth electrode plate (P12) and the fifteenth electrode plate (P15) together form the second equivalent capacitance C2 through interlayer coupling; The nineteenth electrode plate (P19) is connected end to end via the thirteenth via (H13) and the sixteenth via (H16), together forming the second equivalent inductance L2; The eighth electrode plate (P8) is connected end to end via the eleventh via (H11) and the twelfth via (H12), together forming the third equivalent inductance L3; The eleventh electrode plate (P11) and the sixteenth electrode plate (P16) are connected via the twelfth via (H12) and are coupled with the twelfth electrode plate (P12) through interlayer coupling to form the first equivalent capacitance C1. The twentieth electrode plate (P20) is connected end to end via the twelfth via (H12) and the seventeenth via (H17), together forming the fourth equivalent inductance L4; The fifth electrode plate (P5) is connected end to end via the first via (H1) and the eighth via (H8), together forming the fifth equivalent inductance L5; The ninth electrode plate (P9) and the thirteenth electrode plate (P13) together form the third equivalent capacitance C3 through interlayer coupling; The thirteenth electrode plate (P13) and the eighteenth electrode plate (P18) together form the fifth equivalent capacitance C5 through interlayer coupling; The second electrode plate (P2) is connected end to end via the fourth via (H4) and the third via (H3), together forming the sixth equivalent inductance L6; The tenth electrode plate (P10) and the seventeenth electrode plate (P17) together form the fourth equivalent capacitance C4 through interlayer coupling; The fourteenth electrode plate (P14) and the eighteenth electrode plate (P18) together form the sixth equivalent capacitance C6 through interlayer coupling; The seventh electrode plate (P7), the fourth electrode plate (P4), the third electrode plate (P3), and the sixth electrode plate (P6) are connected end to end via the tenth via (H10), the seventh via (H7), the sixth via (H6), the fifth via (H5), and the ninth via (H9), together forming the seventh equivalent inductance L7.

2. The miniature frequency divider for 5G bands according to claim 1, characterized in that, The first electrode plate (P1) and the fifth electrode plate (P5) are also connected to the common port (1) via the first via (H1); the twentieth electrode plate (P20) is also connected to the low-frequency channel output port (2) via the seventeenth via (H17); the eighteenth electrode plate (P18) is also connected to the high-frequency channel output port (3) via the fifteenth via (H15); and the nineteenth electrode plate (P19) is also connected to the first ground port (4), the third ground port (6), the fourth ground port (7), the fifth ground port (8), and the sixth ground port (9) via the ninth via (H9), the fourteenth via (H14), the eighteenth via (H18), and the nineteenth via (H19).

3. The miniature frequency divider for 5G bands according to claim 1, characterized in that, In the low-frequency channel filter, one end of the first equivalent inductor L1 is connected to the common port (1) via the first via (H1), and the other end is connected to one end of the first equivalent capacitor C1 and one end of the second equivalent capacitor C2 via the second via (H2), and is connected to one end of the third equivalent inductor L3 via the eleventh via (H11). The other end of the first equivalent capacitor C1 is connected to one end of the second equivalent inductor L2 via the thirteenth via (H13). The other end of the second equivalent inductor L2 is connected to the first ground port (4) via the sixteenth via (H16). The other end of the second equivalent capacitor C2 and the other end of the third equivalent inductor L3 are connected to one end of the fourth equivalent inductor L4 via the twelfth via (H12). The other end of the fourth equivalent inductor L4 is connected to the low-frequency channel output port (2) via the seventeenth via (H17). In the high-frequency channel filter, one end of the fifth equivalent inductor L5 is connected to the common port (1) via the first via (H1), and the other end is connected to one end of the third equivalent capacitor C3 via the eighth via (H8). The other end of the third equivalent capacitor C3 is connected to one end of the fifth equivalent capacitor C5 and the fourth equivalent capacitor C4, respectively, and is connected to one end of the sixth equivalent inductor L6 via the fourth via (H4). The other end of the sixth equivalent inductor L6 is connected to one end of the fourth equivalent capacitor C4 via the third via (H3). The fourth equivalent capacitor C4... The other end is connected to the first ground port (4) via the fourteenth via (H14). The other end of the fifth equivalent capacitor C5 is connected to one end of the sixth equivalent capacitor C4 via the fifteenth via (H15) and the high-frequency channel output port (3). The other end of the sixth equivalent capacitor C6 is connected to one end of the seventh equivalent inductor L7 via the sixth via (H6), the seventh via (H7) and the tenth via (H10). The other end of the seventh equivalent inductor L7 is connected to the first ground port (4) via the fifth via (H5) and the ninth via (H9).

4. The miniature frequency divider for 5G bands according to claim 1, characterized in that, The external electrode is encapsulated using a planar grid array (LGA).

5. The miniature frequency divider for 5G bands according to claim 1, characterized in that, The miniature frequency divider also includes a marker (10) located on the opposite side of the LTCC ceramic body to the external electrode.

6. The miniature frequency divider for 5G bands according to claim 1, characterized in that, The circuit layer is embedded in the LTCC ceramic body using a low-temperature co-fired ceramic process.

7. The miniature frequency divider for 5G bands according to claim 1, characterized in that, The circuit layer uses an embedded metal material, which includes copper or palladium-silver.

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