Parallel type super capacitor backup power supply circuit
Patent Information
- Application Number
- CN202522075286.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-26
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2035-09-26
AI Technical Summary
比如ADI的LT3350集成电路,其功能齐全,但是价格昂贵
本实用新型提出的一种并联式超级电容备份电源电路能够在保持较低成本的情况下,实现一个功能完备,高性能,高效率可以灵活支持多节超级电容的备份电源电路。本发明在使用便宜的元器件的情况下实现了对超级电容的恒流充电,因为R1作为采样电阻可以在图4中使用低阻值的电阻,可以通过配合三极管在更大输入电源范围内保持恒流,而不会因为使用电阻直接限流导致充电时间大量延长。恒流充电保证了超级电容对充电电流的要求,也在满足充电时间的要求下,降低了对输入电源功率的要求。增加了充电使能电路可以在超级电容供电的情况下,通过将CHG_EN电平拉高来禁止超级电容的充电,节省备份电源的能量。通过增加均充电路使电路支持多节超级电容串联来提高备份电源的容量。使用升降压电路进一步有效的利用了超级电容的容量。
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Figure CN224909105U_ABST
Abstract
Description
Technical Field
[0001] This invention proposes a parallel supercapacitor backup power supply circuit, belonging to the field of power supply circuit technology. Background Technology
[0002] This technology is used for industrial equipment that needs to operate for a period of time after an AC power outage. In applications, data acquisition or control devices often need to completely store and upload data or complete control logic after a mains power failure. The entire device also needs to operate for a long time in harsh industrial environments. Using batteries as backup power may have limitations in terms of size, safety, temperature adaptability, and lifespan. For example, lead-acid batteries are safe but have low energy density and poor low-temperature performance; lithium batteries have high energy density but also have poor low-temperature performance and may pose a fire hazard at high temperatures. Both have short lifespans. Supercapacitors, on the other hand, have advantages such as fast charging speed, high discharging efficiency, long cycle life, wide temperature range, and good safety performance, making them particularly suitable for use as a backup power source for short-term power outages in industrial environments. By connecting multiple supercapacitor modules in parallel, the capacity of the backup power supply can be flexibly adjusted according to load requirements, thereby ensuring continuous power supply to critical equipment after a mains power outage.
[0003] The power supply structure of supercapacitors in existing technologies is typically as follows: Method 1: For example Figure 1 As shown, the supercapacitor is charged directly through a series resistor, and discharged through a series diode to prevent backflow. R1 limits the charging current. This circuit is characterized by a maximum charging current initially, which decreases as the voltage across the supercapacitor increases. Therefore, the resistance value of R1 needs to be relatively high, with a narrow selection range. The charging speed and maximum charging current limits may not be simultaneously met. R1 also consumes a significant amount of power, and D1 has a certain voltage drop, resulting in a lower output voltage. The biggest problem is that when the capacitor voltage drops, due to undervoltage, the energy within the capacitor cannot be supplied to the load circuit for normal operation, leading to low capacitor utilization. The advantage is a simple circuit with the lowest cost.
[0004] Method 2: For example Figure 2 As shown, the supercapacitor is charged directly through a series resistor and discharged through a series diode to prevent backflow. R2 limits the charging current. This circuit is characterized by a maximum charging current initially, which decreases as the voltage across the supercapacitor increases. Therefore, the resistance value of R2 needs to be relatively high, with a narrow selection range. The charging speed and maximum charging current limits may not be simultaneously met. R1 also consumes a significant amount of power, and D1 has a certain voltage drop, resulting in a lower output voltage. By boosting the capacitor's voltage, the capacitor's energy can be further released, significantly improving capacitor utilization compared to the first method.
[0005] Method 3: For example Figure 3 As shown, an ASIC is used to implement the charging and boosting / discharging of the supercapacitor. Path management enables automatic switching between the external input power supply and the backup power supply boosted by the supercapacitor, effectively utilizing the supercapacitor's capacity and reducing the number of components. For example, ADI's LT3350 integrated circuit is feature-rich but expensive. A drawback is that the backup power supply is connected in series; if the ASIC fails or malfunctions, it will affect the main power supply. Utility Model Content
[0006] This utility model provides a parallel supercapacitor backup power supply circuit to solve the technical problems existing in the prior art. The technical solution adopted is as follows: A parallel supercapacitor backup power supply circuit includes a constant current charging module, an equalization charging module, and a buck-boost circuit module; the constant current charging module and the equalization charging module are electrically connected; the equalization charging module and the buck-boost circuit module are electrically connected through a filter capacitor C2.
[0007] Furthermore, the constant current charging module includes a resistor R1, a field-effect transistor Q1, a transistor Q2, a resistor R3, and a charging control circuit; wherein, one end of the resistor R1 is connected to the emitter terminal of the transistor Q2; the other end of the resistor R1 is connected to the base terminal of the transistor Q2; the source terminal of the field-effect transistor Q1 is connected to one end of the resistor R3; the other end of the resistor R3 is connected to the collector terminal of the transistor Q2, the gate terminal of the field-effect transistor Q1, and one end of the charging control circuit composed of R5 and the filter capacitor C13; the drain terminal of the field-effect transistor Q1 is the output terminal of the constant current charging circuit.
[0008] Furthermore, the charging control circuit includes a resistor R5 and a capacitor C13; wherein, one end of the resistor R5 is connected to the CHG_EN level signal terminal, and the other end of the resistor R5 is connected to the gate terminal of the field-effect transistor Q1 and one end of the capacitor C13 respectively; at the same time, the other end of the capacitor C13 is connected to the ground terminal.
[0009] Furthermore, the equalization charging module includes a first voltage divider circuit module and a second voltage divider circuit module; wherein the first voltage divider circuit module and the second voltage divider circuit module are connected in series.
[0010] Further, the first voltage divider circuit module includes a capacitor E1, a field-effect transistor Q3, a resistor R14, a resistor R10, and a first comparison reference circuit module; wherein, the positive terminal of the capacitor E1 is connected to the drain terminal of the field-effect transistor Q1 and the source terminal of the field-effect transistor Q3; the drain terminal of the field-effect transistor Q3 is connected to one end of the resistor R14; one end of the resistor R10 is connected to the gate terminal of the field-effect transistor Q3, and the other end of the resistor R10 is connected to the first comparison reference circuit module.
[0011] Further, the first comparison reference circuit module includes a resistor R11, a programmable precision reference IC2, a capacitor C10, a resistor R12, and a resistor R16; wherein, one end of the resistor R11 is connected to the other end of the resistor R10 and the K pin of the programmable precision reference IC2; the other end of the resistor R11 is connected to one end of the resistor R12, the source of the field-effect transistor Q3, and the constant current charging module; the negative terminal of the capacitor E1, the A pin of the programmable precision reference IC2, one end of the capacitor C10, and one end of the resistor R16 are respectively connected to the other end of the resistor R14; the other end of the resistor R12 is connected to the R pin of the programmable precision reference IC2, the other end of the capacitor C10, and the other end of the resistor R16.
[0012] Further, the second voltage divider circuit module includes a capacitor E2, a field-effect transistor Q4, a resistor R21, a resistor R17, and a second comparison reference circuit module; wherein, the positive terminal of the capacitor E2 is connected to the drain terminal of the field-effect transistor Q1 and the source terminal of the field-effect transistor Q4; the drain terminal of the field-effect transistor Q4 is connected to one end of the resistor R21; one end of the resistor R17 is connected to the gate terminal of the field-effect transistor Q4, and the other end of the resistor R17 is connected to the second comparison reference circuit module.
[0013] Further, the second comparison reference circuit module includes a resistor R18, a programmable precision reference IC3, a capacitor C11, a resistor R19, and a resistor R23; wherein, one end of the resistor R18 is connected to the other end of the resistor R17 and the K pin of the programmable precision reference IC3; the other end of the resistor R18 is connected to one end of the resistor R19, the source of the field-effect transistor Q4, and the first voltage divider circuit module; the negative terminal of the capacitor E2, the A pin of the programmable precision reference IC3, one end of the capacitor C11, and one end of the resistor R23 are respectively connected to the other end of the resistor R21; the other end of the resistor R19 is connected to the R pin of the programmable precision reference IC3, the other end of the capacitor C110, and the other end of the resistor R23.
[0014] Furthermore, the programmable precision reference IC2 and programmable precision reference IC3 adopt TL431 or similar functional integrated circuits.
[0015] Furthermore, the buck-boost circuit module uses a boost or buck integrated circuit.
[0016] The beneficial effects of this utility model are: This invention proposes a parallel supercapacitor backup power supply circuit that achieves a fully functional, high-performance, and high-efficiency backup power supply circuit capable of flexibly supporting multiple supercapacitors while maintaining low cost. This invention achieves constant current charging of the supercapacitor using inexpensive components, because R1, as a sampling resistor, can... Figure 4 Using low-resistance resistors, in conjunction with transistors, maintains a constant current over a wider input power range without significantly extending charging time due to direct current limiting by resistors. Constant current charging ensures the supercapacitor meets the charging current requirements while reducing the power requirements of the input power supply, thus satisfying charging time requirements. The addition of a charging enable circuit allows the supercapacitor to be disabled from charging by pulling the CHG_EN level high when powered by the supercapacitor, saving energy from the backup power supply. The addition of an equalizing charging circuit allows the circuit to support multiple supercapacitors connected in series, increasing the backup power supply capacity. The use of a buck-boost circuit further optimizes the utilization of the supercapacitor's capacity. Attached Figure Description
[0017] Figure 1 The circuit diagram is a prior art diagram of this utility model. Figure 1 ; Figure 2 The circuit diagram is a prior art diagram of this utility model. Figure 2 ; Figure 3 The circuit diagram is a prior art diagram of this utility model. Figure 3 ; Figure 4 This is a circuit diagram of the parallel supercapacitor backup power supply circuit described in this utility model. Detailed Implementation
[0018] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.
[0019] The present invention will be further described below with reference to specific embodiments, but the present invention is not limited to the embodiments.
[0020] In the description of this utility model, it should be noted that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer" and "vertical" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0021] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; or they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0022] Furthermore, in the description of this utility model, unless otherwise stated, "multiple", "multiple groups", and "multiple roots" mean two or more.
[0023] Unless otherwise specified, the materials, instruments and methods used in the following embodiments are all conventional materials, instruments and methods in the art and can be obtained through commercial channels. Example
[0024] This embodiment proposes a parallel supercapacitor backup power supply circuit, such as... Figure 4 As shown, the parallel supercapacitor backup power supply circuit includes a constant current charging module, an equalizing charging module, and a buck-boost circuit module; the constant current charging module and the equalizing charging module are electrically connected; the equalizing charging module and the buck-boost circuit module are electrically connected through a filter capacitor C2. The buck-boost circuit module uses a boost or buck integrated circuit.
[0025] The constant current charging module includes a charging control circuit consisting of a resistor R1, a field-effect transistor Q1, a transistor Q2, a resistor R3, a resistor R5, and a filter capacitor C13. One end of resistor R1 is connected to the emitter of transistor Q2; the other end of resistor R1 is connected to the base of transistor Q2. The source of field-effect transistor Q1 is connected to one end of resistor R3, and the other end of resistor R3 is connected to the collector of transistor Q2, the gate of field-effect transistor Q1, and one end of the charging control circuit consisting of R5 and filter capacitor C13. The drain of field-effect transistor Q1 is the output terminal of the constant current charging circuit. Specifically, the charging control circuit consisting of resistor R5 and filter capacitor C13 includes resistor R5 and capacitor C13. One end of resistor R5 is connected to the CHG_EN level signal terminal, and the other end of resistor R5 is connected to the gate of field-effect transistor Q1 and one end of capacitor C13. The other end of capacitor C13 is connected to ground.
[0026] The equalization charging module includes a first voltage divider circuit module and a second voltage divider circuit module; wherein the first voltage divider circuit module and the second voltage divider circuit module are connected in series.
[0027] Specifically, the first voltage divider circuit module includes a capacitor E1, a field-effect transistor Q3, a resistor R14, a resistor R10, and a first comparison reference circuit module; wherein, the positive terminal of the capacitor E1 is connected to the drain terminal of the field-effect transistor Q1 and the source terminal of the field-effect transistor Q3; the drain terminal of the field-effect transistor Q3 is connected to one end of the resistor R14; one end of the resistor R10 is connected to the gate terminal of the field-effect transistor Q3, and the other end of the resistor R10 is connected to the first comparison reference circuit module. The first comparison reference circuit module includes a resistor R11, a programmable precision reference IC2, a capacitor C10, a resistor R12, and a resistor R16. One end of resistor R11 is connected to the other end of resistor R10 and the K pin of programmable precision reference IC2. The other end of resistor R11 is connected to one end of resistor R12, the source of the field-effect transistor Q3, and the constant current charging module. The negative terminal of capacitor E1, the A pin of programmable precision reference IC2, one end of capacitor C10, and one end of R16 are respectively connected to the other end of resistor R14. The other end of resistor R12 is connected to the R pin of programmable precision reference IC2, the other end of capacitor C10, and the other end of resistor R16.
[0028] The second voltage divider circuit module includes a capacitor E2, a field-effect transistor Q4, a resistor R21, a resistor R17, and a second comparison reference circuit module; wherein, the positive terminal of the capacitor E2 is connected to the drain terminal of the field-effect transistor Q1 and the source terminal of the field-effect transistor Q4; the drain terminal of the field-effect transistor Q4 is connected to one end of the resistor R21; one end of the resistor R17 is connected to the gate terminal of the field-effect transistor Q4, and the other end of the resistor R17 is connected to the second comparison reference circuit module. The second comparison reference circuit module includes a resistor R18, a programmable precision reference IC3, a capacitor C11, a resistor R19, and a resistor R23; wherein, one end of the resistor R18 is connected to the other end of the resistor R17 and the K pin of the programmable precision reference IC3; the other end of the resistor R18 is connected to one end of the resistor R19, the source of the field-effect transistor Q4, and the first voltage divider circuit module; the negative terminal of the capacitor E2, the A pin of the programmable precision reference IC3, one end of the capacitor C11, and one end of the resistor R23 are respectively connected to the other end of the resistor R21; the other end of the resistor R19 is connected to the R pin of the programmable precision reference IC3, the other end of the capacitor C110, and the other end of the resistor R23.
[0029] Meanwhile, the programmable precision reference IC2 and programmable precision reference IC3 adopt TL431 or similar functional integrated circuits.
[0030] The working principle of the above technical solution is as follows: The parallel supercapacitor backup power supply circuit proposed in this embodiment achieves constant current charging of the supercapacitor using inexpensive components, because resistor R1, as a sampling resistor, can... Figure 4 Using low-resistance resistors, in conjunction with transistors, maintains a constant current over a wider input power range without significantly extending charging time due to direct current limiting by resistors. Constant current charging ensures the supercapacitor meets the charging current requirements while reducing the power requirements of the input power supply, thus satisfying charging time requirements. The addition of a charging enable circuit allows the supercapacitor to be disabled from charging by pulling the CHG_EN level high when powered by the supercapacitor, saving energy from the backup power supply. The addition of an equalizing charging circuit allows the circuit to support multiple supercapacitors connected in series, increasing the backup power supply capacity. The use of a buck-boost circuit further optimizes the utilization of the supercapacitor's capacity.
[0031] Specifically, such as Figure 4As shown, V+ is connected to one end of resistor R1 and the emitter of transistor Q2. The other end of resistor R1 is connected to the base of transistor Q2, the source (S) of MOSFET Q1, and one end of resistor R3. The other end of resistor R3 is connected to the collector of transistor Q2, the gate of MOSFET Q1, resistor R5, and one end of capacitor C13. The drain of MOSFET Q1 is the output of the constant current charging circuit. When the voltage generated by the current flowing through resistor R1 reaches 0.6V, transistor Q2 turns on, MOSFET Q1 turns off, the current decreases, the voltage across resistor R1 decreases, transistor Q2 turns off, and MOSFET Q1 turns on. This process repeats to achieve the function of constant current charging.
[0032] The positive terminal of capacitor E1 is connected to the drain of MOSFET Q1, the source of MOSFET Q3, and one end of resistors R11 and R12. The drain of Q3 is connected to one end of resistor R14. The other end of resistor R14 is connected to the negative terminal of E1, pin A of programmable precision reference IC2, one end of capacitor C10, and one end of resistor R16. The other end of resistor R11 is connected to one end of resistor R10 and pin K of programmable precision reference IC2. The other end of resistor R10 is connected to the gate of Q3. The other end of resistor R12 is connected to pin R of programmable precision reference IC2, the other end of capacitor C10, and the other end of resistor R16. The programmable precision reference IC2 is a parallel controllable reference source operating in open-loop comparator mode. The voltage divided by resistors R12 and R16 is compared with the internal reference voltage of the programmable precision reference IC2. When the voltage between the positive and negative terminals of capacitor E1 exceeds the set voltage, the field-effect transistor Q3 conducts, and most of the current flows through resistor R14, thereby changing the voltage division ratio between capacitors E1 and E2. Ultimately, this ensures that the voltage across E1 does not exceed the set voltage, such as 2.7V for a 3V supercapacitor. Similarly, the components to the right of E2 operate on the same principle. Each additional supercapacitor is paired with a corresponding circuit to achieve balanced charging.
[0033] One end of capacitor C2 is connected to the positive terminal of capacitor E1, and the other end is grounded, serving as a filter. For example... Figure 4 As shown, the buck-boost circuit module IC1 and its surrounding circuits form a buck-boost circuit. The output voltage is determined by the ratio of resistors R4 and R7. The output voltage is set to be 0.3~0.5V lower than the main power supply voltage, so that the backup power supply provides power when the main power supply fails. When the main power supply is active, IC1 operates in standby mode, and the internal switch stops working. If the main power supply fails, when the voltage across capacitor C4 drops to 0.3~0.5V lower than the normal main power supply operating voltage, the internal switch of the buck-boost circuit module IC1 switches normally, and finally the backup power supply output voltage remains 0.3~0.5V lower than the normal main power supply operating voltage.
[0034] Meanwhile, the buck-boost circuit module IC1 can be a general-purpose boost or buck-boost integrated circuit, while the programmable precision reference IC2 and IC3 are commonly used TL431 or similar functional integrated circuits.
[0035] The technical effects of the above-mentioned technical solution are as follows: The parallel supercapacitor backup power supply circuit proposed in this utility model can achieve a fully functional, high-performance, and high-efficiency backup power supply circuit that can flexibly support multiple supercapacitors while maintaining a low cost. This invention achieves constant current charging of the supercapacitor using inexpensive components, because R1, as a sampling resistor, can... Figure 4 Using low-resistance resistors allows for constant current maintenance over a wider input power range by working with transistors, avoiding the significant extension of charging time caused by direct current limiting with resistors. Constant current charging ensures the supercapacitor meets the charging current requirements while reducing the power requirements of the input power supply, thus satisfying charging time requirements. The addition of a charging enable circuit allows the supercapacitor to be disabled from charging by pulling the CHG_EN level high when powered by the supercapacitor, saving energy from the backup power supply. The addition of an equalizing charging circuit enables the circuit to support multiple supercapacitors connected in series, increasing the capacity of the backup power supply. The use of a buck-boost circuit further effectively utilizes the supercapacitor's capacity. Furthermore, compared to existing technologies, this invention improves the charging management circuit, achieving precise control of the charging current, ensuring charging time and minimizing input power requirements, while controlling whether charging occurs. The addition of an equalizing charging circuit supports multiple supercapacitors connected in series, reducing voltage drop on the line and improving overall capacity utilization. The parallel connection method is simple and direct, ensuring that even if the backup power supply fails, it will not affect the main power supply. The use of conventional components facilitates procurement and reduces costs.
[0036] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.
Claims
1. A parallel supercapacitor backup power supply circuit, characterized in that, The parallel supercapacitor backup power supply circuit includes a constant current charging module, an equalization charging module, and a buck-boost circuit module; the constant current charging module and the equalization charging module are electrically connected; the equalization charging module and the buck-boost circuit module are electrically connected through a filter capacitor C2. The constant current charging module includes a resistor R1, a field-effect transistor Q1, a transistor Q2, a resistor R3, and a charging control circuit. One end of the resistor R1 is connected to the emitter of the transistor Q2, and the other end of the resistor R1 is connected to the base of the transistor Q2. The source of the field-effect transistor Q1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the collector of the transistor Q2, the gate of the field-effect transistor Q1, and one end of the charging control circuit composed of a resistor R5 and a filter capacitor C13. The drain of the field-effect transistor Q1 is the output terminal of the constant current charging circuit.
2. The parallel supercapacitor backup power supply circuit according to claim 1, characterized in that, The charging control circuit includes a resistor R5 and a capacitor C13; one end of the resistor R5 is connected to the CHG_EN level signal terminal, and the other end of the resistor R5 is connected to the gate terminal of the field-effect transistor Q1 and one end of the capacitor C13; at the same time, the other end of the capacitor C13 is connected to the ground terminal.
3. The parallel supercapacitor backup power supply circuit according to claim 1, characterized in that, The equalization charging module includes a first voltage divider circuit module and a second voltage divider circuit module; wherein the first voltage divider circuit module and the second voltage divider circuit module are connected in series.
4. The parallel supercapacitor backup power supply circuit according to claim 3, characterized in that, The first voltage divider circuit module includes a capacitor E1, a field-effect transistor Q3, a resistor R14, a resistor R10, and a first comparison reference circuit module; wherein, the positive terminal of the capacitor E1 is connected to the drain terminal of the field-effect transistor Q1 and the source terminal of the field-effect transistor Q3; the drain terminal of the field-effect transistor Q3 is connected to one end of the resistor R14; one end of the resistor R10 is connected to the gate terminal of the field-effect transistor Q3, and the other end of the resistor R10 is connected to the first comparison reference circuit module.
5. The parallel supercapacitor backup power supply circuit according to claim 4, characterized in that, The first comparison reference circuit module includes a resistor R11, a programmable precision reference IC2, a capacitor C10, a resistor R12, and a resistor R16. One end of resistor R11 is connected to the other end of resistor R10 and the K pin of programmable precision reference IC2. The other end of resistor R11 is connected to one end of resistor R12, the source of the field-effect transistor Q3, and the constant current charging module. The negative terminal of capacitor E1, the A pin of programmable precision reference IC2, one end of capacitor C10, and one end of R16 are respectively connected to the other end of resistor R14. The other end of resistor R12 is connected to the R pin of programmable precision reference IC2, the other end of capacitor C10, and the other end of resistor R16.
6. The parallel supercapacitor backup power supply circuit according to claim 3, characterized in that, The second voltage divider circuit module includes a capacitor E2, a field-effect transistor Q4, a resistor R21, a resistor R17, and a second comparison reference circuit module; wherein, the positive terminal of the capacitor E2 is connected to the drain terminal of the field-effect transistor Q1 and the source terminal of the field-effect transistor Q4; the drain terminal of the field-effect transistor Q4 is connected to one end of the resistor R21; one end of the resistor R17 is connected to the gate terminal of the field-effect transistor Q4, and the other end of the resistor R17 is connected to the second comparison reference circuit module.
7. The parallel supercapacitor backup power supply circuit according to claim 6, characterized in that, The second comparison reference circuit module includes a resistor R18, a programmable precision reference IC3, a capacitor C11, a resistor R19, and a resistor R23; wherein, one end of the resistor R18 is connected to the other end of the resistor R17 and the K pin of the programmable precision reference IC3; the other end of the resistor R18 is connected to one end of the resistor R19, the source of the field-effect transistor Q4, and the first voltage divider circuit module; the negative terminal of the capacitor E2, the A pin of the programmable precision reference IC3, one end of the capacitor C11, and one end of the resistor R23 are respectively connected to the other end of the resistor R21; the other end of the resistor R19 is connected to the R pin of the programmable precision reference IC3, the other end of the capacitor C11, and the other end of the resistor R23.
8. The parallel supercapacitor backup power supply circuit according to claim 5 or 7, characterized in that, The programmable precision reference IC2 and programmable precision reference IC3 are based on the TL431 integrated circuit.
9. The parallel supercapacitor backup power supply circuit according to claim 1, characterized in that, The buck-boost circuit module uses either a boost or buck circuit.