Self-powered enhanced-gaN power device with wide voltage input range

Abstract

The utility model relates to the field of integrated circuit and wide band gap semiconductor technology, more specifically, a kind of wide voltage input range's self-powered enhancement mode GaN power device, mainly including PWM module, input module, power supply unit and opening-off module, by above-mentioned structure, compatible Si-based power MOSFET driver, can replace traditional Si-based power MOSFET or IGBT in situ.Support wide PWM input voltage range: low level 0V, high level 10-24V, to expand application scenarios.Through the coordinated power supply of PWM and drain, the Miller clamp after the GaN power tube device is realized.When PWM is low, the capacitor is powered by high-voltage input VDD generator;When PWM is high, the capacitor is powered by low-voltage input VDD generator, ensuring that PWM can provide voltage for power supply capacitor when high and low level.This scheme reduces the requirement for power supply capacitor area, and can save circuit area.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuits and wide bandgap semiconductor technology, and more specifically, to a self-powered enhanced GaN power device with a wide voltage input range. Background Technology

[0002] Wide-bandgap semiconductor materials, especially gallium nitride (GaN), have become core materials for next-generation power devices due to their superior properties such as high critical breakdown electric field, high electron saturation drift velocity, and extremely high electron mobility. Compared with traditional silicon (Si)-based power MOSFETs and insulated-gate bipolar transistors (IGBTs), GaN HEMT power devices can significantly reduce switching and conduction losses, and increase operating frequency by an order of magnitude, thereby enabling power converters to achieve higher power density and smaller size.

[0003] However, GaN power devices are currently difficult to replace Si MOSFET power devices in situ. This is because the maximum gate voltage of GaN power transistors does not exceed 7V, making it difficult to drive them directly with high-voltage output Si MOSFET power device drivers. Si MOSFET power device drivers have weak current sinking capability, and there are resistors and diodes connected in series in the turn-off path. During the rapid rise of the drain, GaN power transistors are easily mis-turned on. Utility Model Content

[0004] The purpose of this invention is to provide a self-powered enhanced GaN power device with a wide voltage input range to solve the problem that GaN power devices are difficult to replace Si MOSFET power devices in situ in the prior art.

[0005] This utility model is achieved through the following technical solution: A self-powered enhancement-mode GaN power device with a wide input voltage range, comprising: The power supply unit is used to supply power to other modules; Preferably, the power supply unit includes a high-voltage input VDD generator, a low-voltage input VDD generator, a first transistor, a capacitor, and a voltage regulator. The voltage regulator is connected to the capacitor, the high-voltage input VDD generator, and the low-voltage input VDD generator, respectively. The other end of the high-voltage input VDD generator is connected to the first transistor, and the other end of the low-voltage input VDD generator is connected to the input detection module and the on / off module.

[0006] Preferably, the turn-on / turn-off module includes a second transistor, a third transistor, a fourth transistor, a first diode, a second diode, a third diode, and a resistor; One end of the second transistor and the third transistor are connected to the driving module, the other end of the second transistor is connected to the resistor, the fourth transistor and the first diode, and the other end of the third transistor is connected to the fourth transistor and the GaN power transistor. The other end of the first diode is connected to the second diode, and both ends of the third diode are connected to the fourth transistor.

[0007] Preferably, it also includes a bandgap reference module and an over-temperature protection module, wherein the bandgap reference module is connected to the over-temperature protection module.

[0008] Preferably, the output voltage of the high-voltage input VDD generator and the low-voltage input VDD generator is 6.9V.

[0009] Preferably, the GaN power transistor is a three-terminal MOS device.

[0010] Preferably, the PWM module is connected to the gate terminal of the GaN power transistor, the first transistor is connected to the drain terminal of the GaN power transistor, and the source terminal of the GaN power transistor is grounded.

[0011] The technical solution of this utility model has at least the following advantages and beneficial effects: The structure provided in this invention is compatible with Si-based power MOSFET drivers and can replace traditional Si-based power MOSFETs or IGBTs in situ. The solution supports a wide PWM input voltage range: 0V for low levels and 10-24V for high levels, expanding application scenarios. Miller clamping after the GaN power transistor is turned off is achieved through coordinated power supply of PWM and drain. When the PWM is low, the capacitor is powered by a high-voltage input VDD generator; when the PWM is high, the capacitor is powered by a low-voltage input VDD generator, ensuring that the PWM provides voltage to the power supply capacitor at both high and low levels. This solution reduces the area requirement of the power supply capacitor, saving circuit area. Simultaneously, this design ensures that the power supply capacitor can stably output 6.9V to power the VDD generator. Furthermore, it ensures protection functions during both GaN device turn-on and turn-off. Attached Figure Description

[0012] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a schematic diagram of the connection structure of this utility model; Figure 2 This is a simulation waveform diagram of the gate voltage of the GaN power transistor when the input high level at the G terminal is 10V. Figure 3 This is a simulation waveform diagram of the gate voltage of the GaN power transistor when the input high level at the G terminal is 10V. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0015] The markings in the diagram are explained in relation to the content of this article. M1 is a capacitor, M2 is the first transistor (NJFETN type junction field-effect transistor), M1 is the second transistor (high voltage N-type LDMOS transistor), and M2 is the third transistor (high voltage N-type LDMOS transistor). The fourth transistor is a high-voltage N-type LDMOS transistor. R1 is a resistor, D1 is the first diode, D2 is the second diode, D3 is the third diode, and GaN is a GaN power transistor.

[0016] Please refer to Figures 1-2 A self-powered enhancement-mode GaN power device with a wide input voltage range, comprising: The input module is used to detect the current output level signal of the G terminal input signal; The power supply unit is used to supply power to the input module; The power switch module is used to turn the GaN power transistor on and off. The input module is connected to the on / off module, and the power supply module is connected to both the input module and the on / off module.

[0017] The structure provided by this invention supports a wide G-terminal input voltage range: 0V for low level and 10-24V for high level. Miller clamping is achieved after the GaN power transistor is turned off through coordinated gate and drain power supply. When the G-terminal input signal is low, the capacitor is powered through a high-voltage input VDD generator; when the G-terminal input signal is high, the capacitor is powered through a low-voltage input VDD generator.

[0018] In one exemplary embodiment of this utility model, the input module includes an input detection module and a driver module, wherein the input detection module is connected to the driver module. The input detection module can be of model NCP302 or NCP303, and the driver module can be of model EiceDRIVER™, 1EDN751x, or DX1001A.

[0019] In one exemplary embodiment of this utility model, the power supply unit includes a high-voltage input VDD generator, a low-voltage input VDD generator, a first transistor, a capacitor, and a voltage regulator. The voltage regulator is connected to the capacitor, the high-voltage input VDD generator, and the low-voltage input VDD generator, respectively. The other end of the high-voltage input VDD generator is connected to the first transistor, and the other end of the low-voltage input VDD generator is connected to the input detection module and the on / off module.

[0020] In one exemplary embodiment of this utility model, the turn-on / turn-off module includes a second transistor, a third transistor, a fourth transistor, a first diode, a second diode, a third diode, and a resistor; One end of the second and third transistors is connected to the driving module, and the other end of the second transistor is connected to the resistor and the fourth transistor. The third transistor is connected to the first diode, and the other end of the third transistor is connected to the fourth transistor and the GaN power transistor. The other end of the first diode is connected to the second diode, and both ends of the third diode are connected to the fourth transistor.

[0021] Among them, the input detection module, the driver module, M1, The pull-up network formed by the clamping network and the pull-down network formed by the input detection module, the driver module, and M2.

[0022] When the PWM signal goes high, the capacitor is charged by the low-voltage input VDD generator, and global power supply is achieved through the voltage regulator. Simultaneously, the input module sends a low-level signal to the gates of M1 and M2, turning them off. A clamping network is then used to... The gate voltage is maintained at 7.8V to turn on. ,pass For GaN Charging raises the gate voltage to 6.4V, turning it on.

[0023] When the PWM signal is pulled low, i.e., when the D signal is pulled high, the power supply capacitor is supplied through the high-voltage input VDD generator. Charging is achieved through a voltage regulator that provides global power. Simultaneously, the input module transmits a high-level signal to the gates of M1 and M2, which is then quickly pulled low. The gate voltage turns it off. Simultaneously, due to the activation of M2, a low-resistance path is formed from the GaN gate to ground, rapidly dissipating the GaN transistor. The charge in it is turned off.

[0024] When the input signal PWM is high and the D signal is low, the low-voltage input VDD generator starts working, providing voltage output and maintaining the power supply capacitor at 6.9V; When the input signal PWM is low and the D signal is high, the high-voltage input VDD generator starts working, providing voltage output and maintaining the power supply capacitor at 6.9V.

[0025] The power supply capacitor provides the operating voltage for the voltage regulator and generates three 5V power rails. LAVDD powers the high-voltage input VDD generator and the low-voltage input VDD generator, LDVDD powers the high-voltage input VDD generator, the low-voltage input VDD generator and the input detection module, and VDRC powers the input detection module and the drive module.

[0026] The aim is to separate the drive power rail from the analog and digital power rails, thus avoiding the adverse effects of large jitter on the digital and analog circuits caused by high current and package bonding wires on the drive power rail. Further separation of the digital and analog power rails minimizes analog power supply jitter.

[0027] The input detection module employs a hysteresis threshold design, with hysteresis thresholds of 3.3V and 3.95V. When the input signal at the G terminal rises above 3.95V, the driver module outputs a low level; when the input signal at the G terminal falls below 3.3V, the driver module outputs a high level.

[0028] NJFET power supply devices: The design incorporates a 700V NJFET device at the D terminal, with a turn-off threshold voltage greater than 20V and a current capability of 5mA@VGS=-17V. When the D terminal signal is low, no current flows through the NJFET, and the capacitor is powered by a low-voltage input VDD generator. When the D terminal signal is high, the NJFET provides current, activating the high-voltage input VDD generator to power the capacitor.

[0029] Over-temperature protection module: It also includes a bandgap reference module and an over-temperature protection module. The bandgap reference module is connected to the over-temperature protection module. The bandgap reference module provides the over-temperature protection module with a temperature-drift-free operating voltage, and the over-temperature protection module implements the over-temperature protection function.

[0030] Overall: The gate and drain self-driven GaN power transistor utilizes the power supply unit, input detection module, and pull-up / pull-down network to achieve coordinated power supply to the gate and drain, resulting in reduced circuit area and ensuring that the power supply capacitor can stably output 6.9V for stable circuit operation.

[0031] The gate and drain self-driven GaN power transistor is equivalent to a four-terminal MOS device, namely the G terminal, K terminal, D terminal, and S terminal. The PWM input terminal of the scheme corresponds to the Gate terminal of the MOS device, the D terminal of the scheme corresponds to the Drain terminal of the MOS device, and the S terminal of the scheme corresponds to the Source terminal of the MOS device, and has a Kelvin pin.

[0032] The above are merely preferred embodiments of this utility model and are not intended to limit the scope of this utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A self-powered enhancement-type GaN power device with a wide input voltage range, characterized in that, include: The input module is used to detect the current PWM signal output level. The power supply unit is used to supply power to the input module; The power switch module is used to turn the GaN power transistor on and off. The input module is connected to the on / off module, and the power supply module is connected to both the input module and the on / off module.

2. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 1, characterized in that, The input module includes an input detection module and a driver module, and the input detection module is connected to the driver module.

3. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 2, characterized in that, The power supply unit includes a high-voltage input VDD generator, a low-voltage input VDD generator, a first transistor, a capacitor, and a voltage regulator. The voltage regulator is connected to the capacitor, the high-voltage input VDD generator, and the low-voltage input VDD generator, respectively. The other end of the high-voltage input VDD generator is connected to the first transistor, and the other end of the low-voltage input VDD generator is connected to the input detection module and the on / off module.

4. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 3, characterized in that, The turn-on / turn-off module includes a second transistor, a third transistor, a fourth transistor, a first diode, a second diode, a third diode, and a resistor; One end of the second transistor and the third transistor are connected to the driving module, the other end of the second transistor is connected to the resistor, the fourth transistor and the first diode, and the other end of the third transistor is connected to the fourth transistor and the GaN power transistor. The other end of the first diode is connected to the second diode, and both ends of the third diode are connected to the fourth transistor.

5. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 3, characterized in that, It also includes a bandgap reference module and an over-temperature protection module, wherein the bandgap reference module is connected to the over-temperature protection module.

6. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 5, characterized in that, The output voltage of the high-voltage input VDD generator and the low-voltage input VDD generator is 6.9V.

7. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 6, characterized in that, The GaN power transistor is a three-terminal MOS device.

8. The self-powered enhancement-type GaN power device with a wide voltage input range according to claim 7, characterized in that, The PWM module is connected to the gate terminal of the GaN power transistor, the first transistor is connected to the drain terminal of the GaN power transistor, and the source terminal of the GaN power transistor is grounded.

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