Disjunctive circuit arrangement

Abstract

The port A3 of the resistance R3 welding position in the alternative circuit device is in electrical communication with the positive pole of the power supply; the port B3 of the resistance R3 welding position is in electrical communication with the output port OUT; the port K1 of the triode Q3 welding position is in electrical communication with the input port IN; the circuit device supports two welding modes: mode 1: welding the resistance R0 to the resistance R0 welding position, not welding the resistance R3 and the triode Q3, and the circuit device works in a straight-through circuit mode; mode 2: welding the resistance R3 to the resistance R3 welding position, welding the triode Q3 to the triode Q3 welding position, and not welding the resistance R0, and the circuit device works in a reverse circuit mode. The port A0 pad of the resistance R0 welding position is shared with the port B3 pad of the resistance R3 welding position; and the port B0 pad of the resistance R0 welding position is shared with the port K1 pad of the triode Q3 welding position.

Description

Technical Field

[0001] This application belongs to the field of circuit design and manufacturing, and specifically relates to a two-to-one circuit device, particularly a direct-through and reverse two-to-one circuit device. Background Technology

[0002] As 3C electronic products become increasingly compact, there are higher requirements for the integration and smaller size of internal circuit boards and various control and communication modules. At the same time, the frequent updates and iterations of various electronic products lead to shorter product design and development cycles, further compressing the time required for product development, prototyping, and verification. Therefore, hardware design must simultaneously consider requirements such as streamlined product structure, simple and convenient sample debugging and verification, and high sample-to-mass production conversion rate. Summary of the Invention

[0003] The technical problem to be solved by this application is to avoid the shortcomings of the prior art, such as small circuit board size and long development cycle and low efficiency of redesigning the circuit board each time during design iteration. In order to solve this problem, a two-to-one circuit device is proposed. A two-to-one circuit device with reusable pads is designed, which facilitates circuit design and debugging under the limited space of the circuit board, while occupying less space and being easier to integrate.

[0004] The technical solution of this application to solve the above-mentioned technical problems is a two-to-one circuit device, including: a resistor R0 welding position, a resistor R3 welding position, a transistor Q3 welding position, an input port IN, and an output port OUT; port A0 of the resistor R0 welding position is electrically connected to the input port IN; port B0 of the resistor R0 welding position is electrically connected to the output port OUT; port A3 of the resistor R3 welding position is electrically connected to the positive terminal of the power supply; port B3 of the resistor R3 welding position is electrically connected to the output port OUT; and port K1 of the transistor Q3 welding position is electrically connected to the input port IN. The input port IN is electrically connected; the other two ports at the transistor Q3 soldering position, namely ports K1 and K2, are used to connect to the power supply, ground, or port B of resistor R3, respectively; the circuit device supports two soldering modes: Mode 1: Solder resistor R0 to the resistor R0 soldering position, without soldering resistor R3 and transistor Q3, the circuit device operates in the through circuit mode; Mode 2: Solder resistor R3 to the resistor R3 soldering position, solder transistor Q3 to the transistor Q3 soldering position, without soldering resistor R0, the circuit device operates in the reverse circuit mode.

[0005] It is possible that the transistor Q3 is an NPN type; port K1 at the welding position of transistor Q3 is the base; port K2 at the welding position of transistor Q3 is the collector, and port K2 is electrically connected to port B3 of resistor R3; port K3 at the welding position of transistor Q3 is the emitter, and port K3 is electrically connected to ground.

[0006] It is possible that the transistor Q3 is a PNP type; port K1 at the welding position of transistor Q3 is the base; port K2 at the welding position of transistor Q3 is the emitter, and port K2 is electrically connected to port B of resistor R3; port K3 at the welding position of transistor Q3 is the collector, and port K3 is electrically connected to the power supply.

[0007] It is possible that the A0 pad of the soldering position of resistor R0 is shared with the B3 pad of the soldering position of resistor R3; and the B0 pad of the soldering position of resistor R0 is shared with the K1 pad of the soldering position of transistor Q3.

[0008] It may also include pad N; the A0 pad at the welding position of resistor R0 is shared with the B3 pad at the welding position of resistor R3; the B0 pad at the welding position of resistor R0 is shared with pad N; pad N is electrically connected to the K1 pad at the welding position of transistor Q3.

[0009] It is possible that pad N and port B0 pads are the same size; and that port A0 pads and port B0 pads are the same size.

[0010] It is possible that pad N and port B0 are the same size; port A0 and port B0 are the same size; and pad N is different in size from the pad K1 at the location where transistor Q3 is soldered.

[0011] It may also include packaging lines, which are arranged around the soldering positions of resistor R0, resistor R3, and transistor Q3.

[0012] The resistors R0 and R3 may be packaged in 0201, 0402, 0603, 0805 or 1206 packages.

[0013] Yes, the two-to-one circuit device can be used for control signal level conversion in the fingerprint module.

[0014] One of the beneficial effects of the technical solution in this application is that the circuit device supports two soldering modes, enabling the circuit to perform one of two functions.

[0015] One of the beneficial effects of the technical solution in this application is that it is compatible with a variety of transistors.

[0016] One of the beneficial effects of the technical solution in this application is that the shared pads save space. In the two-to-one circuit device, multiple circuit components can share the pad space, making the space occupied by the two-to-one circuit device more economical, improving the compatibility of the circuit device, and enabling it to more flexibly adapt to trying different circuit functions during the research, design and debugging process.

[0017] One of the beneficial effects of the technical solution in this application is that the setting of independent pad N further improves the types of device packages that the two-to-one circuit device can be compatible with, and is more scalable.

[0018] One of the beneficial effects of the technical solution in this application is that the different sizes of pad N and port B0 improve compatibility with devices in different packages, especially transistor packages.

[0019] One of the beneficial effects of the technical solution in this application is that the setting of the package line makes it convenient to design the circuit device as a whole, which facilitates modular design and selection.

[0020] One of the beneficial effects of the technical solution in this application is that the packages of resistors R0 and R3 are diversified, making them suitable for various applications.

[0021] One of the beneficial effects of the technical solution in this application is that the two-to-one circuit device is used for the control signal level conversion in the fingerprint module, which reduces the circuit space requirements of the display. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a two-to-one multiplexer circuit. Figure 1 ; Figure 2 yes Figure 1 Actual PCB layout diagram; Figure 3 The circuit principle of a two-to-one multiplexer. Figure 1 ; Figure 4 This is the circuit schematic of a two-to-one multiplexer in state 1, i.e., mode 1. Figure 5 This is the circuit schematic of a two-to-one multiplexer in state 2, i.e., mode 2. Figure 6 This is a schematic diagram of a two-to-one multiplexer circuit. Figure 2 ; Figure 7 yes Figure 6 Actual PCB layout diagram; Figure 8 This is a schematic diagram of a two-to-one multiplexer circuit. Figure 3 ; Figure 9 This is a schematic diagram of a two-to-one multiplexer circuit. Figure 4 ; Figure 10 This is a size table corresponding to the package number; Figure 11 yes Figure 1 PCB layout diagram in the prior art. Detailed Implementation

[0023] The embodiments of this application will be further described in detail below with reference to the accompanying drawings.

[0024] It should be noted that the following description of preferred embodiments of this application does not constitute any limitation on this application. The description of preferred embodiments is merely an illustration of the general principles of this application. The embodiments described in this application are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0025] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the equipment or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," and technical features numbered with Arabic numerals 1, 2, 3, etc., and designations such as "A" and "B," are used for descriptive purposes only, for ease of explanation, and do not represent a temporal or spatial order; they should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first," "second," and numbered with Arabic numerals 1, 2, 3, etc., may explicitly or implicitly include one or more of that feature. In the description of this application, "several" means two or more, unless otherwise expressly and specifically defined.

[0026] In existing technologies, during the initial product design phase, because the hardware circuitry is not yet fully finalized, some directly connected circuits require the addition of compatibility circuits, such as switching circuits and inverter circuits. These circuits need to be sampled, debugged, and verified before the specific circuitry can be confirmed. The choice between a directly connected circuit, a switching circuit, or an inverter circuit depends on the specific circumstances, which often involve product stability, meeting key performance requirements, or achieving electrical isolation, making the process quite complex. For example, if the static power consumption of a Bluetooth module is uncertain, a switching circuit can be added to the Bluetooth module's power supply, with a short-circuit resistor provided. If the Bluetooth module's static power consumption is too high, the short-circuit resistor can be omitted, and a switching circuit can be used to shut down the Bluetooth module, ensuring the product's low-power characteristics.

[0027] When faced with such hardware uncertainties, the common practice in existing technologies is to first reserve all possible compatible circuits for the initial prototype production, debugging, and verification. After verification, the specific circuits and actual surface-mount components are determined for the next stage of trial production.

[0028] However, because the first prototype included some compatible circuits that were not actually used in the final product, and because the product is constantly evolving towards miniaturization and lightweight design, the actual circuit board size is limited. Therefore, it is necessary to remove the unused compatible circuits from the first prototype circuit, simplify the circuit, optimize the layout, and then produce a second prototype for verification. This lengthens the product development cycle, involves repeated prototyping and verification, and increases product development costs.

[0029] Meanwhile, in existing technologies, the same series of products may have different hardware versions, paired with different modules. For example, version A is paired with sensor 'a', where sensor 'a' has a chip select active high level, so the sensor chip select signal CS can be directly connected to the main controller; version B is paired with sensor 'b', where sensor 'b' has a chip select active low level. When sensor 'b's chip select is pulled up internally, it may leak current to the main controller through the chip select. To avoid leakage to the main controller, an inverting circuit is needed for isolation. In this case, splitting the first version, which already has both direct connection and inverting circuit compatibility, into separate direct connection and inverting versions would further increase development costs and development cycle, and would be detrimental to material management. If both direct connection and inverting circuits are retained, in some small-sized module products, insufficient space may lead to structural incompatibility.

[0030] To meet market demands, achieve rapid product iteration, shorten product development cycles, and reduce product development costs, there is an urgent need to optimize compatible circuits such as switching circuits and inverting circuits that allow for one or more choices.

[0031] To address the aforementioned issues, this application proposes a two-to-one circuit device based on a multi-surface component reuse pad design. The core idea is to remove the simplest circuit from the schematic in a multi-path compatible circuit, most commonly by removing the short-circuit resistor on a direct-connect circuit. Simultaneously, the corresponding pads are retained in the circuit, and the position or size of the corresponding network pads is adjusted to form a new surface-mount component package. By selecting surface-mount components, different circuits can be connected. This approach retains the multi-to-one function in the actual circuit while reducing component pads, optimizing layout space, achieving multi-purpose functionality on a single board, avoiding secondary circuit design optimization, reducing the number of hardware prototypes, saving development costs, and shortening the development cycle.

[0032] like Figure 1 A two-to-one circuit device includes: a resistor R0 welding position, a resistor R3 welding position, a transistor Q3 welding position, an input port IN, and an output port OUT.

[0033] like Figure 1 Port A0 at the soldering position of resistor R0 is electrically connected to the input port IN; port B0 at the soldering position of resistor R0 is electrically connected to the output port OUT; port A3 at the soldering position of resistor R3 is electrically connected to the positive terminal of the power supply; port B3 at the soldering position of resistor R3 is electrically connected to the output port OUT; port K1 at the soldering position of transistor Q3 is electrically connected to the input port IN; the other two ports at the soldering position of transistor Q3, namely ports K2 and K3, are used to connect to the power supply, ground, or port B of resistor R3, respectively.

[0034] like Figure 1 , Figure 3 , Figure 4 and Figure 5 The circuitry supports two soldering modes. For example... Figure 2 ,yes Figure 1 A schematic diagram of solder pads on an actual circuit board. (See diagram below.) Figure 11 This is the pad arrangement in existing technology, which obviously takes up more space.

[0035] like Figure 1 and Figure 4 When the circuit is in mode 1: solder resistor R0 to the soldering position of resistor R0, do not solder resistor R3 and transistor Q3, the circuit works in the through circuit mode.

[0036] like Figure 1 and Figure 5 When the circuit is in mode 2: solder resistor R3 to the resistor R3 soldering position, solder transistor Q3 to the transistor Q3 soldering position, and do not solder resistor R0, the circuit works in reverse circuit mode.

[0037] like Figure 3 and Figure 5 The transistor Q3 is an NPN type; port K1 at the welding position of transistor Q3 is the base; port K2 at the welding position of transistor Q3 is the collector, and port K2 is electrically connected to port B3 of resistor R3; port K3 at the welding position of transistor Q3 is the emitter, and port K3 is electrically connected to ground.

[0038] In some embodiments not shown in the accompanying drawings, the transistor Q3 is a PNP type; port K1 at the soldering position of transistor Q3 is the base; port K2 at the soldering position of transistor Q3 is the emitter, and port K2 is electrically connected to port B of resistor R3; port K3 at the soldering position of transistor Q3 is the collector, and port K3 is electrically connected to the power supply.

[0039] like Figure 1 and Figure 2The A0 pad of the soldering position of resistor R0 is shared with the B3 pad of the soldering position of resistor R3; the B0 pad of the soldering position of resistor R0 is shared with the K1 pad of the soldering position of transistor Q3.

[0040] like Figures 6 to 8 It also includes pad N; the A0 pad at the welding position of resistor R0 is shared with the B3 pad at the welding position of resistor R3; the B0 pad at the welding position of resistor R0 is shared with pad N; pad N is electrically connected to the K1 pad at the welding position of transistor Q3.

[0041] like Figure 6 and Figure 7 Pad N and port B0 pads are the same size; port A0 pads and port B0 pads are the same size. Figure 7 ,yes Figure 6 A schematic diagram of the solder pads on an actual circuit board.

[0042] like Figure 8 The pads N and B0 are the same size; the pads A0 and B0 are the same size; the pads N and K1 at the location where transistor Q3 is soldered are different sizes.

[0043] like Figure 9 The two-choice circuit device also includes a package line A5, which is arranged around the soldering positions of resistor R0, resistor R3, and transistor Q3. Package line A5 facilitates the overall packaging of the circuit module, making design modifications and inheritance easier.

[0044] The resistors R0 and R3 are packaged in 0201, 0402, 0603, 0805, or 1206 packages. For example... Figure 10 The diagram illustrates some encapsulation code and specific dimensional relationships. In this application, when sharing pads, the pad sizes must be compatible, and the pads of the same circuit component must be the same size.

[0045] The two-to-one circuit device is used for level conversion of control signals in the fingerprint module.

[0046] like Figure 3 This is a commonly used direct-connect and inverting compatible circuit. If input2 and output2 can be directly connected, we only need to install R0; if there is a level conversion between input2 and output2 or leakage protection is required, then install R3 and Q3.

[0047] like Figure 5 This is the optimized circuit, which only retains the inverting circuit. From the schematic diagram, it can be seen that a direct-connect resistor has been removed, but only the inverting circuit remains, so direct connection cannot be achieved.

[0048] like Figure 1 and Figure 2 By adjusting Figure 2 For pads R3 and Q3, construct an R0, such as... Figure 4 As shown, R0 in the dashed box is a virtual multiplexed pad; thus, the direct connection between input2 and output2 is achieved. In the actual circuit, "R3, Q3" cannot coexist with "R0".

[0049] like Figure 11 This is a layout diagram for a common design, containing 3 components and occupying 2.5×2.6mm of space. (Example) Figure 2 The optimized layout requires only 2 components and occupies 1.8 × 2.6 mm of space. For example... Figures 1 to 3 If a direct-connect circuit is selected, only virtual component R0 needs to be mounted; if an inverting circuit is selected, only R3 and Q3 need to be mounted; this achieves compatibility between different circuits using minimal pad space.

[0050] Pad selection: Reused pads are not selected arbitrarily. Components constructed using reused pads must meet the electrical characteristics between their respective networks. The package of components constructed using reused pads must be a standard device package; modifications can be made to the standard component package if necessary.

[0051] In this application, standard pads can be used; alternatively, custom pads can be used. The pads only need to ensure the proper packaging of all components, including virtual components, and guarantee the surface mount yield.

[0052] Virtual components: Virtual components refer to components that do not exist in the hardware design schematic, but are surface-mountable component packages formed by reusing and combining existing component pads. A virtual component is a component package found during the placement process by adjusting the size and position of the pads, and when a specific component is placed on this package, it can form a circuit with practical significance.

[0053] Circuit construction: Creating a virtual component out of thin air is quite difficult. Generally, virtual components are found through circuit optimization. Based on the actual compatibility requirements, first add all the necessary components to the schematic. Then, search the network containing these components for pads that are not part of the compatibility circuit but can be reused to replace these components.

[0054] like Figure 3There are two options: an inverting circuit and a direct-connect circuit. The two circuits above are alternative circuits where one of them must be used. Both ends of R0 belong to the same network; one end of R0 and one end of Q3 belong to the same network, and neither R3 nor Q3 belongs to the direct-connect network of R0. The inverting circuit has multiplexed pads that can be used to construct a virtual device to replace R0. Next, it is necessary to consider whether the position and size of the relevant multiplexed pads can form the standard package of the replaced component (here referring to R0).

[0055] If individual reused pads do not meet the package requirements, consider adding independent pads for bridging. The component construction is now complete. Next, the circuit needs optimization. First, a virtual component has been found that can replace R0. R0 can be deleted from the schematic, but a 2D diagram of the virtual component needs to be added (e.g., ...). Figure 3 The R0 in the diagram is used for subsequent verification of the surface mount BOM and circuit analysis in case of anomalies. Finally, the position and size of the reused pads need to be adjusted on the PCB layout drawing, and virtual component outlines and virtual component reference numbers need to be added, such as... Figure 2 The R0 and its outline are silkscreened in the diagram for later output of the location diagram and verification of production data. Then, normal wiring and board design can proceed.

[0056] As shown in the accompanying drawings, the above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of the application specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A two-to-one multiplexer circuit device, Its features are, include: Soldering positions of resistor R0, resistor R3, and transistor Q3; input port IN; output port OUT. Port A0 at the welding position of resistor R0 is electrically connected to input port IN; The port B0 at the welding position of resistor R0 is electrically connected to the output port OUT; Port A3 at the welding position of resistor R3 is electrically connected to the positive terminal of the power supply; Port B3 at the welding position of resistor R3 is electrically connected to the output port OUT; The port K1 at the welding position of transistor Q3 is electrically connected to the input port IN. The other two ports of the transistor Q3 soldering position, namely port K1 and port K2, are used to connect to the power supply, ground, or port B of resistor R3, respectively. The circuit device supports two soldering modes: Mode 1: Solder resistor R0 to the soldering position of resistor R0, do not solder resistor R3 and transistor Q3, the circuit device works in the through circuit mode; Mode 2: Solder resistor R3 to the resistor R3 soldering position, solder transistor Q3 to the transistor Q3 soldering position, and do not solder resistor R0. The circuit device operates in reverse circuit mode.

2. The two-to-one multiplexer according to claim 1, characterized in that, The transistor Q3 is an NPN type; the port K1 at the soldering position of transistor Q3 is the base; Port K2 at the soldering position of transistor Q3 is the collector, and port K2 is electrically connected to port B3 of resistor R3. Port K3 at the soldering position of transistor Q3 is the emitter, and port K3 is connected to ground.

3. The two-to-one multiplexer according to claim 1, characterized in that, The transistor Q3 is a PNP type; the port K1 at the soldering position of transistor Q3 is the base; The port K2 of the transistor Q3 soldering position is the emitter, and port K2 is electrically connected to port B of resistor R3; Port K3 at the soldering position of transistor Q3 is the collector, and port K3 is electrically connected to the power supply.

4. The two-to-one multiplexer according to claim 1, characterized in that, The A0 pad at the welding position of resistor R0 is shared with the B3 pad at the welding position of resistor R3. The B0 pad of the resistor R0 welding position is shared with the K1 pad of the transistor Q3 welding position.

5. The two-to-one multiplexer according to claim 1, characterized in that, It also includes pad N; The A0 pad at the welding position of resistor R0 is shared with the B3 pad at the welding position of resistor R3; the B0 pad at the welding position of resistor R0 is shared with pad N. The pad N is electrically connected to the port K1 pad at the welding position of transistor Q3.

6. The two-to-one multiplexer according to claim 1, characterized in that, Pad N and port B0 pads are the same size; port A0 pads and port B0 pads are the same size.

7. The two-to-one multiplexer according to claim 1, characterized in that, Pad N and port B0 are the same size; port A0 and port B0 are the same size; pad N is different in size from the port K1 pad at the location where transistor Q3 is soldered.

8. The two-to-one multiplexing circuit device according to any one of claims 4 to 7, characterized in that, It also includes packaging lines, which are arranged around the soldering positions of resistor R0, resistor R3, and transistor Q3.

9. The two-to-one multiplexer according to claim 4, characterized in that, The packages of resistors R0 and R3 include 0201, 0402, 0603, 0805 or 1206.

10. The two-to-one multiplexer according to claim 1, characterized in that, The two-to-one circuit device is used for level conversion of control signals in the fingerprint module.

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