Radio frequency control link
Patent Information
- Application Number
- CN202522533175.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-28
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2035-11-28
AI Technical Summary
[0003]随着通信协议的发展，形成了各种各样的通信协议，蜂窝通信、Wi-Fi通信、卫星通信、UWB(Ultra-Wideband，超宽带)、蓝牙通信等，射频模块芯片由于被这些通信协议同时控制，且各个协议端口之间的速率完全不同，使得各个通信协议很难在系统中协调控制，
[0026]本申请实施例提供了一种射频控制链路，包括：信号接收系统和信号功能系统，其中：所述信号接收系统至少包括：多个指令接口、指令转换单元和速率适配单元。第一方面，传统的器件通常只集成一种控制功能，传统芯片多是“MIPI→SPI”“GPIO→SPI”等单一方向通路，本申请实施例在信号接收系统重扩展了多个指令接口，将多种控制功能进行集成，同时不同的控制功能之间可相互控制和通信，因此该信号接收系统可同时受多个控制器进行精准控制。比如手机wifi收发机，蓝牙收发机和手机modem等可同时对该模块发指令去控制，该信号接收系统将接收到的指令转化为功能模块所需要的指令从而控制信号接收系统。即，本申请实施例通过信号接收系统中的多个指令接口解决了传统方案中仅有MIPI和GPIO转换双接口而导致的单一方向性问题，以及传统功能模块与不同接收模块存在接口不一致而无法使用的问题，实现任意接口双向互控(如SPI可控制MIPI的帧触发，MIPI也可配置GPIO的输出电平)，突破固定通路实现系统全互联；第二方面，本申请实施例通过在信号接收系统中配置有速率适配单元，通过速率适配单元实现各指令接口之间速率的适配，从而实现任意接口的灵活互联，实现多个指令接口中任意指令接口间的双向数据流转与控制触发，提高整体系统的灵活性；同时，解决MIPI接口与SPI指令接口等协议接口的协同难题。综上，本申请实施例提供了一种可以协调各通信协议的射频控制链路。
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Figure CN224909473U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and more specifically, to a radio frequency control link. Background Technology
[0002] Radio frequency (RF) switches and RF converters are among the most commonly used RF components, widely used in various fields such as the Internet of Things (IoT), communication base stations, small base stations, repeaters, test instruments, radar, WiFi (wireless network), and RFID (radio frequency circuits). In RF links, they are used to perform functions such as channel switching and transmit / receive state switching.
[0003] With the development of communication protocols, various communication protocols have emerged, such as cellular communication, Wi-Fi communication, satellite communication, UWB (Ultra-Wideband), and Bluetooth communication. Because RF module chips are controlled simultaneously by these communication protocols, and the data rates between the various protocol ports are completely different, it is difficult to coordinate and control these protocols within the system.
[0004] Therefore, there is an urgent need for a radio frequency control link that can coordinate the rates of various communication protocols. Summary of the Invention
[0005] To address the aforementioned technical problems, this application provides a radio frequency control link in its embodiments.
[0006] A first aspect of this application provides a radio frequency control link, including:
[0007] A signal receiving system includes at least:
[0008] The GPIO command interface, MIPI command interface, SPI command interface, and URT command interface are used to receive GPIO command signals, MIPI command signals, SPI command signals, and URT command signals sent by the controller, respectively.
[0009] The instruction conversion unit is connected to each instruction interface signal and is used to convert the received instruction signals into functional instructions that match the corresponding functional modules.
[0010] A rate adaptation unit includes multiple ports, each port being connected to a signal of a command interface. The rate adaptation unit is used to convert the first signal transmission rate of the sending command interface into the second signal transmission rate of the receiving command interface.
[0011] The signal function system includes multiple function modules, each of which is signal-connected to a corresponding instruction conversion unit and is used to execute a corresponding function according to the received function instruction.
[0012] In one optional embodiment of this application, the rate adaptation unit includes:
[0013] A clock conversion module is connected to the signals of each instruction interface, and the clock conversion module is used to convert the clock domains of different instruction interfaces;
[0014] The buffer queue module is connected to each instruction interface signal. The buffer queue module is used to buffer the received data into a preset buffer queue and output it according to a preset rate.
[0015] In an optional embodiment of this application, the signal receiving system further includes:
[0016] A cross switch matrix; each port of the cross switch matrix is connected to a different instruction interface, and the cross switch matrix is used to realize data flow and control triggering between the instruction interfaces.
[0017] In one optional embodiment of this application, the cross switch matrix includes:
[0018] A hardware switch module, comprising multiple electronic switches, wherein each electronic switch is a one-to-many or many-to-one electronic switch.
[0019] In one optional embodiment of this application, the number of interfaces of the electronic switch is not less than the number of command interfaces; and / or, the number of electronic switches is greater than or equal to the number of command interfaces.
[0020] In one optional embodiment of this application, the sending command interface is a MIPI command interface, and correspondingly, the receiving command interface is an SPI command interface or a GPIO command interface; or,
[0021] The sending command interface is an SPI command interface or a GPIO command interface, and the receiving command interface is a MIPI command interface.
[0022] In one optional embodiment of this application, the signal receiving system and the signal function system are integrated into the same chip.
[0023] In one optional embodiment of this application, the signal function system is at least one of a radio frequency transceiver system and an analog circuit system.
[0024] In one optional embodiment of this application, the radio frequency transceiver system includes at least one of the following: a radio frequency switch, an antenna tuner, a low-noise amplifier, a power amplifier, and a phase shifter.
[0025] In one optional embodiment of this application, the analog circuit system includes at least one of a power supply module and a capacitive sensor.
[0026] This application provides a radio frequency control link, including a signal receiving system and a signal function system. The signal receiving system includes at least multiple instruction interfaces, an instruction conversion unit, and a rate adaptation unit. Firstly, traditional devices typically integrate only one control function; traditional chips often use single-direction paths such as "MIPI→SPI" or "GPIO→SPI". This application extends the signal receiving system with multiple instruction interfaces, integrating various control functions. Furthermore, different control functions can control and communicate with each other. Therefore, this signal receiving system can be precisely controlled by multiple controllers simultaneously. For example, a mobile phone Wi-Fi transceiver, Bluetooth transceiver, and mobile phone modem can simultaneously send instructions to control this module. The signal receiving system converts the received instructions into the instructions required by the function module to control the signal receiving system. In other words, this application embodiment solves the unidirectional problem caused by the traditional solution's only dual interfaces of MIPI and GPIO conversion, and the problem of incompatibility between traditional functional modules and different receiving modules, by using multiple instruction interfaces in the signal receiving system. It achieves bidirectional mutual control of any interface (e.g., SPI can control MIPI frame triggering, and MIPI can also configure GPIO output levels), breaking through fixed paths to achieve full system interconnection. Secondly, this application embodiment configures a rate adaptation unit in the signal receiving system to achieve rate adaptation between various instruction interfaces, thereby realizing flexible interconnection of any interface and enabling bidirectional data flow and control triggering between any instruction interfaces, improving the overall system flexibility. Simultaneously, it solves the coordination problem between MIPI interfaces and protocol interfaces such as SPI instruction interfaces. In summary, this application embodiment provides a radio frequency control link that can coordinate various communication protocols. Attached Figure Description
[0027] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0028] Figure 1 This is a schematic diagram of the radio frequency control link structure provided in an embodiment of this application;
[0029] Figure 2 This is a partial structural diagram of the signal receiving system in the radio frequency control link provided in the embodiments of this application;
[0030] in:
[0031] 10. Radio frequency control link; 100. Signal receiving system; 110. Command interface; 120. Command conversion unit; 130. Cross switch matrix; 200. Signal function system. Detailed Implementation
[0032] In the process of developing this application, the applicant discovered that there is an urgent need for a radio frequency control link that can coordinate various communication protocols.
[0033] To address the aforementioned problems, this application provides a radio frequency control link in its embodiments. To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description of a radio frequency control link, in conjunction with embodiments and accompanying drawings, is provided. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0034] The serial numbers assigned to components in this document, such as "first" and "second," are used solely to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages). It should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are used solely for the convenience of describing this application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0035] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0036] Please see Figure 1 This application provides a radio frequency control link 10, including: a signal receiving system 100 and a signal function system 200. The signal receiving system 100 and the signal function system 200 are flexibly configurable, for example, they can be integrated on a single chip, or they can be a separate signal receiving system 100 chip and a separate functional radio frequency module chip, enabling multi-channel collaborative control of LNAPA switches and tuners. Wherein:
[0037] The signal receiving system 100 includes at least: multiple command interfaces 110, a command conversion unit 120, and a rate adaptation unit. It may also include a crossbar switch matrix 130, wherein:
[0038] Please see Figure 2 The multiple instruction interfaces 110 include at least: a GPIO (General-purpose input / output) instruction interface, a MIPI (Mobile Industry Processor Interface) instruction interface, an SPI (Serial Peripheral Interface) instruction interface, and a URT (Universal Asynchronous Receiver / Transmitter) instruction interface. Each instruction interface 110 serves as the protocol interface for its respective instruction signal. The GPIO instruction interface is used to receive GPIO instruction signals sent by the controller, the MIPI instruction interface is used to receive MIPI instruction signals sent by the controller, the SPI instruction interface is used to receive SPI instruction signals sent by the controller, and the URT instruction interface is used to receive URT instruction signals sent by the controller.
[0039] The instruction conversion unit 120 is connected to each instruction interface 110. The instruction conversion unit 120 is used to convert the received instruction signals into function instructions that match the corresponding function modules. That is, it converts the instruction signals sent by the controller into control instructions of the signal function system 200. The function instructions of the signal function system 200 may include GPIO instruction signals, MIPI instruction signals, SPI instruction signals and URT instruction signals, etc., which are not exhaustively listed here, and can be flexibly configured according to the actual situation.
[0040] The rate adaptation unit includes multiple ports, each port being connected to a signal of a command interface 110. The rate adaptation unit is used to convert the first signal transmission rate of the sending command interface 110 into the second signal transmission rate of the receiving command interface 110, thus achieving rate adaptation between the command interfaces 110. For example, in an optional embodiment of this application, the rate adaptation unit includes: a clock conversion module and a buffer queue module, wherein:
[0041] The clock conversion module is connected to the signals of each instruction interface 110, and the clock conversion module is used to convert the clock domains of different instruction interfaces 110.
[0042] The buffer queue module is connected to each instruction interface 110 signal. The buffer queue module is used to buffer the received data into a preset buffer queue and output it according to a preset rate.
[0043] Each port of the cross switch matrix 130 is connected to each instruction interface 110. The cross switch matrix 130 is used to realize data flow and control triggering between each instruction interface 110. The cross switch matrix 130 refers to a matrix network composed of multiple hardware switches, which is used to realize data flow and instruction transmission between all instruction interfaces 110, thereby triggering mutual control and interaction between each instruction interface 110.
[0044] The signal function system 200 includes multiple functional modules, each of which is signal-connected to a corresponding instruction conversion unit 120 and is used to execute a corresponding function according to the received function instruction. Each functional module refers to an instruction module used to execute a corresponding function, controlling the operation of corresponding hardware or software devices through different instructions.
[0045] This application provides a radio frequency control link 10, including a signal receiving system 100 and a signal function system 200. The signal receiving system 100 includes at least multiple instruction interfaces 110, an instruction conversion unit 120, and a rate adaptation unit. Firstly, traditional devices typically integrate only one control function, and traditional chips are mostly single-directional paths such as "MIPI→SPI" or "GPIO→SPI". This application expands the signal receiving system 100 with multiple instruction interfaces 110, integrating multiple control functions. Simultaneously, different control functions can control and communicate with each other. Therefore, the signal receiving system 100 can be precisely controlled by multiple controllers simultaneously. For example, a mobile phone Wi-Fi transceiver, a Bluetooth transceiver, and a mobile phone modem can simultaneously send instructions to control this module. The signal receiving system 100 converts the received instructions into instructions required by the function module to control the signal receiving system 100. In other words, this application embodiment solves the unidirectional problem caused by the traditional solution's only dual interfaces of MIPI and GPIO conversion, and the problem of incompatibility between traditional functional modules and different receiving modules, by using multiple instruction interfaces 110 in the signal receiving system 100. It achieves bidirectional mutual control of any interface (e.g., SPI can control MIPI frame triggering, and MIPI can also configure GPIO output levels), breaking through fixed paths to achieve full system interconnection. Secondly, this application embodiment configures a rate adaptation unit in the signal receiving system 100 to achieve rate adaptation between various instruction interfaces, thereby achieving flexible interconnection of any interface and enabling bidirectional data flow and control triggering between any instruction interface 110, improving the overall system flexibility. Simultaneously, it solves the coordination problem between MIPI interfaces and protocol interfaces such as SPI instruction interfaces. In summary, this application embodiment provides a radio frequency control link 10 that can coordinate various communication protocols.
[0046] In an optional embodiment of this application, the cross switch matrix 130 includes: a hardware switch module, wherein:
[0047] The hardware switch module includes multiple electronic switches, all of which are one-to-many or many-to-one electronic switches.
[0048] The cross switch matrix 130 in this embodiment can employ a configurable hardware switch network. All electronic switches are either one-to-many or many-to-one, supporting "one-to-many" or "many-to-one" interconnections. For example, one MIPI instruction interface can simultaneously output data to both an SPI instruction interface and a GPIO instruction interface, or two SPI instruction interfaces can aggregate data and upload it via the MIPI instruction interface. The interconnection path is achieved through a hardware switch network composed of one-to-many or many-to-one electronic switches. Control of the electronic switches can be achieved through real-time software switching (switching delay <10ns), resulting in higher overall control efficiency.
[0049] In one optional embodiment of this application, the number of electronic switch interfaces is not less than the number of command interfaces 110. In another optional embodiment of this application, the number of electronic switches is greater than or equal to the number of command interfaces 110. That is, at least one electronic switch is configured for each command interface 110, and the electronic switch can interconnect all other command interfaces 110 except itself, thereby improving the interactivity and flexibility of the overall system.
[0050] In one optional embodiment of this application, the sending command interface 110 is a MIPI command interface, and correspondingly, the receiving command interface 110 is an SPI command interface or a GPIO command interface; or,
[0051] The sending command interface 110 is an SPI command interface or a GPIO command interface, and the receiving command interface 110 is a MIPI command interface.
[0052] For example, to address the issue of different rates between the MIPI command signal in the MIPI command interface and the SPI command signal in the SPI command interface and the GPIO command signal in the GPIO command interface, a clock domain conversion module and a flexible buffer FIFO are integrated. For instance, the data of the MIPI command signal is first temporarily stored in the FIFO, and then output byte by byte at the 50MHz rate of the SPI command signal in the SPI command interface to avoid data overflow or loss, thereby improving the data integrity and data security of the overall RF control link 10.
[0053] In one optional embodiment of this application, the signal receiving system 100 and the signal function system 200 are integrated into the same chip as a single chip. On the same chip, the signal receiving system 100 can simultaneously receive, interact with, and convert instruction signals from its multi-instruction interface, as well as generate function instructions for the signal function system 200. This results in a higher overall integration, which improves the integration of the radio frequency control link provided in this embodiment, reduces the size of the radio frequency control link, and enhances its versatility in application.
[0054] Of course, in other embodiments, the signal receiving system 100 and the signal function system 200 can also be two independent chips, respectively implementing the signal receiving system 100's multi-instruction interface signal reception, interaction, conversion and other processing functions, and the signal function system 200's function instruction generation function. They can be configured separately and flexibly combined and adjusted according to actual conditions, resulting in greater flexibility. At the same time, the signal receiving system 100 can also be composed of individual chips such as GPIO instruction interface chips and MIPI instruction interface chips. The functional signal receiving system 100 and radio frequency front-end chips such as switches, tuners, LNA (Low-Noise Amplifier), and PA (Power Amplifier) are not specifically limited in this application embodiment and can be flexibly adjusted or configured according to actual conditions.
[0055] In one optional embodiment of this application, the signal function system 200 is at least one of a radio frequency transceiver system and an analog circuit system. The radio frequency transceiver system is the hardware core of a wireless communication device, used to transmit and receive signals, and mainly includes a transmit link and a receive link. In this embodiment, based on functional instructions received from the signal receiving system 100, it instructs each functional module in the transmit and receive links to operate. The analog circuit system is an electronic system that processes and transmits continuously changing physical signals, used to perform various distortion-free signal processing, such as amplification, filtering, and modulation, as well as changes in signal waveform, amplitude, frequency, and phase. In this embodiment, based on functional instructions received from the signal receiving system 100, it performs various distortion-free signal processing.
[0056] In one optional embodiment of this application, the analog circuit system includes at least one of a power supply module and a capacitance sensor. For example, the power supply module can be controlled to turn on, turn off, and regulate its voltage based on function commands, as well as the capacitance sensor can be controlled to turn on, turn off, and perform charge / discharge cycles. These are not exhaustive examples and can be flexibly adjusted according to actual conditions.
[0057] In one optional embodiment of this application, the radio frequency transceiver system includes at least one of: a radio frequency switch, an antenna tuner, a low-noise amplifier, a power amplifier, and a phase shifter. The radio frequency switch is an electronically controlled router used to control the path of radio frequency signals, switching one input signal to one of multiple output paths, or switching one of multiple input signals to an output path. The antenna tuner can be understood as a "matching coach" for the antenna, used to dynamically adjust the antenna impedance to achieve conjugate matching with the impedance of subsequent radio frequency circuits (such as the power amplifier or low-noise amplifier). The low-noise amplifier is used at the very beginning of the receive link to amplify the extremely weak signal from the antenna while generating as little additional noise as possible. The power amplifier is used at the very end of the transmit link to amplify the power of the radio frequency signal to be transmitted to a sufficiently high level (e.g., from milliwatts to watts) so that it can be effectively radiated over a distance by the antenna. The phase shifter is used to controllably change the phase of the radio frequency signal, that is, to advance or delay the waveform of the signal in time.
[0058] The signal function system 200 can be used in mobile phones, watches, and tablets, including 2G, 3G, 4G, and 5G applications, as well as in laptops and servers. This application embodiment does not impose specific limitations and can be flexibly configured according to actual conditions. The analog circuit system in this application embodiment includes at least one of a power supply module and a capacitive sensor. The radio frequency transceiver system includes at least one of a radio frequency switch, an antenna tuner, a low-noise amplifier, a power amplifier, and a phase shifter. Flexible interconnection of the radio frequency switch, antenna tuner, low-noise amplifier, power amplifier, and phase shifter can be achieved, thereby improving the overall system's flexibility, integration, and compatibility.
[0059] One embodiment of this application provides a radio frequency system, comprising at least:
[0060] RF control link 10 as described in any of the above.
[0061] The beneficial effects of the radio frequency control link 10 have been described in detail in the above embodiments and will not be repeated here.
[0062] One embodiment of this application provides a communication device, comprising at least:
[0063] Radio frequency system as described in any of the preceding items.
[0064] The beneficial effects of this radio frequency system have been described in detail in the above embodiments and will not be repeated here.
[0065] It should be understood that although the steps in the flowchart are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order constraint on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the diagram may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.
[0066] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0067] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A radio frequency control link, characterized by, The application relates to a signal receiving system, comprising: a signal receiving system, at least comprising: a GPIO instruction interface, a MIPI instruction interface, an SPI instruction interface and a URT instruction interface, which are used for receiving GPIO instruction signals, MIPI instruction signals, SPI instruction signals and URT instruction signals sent by a controller respectively; an instruction conversion unit connected with each instruction interface signal, used for converting the received instruction signals into function instructions matched with corresponding function modules; a rate adaptation unit comprising a plurality of ports, each port being connected with each instruction interface signal, the rate adaptation unit being used for converting a first signal transmission rate of a sending instruction interface into a second signal transmission rate of a receiving instruction interface; a signal function system comprising a plurality of function modules, each function module being connected with a corresponding instruction conversion unit signal, and being used for executing corresponding functions according to the received function instructions.
2. The radio frequency control link of claim 1, wherein, The rate adaptation unit comprises: a clock conversion module connected with each instruction interface signal, the clock conversion module being used for converting clock domains of different instruction interfaces; a buffer queue module connected with each instruction interface signal, the buffer queue module being used for buffering received data to a preset buffer queue and outputting the data at a preset rate.
3. The radio frequency control link of claim 1, wherein, The signal receiving system further comprises: a crossbar switch matrix, each port of the crossbar switch matrix being connected with each instruction interface, the crossbar switch matrix being used for realizing data flow conversion and control triggering among the instruction interfaces.
4. The radio frequency control link of claim 3, wherein, The crossbar switch matrix comprises: a hardware switch module, the hardware switch module comprising a plurality of electronic switches, each electronic switch being a one-to-many or many-to-one electronic switch.
5. The radio frequency control link of claim 4, wherein, The number of interfaces of the electronic switch is not less than the number of instruction interfaces; and / or the number of electronic switches is greater than or equal to the number of instruction interfaces.
6. The radio frequency control link of claim 1, wherein, The sending instruction interface is a MIPI instruction interface, and the corresponding receiving instruction interface is an SPI instruction interface or a GPIO instruction interface; or The sending instruction interface is an SPI instruction interface or a GPIO instruction interface, and the corresponding receiving instruction interface is a MIPI instruction interface.
7. The radio frequency control link of claim 1, wherein, The signal receiving system and the signal function system are integrated in the same chip.
8. The radio frequency control link of claim 1, wherein, The signal function system is at least one of a radio frequency transceiver system and an analog circuit system.
9. The radio frequency control link of claim 8, wherein, The radio frequency transceiver system comprises at least one of a radio frequency switch, an antenna tuner, a low-noise amplifier, a power amplifier and a phase shifter.
10. The radio frequency control link of claim 8, wherein, The analog circuit system comprises at least one of a power supply module and a capacitance sensor.