A radio frequency signal multi-channel distribution system and corresponding circuit structure

Abstract

The utility model relates to a kind of radio frequency signal multi-channel distribution system, including sequentially connected preliminary filter module, gain adjustment module, segmented filter module, multi-output module;The preliminary filter module includes first band-pass filter;The gain adjustment module includes sequentially connected numerical control attenuator and low-noise amplifier;The segmented filter module includes first single pole four throw switch, second band-pass filter, third band-pass filter, fourth band-pass filter, fifth band-pass filter and second single pole four throw switch;The multi-output module, including first two-way power divider, and with the first two-way power divider output end connection's first drive amplifier and second drive amplifier, and with the first drive amplifier and second drive amplifier output end connection's second two-way power divider and third two-way power divider.The utility model has realized in single compact module complete multifunction integration, and has promoted the adaptability, flexibility and integration of system.

Description

Technical Field

[0001] This utility model relates to the field of wireless communication multi-channel receiving technology, and in particular to a radio frequency signal multi-channel distribution system and its corresponding circuit structure. Background Technology

[0002] Antenna distribution circuits are used to synchronously distribute the radio frequency signals received by a single antenna to multiple receivers, enabling multi-channel wireless systems to operate with only one antenna. Typical applications include wireless microphone performance systems, broadcast television relay, 5G multi-channel testers, phased array radar and RF front-end test platforms, and other multi-channel, multi-band, and high dynamic range receiving scenarios.

[0003] Existing solutions generally adopt a chain structure of "antenna → fixed gain amplifier → passive power divider → fixed frequency band filter → multiple outputs". The power loss is compensated by a first-stage amplification, and the power distribution is completed by a passive power divider. Finally, a fixed frequency filter is placed in each branch to suppress interference. The overall circuit has a single function and simple structure.

[0004] The above structure has a fixed gain and cannot be dynamically adjusted according to the strength of the signal on site, which can easily lead to saturation of the subsequent stage or deterioration of the signal-to-noise ratio; the filter frequency cannot be switched, and it cannot suppress interference from other frequency bands in a multi-frequency environment; the passive power divider has poor output amplitude and phase consistency and low isolation, and is prone to crosstalk between channels; the overall structure lacks flexibility and adaptability, and it is difficult to meet the requirements of modern multi-channel systems for adjustable gain, selectable frequency bands, and high consistency. Utility Model Content

[0005] Based on this, the purpose of this utility model is to overcome the defects or deficiencies of the prior art and provide a radio frequency signal multi-channel distribution system and its corresponding circuit structure.

[0006] A multi-channel radio frequency signal distribution system includes a preliminary filtering module, a gain adjustment module, a segmented filtering module, and a multi-output module connected in sequence. The preliminary filtering module includes a first bandpass filter. The gain adjustment module includes a digitally controlled attenuator and a low-noise amplifier connected in sequence. The segmented filtering module includes a first single-pole four-throw switch, a bandpass filter bank, and a second single-pole four-throw switch connected in sequence, wherein the bandpass filter bank includes a second bandpass filter, a third bandpass filter, a fourth bandpass filter, and a fifth bandpass filter. By switching the selection states of the first and second single-pole four-throw switches, signal path switching between the second, third, fourth, and fifth bandpass filters can be achieved, completing the frequency band selection function. The multi-output module includes a first two-way power divider, a first and second driver amplifiers connected to the two output terminals of the first two-way power divider, a second two-way power divider connected to the output terminal of the first driver amplifier, and a third two-way power divider connected to the output terminal of the second driver amplifier.

[0007] Compared with existing technologies, this invention achieves multi-functional integration of filtering and frequency selection, gain control, low-noise amplification, frequency band switching and power distribution within a single compact module, thereby improving the system's adaptability, flexibility and integration.

[0008] In one embodiment, a fixed attenuator is further included between the segmented filtering module and the multiplex output module.

[0009] In one embodiment, the system further includes an RF generator for outputting a precise and stable RF sine wave signal, the output of which is connected to the preliminary filtering module; and an RF receiver for receiving RF signals in a specific frequency band, the input of which is connected to the outputs of the second and third power dividers.

[0010] In one embodiment, the numerically controlled attenuator is model HMC1095LP4E, the low-noise amplifier is model FW1103; the first single-pole four-throw switch and the second single-pole four-throw switch are model HMC241ALP3E; the first two-way power divider, the second two-way power divider and the third two-way power divider are all model SBTC-2-10L+; the first driver amplifier and the second driver amplifier are model ADL5545ARKZ-R7; and the fixed attenuator is specifically a "π-type" resistive fixed attenuator.

[0011] In one embodiment, the target frequency band for the first bandpass filter is 470MHz to 830MHz; the target frequency band for the second bandpass filter is 470MHz to 510MHz; the target frequency band for the third bandpass filter is 540MHz to 590MHz; the target frequency band for the fourth bandpass filter is 640MHz to 690MHz; and the target frequency band for the fifth bandpass filter is 810MHz to 830MHz.

[0012] Furthermore, this invention also provides a multi-channel radio frequency signal distribution circuit structure, applied to a multi-channel radio frequency signal distribution system, wherein the digitally controlled attenuator includes pins VDD, RF1, ACG1, ACG2, ACG3, ACG4, ACG5, ACG6, ACG7, NC, RF2, V1, V2, V3, V4, V5, and V6; the low-noise amplifier includes pins Vbias, RFin, and RFout; the first single-pole four-throw switch includes pins RFC, VDD, GND5, RF1, RF2, RF3, and RF4; the second single-pole four-throw switch includes pins RFC, VDD, GND5, RF1, RF2, RF3, and RF4; and the first two-way power divider, the second two-way power divider, and the third two-way power divider include pins SUM, P1, and P2. The VDD pin of the digitally controlled attenuator is connected to a 5V power supply and to one end of capacitor C9, the other end of which is grounded. The RF1 pin of the digitally controlled attenuator is connected to capacitor C10, the other end of which is connected to the output of the bandpass filter. The ACG1, ACG2, ACG3, ACG4, ACG5, ACG6, ACG7, and NC pins of the digitally controlled attenuator are simultaneously connected to one end of capacitor C16, the other end of which is grounded. The V1 pin of the digitally controlled attenuator is connected to resistor R7. The V2 pin of the digitally controlled attenuator is connected to resistor R6. The V3 pin of the digitally controlled attenuator is connected to resistor R5. The V4 pin of the digitally controlled attenuator is connected to resistor R4. The V5 pin of the digitally controlled attenuator is connected to resistor R3. The V6 pin of the digitally controlled attenuator is connected to resistor R2. The low-noise amplifier's RFin pin is connected to capacitor C11, and the other end of capacitor C11 is connected to the digitally controlled attenuator's RF2 pin. The low-noise amplifier's RFin pin is also connected to inductor L1, and the other end of inductor L1 is connected to capacitor C6 and resistor R8 respectively. The other end of capacitor C6 is grounded. The other end of resistor R8 is connected to capacitor C3 and resistor R1 respectively. The other end of capacitor C3 is grounded. The other end of resistor R1 is connected to a 5V power supply, capacitor C4, capacitor C5, and inductor L2 respectively. The other end of capacitor C4 and capacitor C5 are grounded. The other end of inductor L2 is connected to the RFout pin. The Vbias pin is connected to inductor L1. The first single-pole four-throw switch has its RFC pin connected to capacitor C12, and the other end of capacitor C12 is connected to the RFout pin of the low-noise amplifier. The first single-pole four-throw switch has its VDD pin connected to a 5V power supply, and its GND5 pin grounded. A capacitor C14 is also connected between the first single-pole four-throw switch's VDD pin and its GND5 pin. The RFC pin of the second single-pole four-throw switch is connected to capacitor C13; the VDD pin of the second single-pole four-throw switch is connected to a 5V power supply; the GND5 pin of the second single-pole four-throw switch is grounded; and a capacitor C15 is also connected between the VDD pin and the GND5 pin of the second single-pole four-throw switch. The first single-pole four-throw switch pin RF1 is connected to the second single-pole four-throw switch pin RF1 in sequence through capacitor C1, second bandpass filter, and capacitor C2; the first single-pole four-throw switch pin RF2 is connected to the second single-pole four-throw switch pin RF2 in sequence through capacitor C7, third bandpass filter, and capacitor C8; the first single-pole four-throw switch pin RF3 is connected to the second single-pole four-throw switch pin RF3 in sequence through capacitor C17, fourth bandpass filter, and capacitor C18; the first single-pole four-throw switch pin RF4 is connected to the second single-pole four-throw switch pin RF4 in sequence through capacitor C20, fifth bandpass filter, and capacitor C21. The SUM pin of the first two-way power divider is connected to the other end of capacitor C13; the P1 pin of the first two-way power divider is connected to capacitor C34, and the other end of capacitor C34 is connected to the first driver amplifier; the P2 pin of the first two-way power divider is connected to capacitor C29, and the other end of capacitor C29 is connected to the second driver amplifier; the output terminal of the first driver amplifier is connected to capacitor C28 and inductor L3 respectively; the other end of capacitor C28 is connected to the SUM pin of the second two-way power divider; the other end of inductor L3 is connected to a 5V power supply and capacitor C22 respectively; the other end of capacitor C22 is grounded. The output of the second driver amplifier is connected to capacitor C33 and inductor L4 respectively. The other end of capacitor C33 is connected to pin SUM of the third two-way power divider. The other end of inductor L4 is connected to a 5V power supply and capacitor C31 respectively. The other end of capacitor C31 is grounded. Pin P1 of the second two-way power divider is connected to capacitor C19. Pin P2 of the second two-way power divider is connected to capacitor C27. Pin P1 of the third two-way power divider is connected to capacitor C30. Pin P2 of the third two-way power divider is connected to capacitor C32. The other ends of capacitors C19, C27, C30 and C32 are connected to the RF receiver.

[0013] In one embodiment, the capacitance of capacitor C9 is 0.1μF, the capacitance of capacitor C10 is 100pF, the resistances of resistors R2, R3, R4, R5, R6, and R7 are 10R, and the capacitance of capacitor C16 is 470pF.

[0014] In one embodiment, the capacitance of capacitor C11 is 100pF, the inductance of inductor L1 is 18nH, the capacitance of capacitor C6 is 100pF, the resistance of resistor R8 is 10R, the capacitance of capacitor C3 is 100pF, the resistance of resistor R1 is 6.8K, the capacitance of capacitor C4 is 0.1μF, the capacitance of capacitor C5 is 100pF, and the inductance of inductor L2 is 47nH.

[0015] In one embodiment, the capacitance of capacitor C12 is 100pF, the capacitance of capacitor C14 is 0.1μF, the capacitance of capacitor C13 is 100pF, the capacitance of capacitor C15 is 0.1μF, and the capacitances of capacitors C1, C2, C7, C8, C17, C18, C20, and C21 are 100pF.

[0016] In one embodiment, the capacitance values ​​of capacitors C13, C34, C29, C28, C33, C19, C27, C30, and C32 are 100pF, the capacitance values ​​of capacitors C22 and C31 are 0.1μF, the inductance of inductor L3 is 100nH, and the inductance of inductor L4 is 100nH.

[0017] To better understand and implement this invention, the following detailed description is provided in conjunction with the accompanying drawings. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the radio frequency signal multi-channel distribution system of this utility model; Figure 2 This is a schematic diagram of the circuit structure corresponding to the radio frequency signal multi-channel distribution system of this utility model. Detailed Implementation

[0019] The present invention will now be described in detail with reference to the accompanying drawings.

[0020] like Figure 1 As shown, the present invention provides a radio frequency signal multi-channel distribution system and its corresponding circuit structure, including a preliminary filtering module 10, a gain adjustment module 20, a segmented filtering module 30, and a multi-output module 40 connected in sequence. The preliminary filtering module 10 is used to receive radio frequency signals from the outside and filter out signals outside the target frequency band to obtain radio frequency signals within the target frequency band. It includes a first bandpass filter 11. In this application, the target frequency band is 470MHz to 830MHz.

[0021] The gain adjustment module 20 is used to adjust the net amplification factor of the radio frequency signal as needed within a certain range to adapt to strong / weak signal scenarios and prevent saturation or signal-to-noise ratio degradation. It includes a digitally controlled attenuator 21 and a low-noise amplifier 22 connected in sequence. In this application, the model of the digitally controlled attenuator 21 is HMC1095LP4E, and the model of the low-noise amplifier 22 is FW1103.

[0022] The segmented filtering module 30 is used to freely switch between multiple discrete frequency bands to the desired frequency band. It includes a first single-pole four-throw switch 31, a bandpass filter bank 32, and a second single-pole four-throw switch 33 connected in sequence. The bandpass filter bank 32 includes a second bandpass filter 321, a third bandpass filter 322, a fourth bandpass filter 323, and a fifth bandpass filter 324. By switching the selection states of the first single-pole four-throw switch 31 and the second single-pole four-throw switch 33, the second bandpass filter 321, the third bandpass filter 322, the fourth bandpass filter 323, and the fifth bandpass filter 324 can be selected. The signal path switching between 24 completes the frequency band selection function; in this application, the target frequency band of the second bandpass filter 321 is 470MHz to 510MHz, the target frequency band of the third bandpass filter 322 is 540MHz to 590MHz, the target frequency band of the fourth bandpass filter 323 is 640MHz to 690MHz, and the target frequency band of the fifth bandpass filter 324 is 810MHz to 830MHz; in this application, the model of the first single-pole four-throw switch 31 and the second single-pole four-throw switch 33 is HMC241ALP3E.

[0023] The multi-output module 40 is used to output radio frequency signals of a specific frequency band in multiple channels. Specifically, it includes a first two-way power divider 41, a first driver amplifier 42 and a second driver amplifier 43 respectively connected to the output terminals of the first two-way power divider 41, a second two-way power divider 44 connected to the output terminal of the first driver amplifier 42, and a third two-way power divider 45 connected to the output terminal of the second driver amplifier 43. Specifically, the first two-way power divider 41, the second two-way power divider 44, and the third two-way power divider 45 are all of model SBTC-2-10L+; the first driver amplifier 42 and the second driver amplifier 43 are of model ADL5545ARKZ-R7.

[0024] In this application, the structure of the multi-output module 40 can improve the amplitude, phase consistency, isolation, and ease of board layout and debugging of the RF signal output.

[0025] Furthermore, in order to further limit the RF signal level entering the multiplex output module 40 to prevent saturation, a fixed attenuator 50 is connected between the segmented filtering module 30 and the multiplex output module 40; the fixed attenuator 50 is specifically a "π-type" resistive fixed attenuator 50.

[0026] Specifically, it also includes an RF generator 60 for outputting accurate and stable RF sine wave signals, the output of which is connected to the preliminary filtering module 10; and an RF receiver 70 for receiving RF signals in a specific frequency band, the input of which is connected to the output of the second two-way power divider 44 and the third two-way power divider 45. In this application, four RF receivers 70 are provided. The RF receivers 70 can be wireless microphone receivers, broadcast television set-top boxes / studio receivers, 5G small base station RF units, etc.

[0027] like Figure 2 The diagram shown is a circuit diagram corresponding to the above-mentioned multi-channel RF signal distribution system. The digitally controlled attenuator 21 includes pins VDD, RF1, ACG1, ACG2, ACG3, ACG4, ACG5, ACG6, ACG7, NC, RF2, V1, V2, V3, V4, V5, and V6. The low-noise amplifier 22 includes pins Vbias, RFin, and RFout. The first single-pole four-throw switch 31 includes pins RFC, VDD, GND5, RF1, RF2, RF3, and RF4. The second single-pole four-throw switch 33 includes pins RFC, VDD, GND5, RF1, RF2, RF3, and RF4. The first two-way power divider 41, the second two-way power divider 44, and the third two-way power divider 45 include pins SUM, P1, and P2.

[0028] The VDD pin of the digitally controlled attenuator 21 is connected to a 5V power supply and to one end of capacitor C9, with the other end of capacitor C9 grounded. The RF1 pin of the digitally controlled attenuator 21 is connected to capacitor C10, with the other end of capacitor C10 connected to the output of the bandpass filter. The ACG1, ACG2, ACG3, ACG4, ACG5, ACG6, ACG7, and NC pins of the digitally controlled attenuator 21 are simultaneously connected to one end of capacitor C16, with the other end of capacitor C16 grounded. The V1 pin of the digitally controlled attenuator 21 is connected to resistor R7. The V2 pin of the digitally controlled attenuator 21 is connected to resistor R6. The V3 pin of the digitally controlled attenuator 21 is connected to resistor R5. The V4 pin of the digitally controlled attenuator 21 is connected to resistor R4. The V5 pin of the digitally controlled attenuator 21 is connected to resistor R3. The V6 pin of the digitally controlled attenuator 21 is connected to resistor R2.

[0029] Specifically, the capacitance of capacitor C9 is 0.1μF, the capacitance of capacitor C10 is 100pF, the resistances of resistors R2, R3, R4, R5, R6, and R7 are 10Ω, and the capacitance of capacitor C16 is 470pF.

[0030] The low-noise amplifier 22 has its RFin pin connected to capacitor C11, and the other end of capacitor C11 is connected to the RF2 pin of the digitally controlled attenuator 21. The RFin pin of the low-noise amplifier 22 is also connected to inductor L1, and the other end of inductor L1 is connected to capacitor C6 and resistor R8 respectively. The other end of capacitor C6 is grounded. The other end of resistor R8 is connected to capacitor C3 and resistor R1 respectively. The other end of capacitor C3 is grounded. The other end of resistor R1 is connected to a 5V power supply, capacitor C4, capacitor C5, and inductor L2 respectively. The other end of capacitor C4 is grounded, the other end of capacitor C5 is grounded, and the other end of inductor L2 is connected to the RFout pin. The Vbias pin is connected to inductor L1.

[0031] Specifically, the capacitance of capacitor C11 is 100pF, the inductance of inductor L1 is 18nH, the capacitance of capacitor C6 is 100pF, the resistance of resistor R8 is 10Ω, the capacitance of capacitor C3 is 100pF, the resistance of resistor R1 is 6.8KΩ, the capacitance of capacitor C4 is 0.1μF, the capacitance of capacitor C5 is 100pF, and the inductance of inductor L2 is 47nH.

[0032] The first single-pole four-throw switch 31 has its RFC pin connected to capacitor C12, and the other end of capacitor C12 is connected to the RFout pin of the low-noise amplifier 22. The first single-pole four-throw switch 31 has its VDD pin connected to a 5V power supply, and its GND5 pin grounded. A capacitor C14 is also connected between the first single-pole four-throw switch 31's VDD pin and GND5 pin.

[0033] The RFC pin of the second single-pole four-throw switch 33 is connected to the capacitor C13; the VDD pin of the second single-pole four-throw switch 33 is connected to the 5V power supply; the GND5 pin of the second single-pole four-throw switch 33 is grounded; and a capacitor C15 is also connected between the VDD pin and the GND5 pin of the second single-pole four-throw switch 33.

[0034] The first single-pole four-throw switch 31 has its pin RF1 connected to the second single-pole four-throw switch 33's pin RF1 via capacitor C1, second bandpass filter 321, and capacitor C2 in sequence; the first single-pole four-throw switch 31 has its pin RF2 connected to the second single-pole four-throw switch 33's pin RF2 via capacitor C7, third bandpass filter 322, and capacitor C8 in sequence; the first single-pole four-throw switch 31 has its pin RF3 connected to the second single-pole four-throw switch 33's pin RF3 via capacitor C17, fourth bandpass filter 323, and capacitor C18 in sequence; and the first single-pole four-throw switch 31 has its pin RF4 connected to the second single-pole four-throw switch 33's pin RF4 via capacitor C20, fifth bandpass filter 324, and capacitor C21 in sequence.

[0035] Specifically, the capacitance of capacitor C12 is 100pF, the capacitance of capacitor C14 is 0.1μF, the capacitance of capacitor C13 is 100pF, the capacitance of capacitor C15 is 0.1μF, and the capacitances of capacitors C1, C2, C7, C8, C17, C18, C20, and C21 are all 100pF.

[0036] The fixed attenuator 50 specifically includes resistors R9, R10, and R11. Resistor R9 is connected to the other end of capacitor C13, and the other end of resistor R9 is connected to the first two-way power divider 41. The end of resistor R9 connected to capacitor C13 is also connected to resistor R10, and the end of resistor R9 connected to the first two-way power divider 41 is also connected to resistor R11.

[0037] Specifically, the resistance of resistor R9 is 18Ω, the resistance of resistor R10 is 300Ω, and the resistance of resistor R11 is 300Ω.

[0038] The SUM pin of the first two-way power divider 41 is connected to the resistor R9; the P1 pin of the first two-way power divider 41 is connected to the capacitor C34, and the other end of the capacitor C34 is connected to the first driver amplifier 42; the P2 pin of the first two-way power divider 41 is connected to the capacitor C29, and the other end of the capacitor C29 is connected to the second driver amplifier 43; the output terminal of the first driver amplifier 42 is connected to the capacitor C28 and the inductor L3 respectively; the other end of the capacitor C28 is connected to the SUM pin of the second two-way power divider 44; the other end of the inductor L3 is connected to the 5V power supply and the capacitor C22 respectively; the other end of the capacitor C22 is grounded. The output of the second driver amplifier 43 is connected to capacitor C33 and inductor L4 respectively. The other end of capacitor C33 is connected to pin SUM of the third two-way power divider 45. The other end of inductor L4 is connected to a 5V power supply and capacitor C31 respectively. The other end of capacitor C31 is grounded. Pin P1 of the second two-way power divider 44 is connected to capacitor C19. Pin P2 of the second two-way power divider 44 is connected to capacitor C27. Pin P1 of the third two-way power divider 45 is connected to capacitor C30. Pin P2 of the third two-way power divider 45 is connected to capacitor C32. The other ends of capacitors C19, C27, C30 and C32 are connected to RF receiver 70.

[0039] Specifically, the capacitance values ​​of capacitors C13, C34, C29, C28, C33, C19, C27, C30, and C32 are 100pF, the capacitance values ​​of capacitors C22 and C31 are 0.1μF, the inductance of inductor L3 is 100nH, and the inductance of inductor L4 is 100nH.

[0040] Compared to existing technologies, this invention employs a 470-830MHz passband filter in the first stage as the frequency selection input for the entire system, effectively suppressing strong out-of-band interference and noise, improving the system's anti-interference capability, and enhancing the spectral purity of subsequent stages. An integrated digitally controlled attenuator allows for precise control of signal attenuation via external digital signals, enabling flexible and dynamic adjustment of the system gain to adapt to different signal strength scenarios and prevent overload or signal-to-noise ratio degradation in subsequent stages. A low-noise amplifier (LNA) is placed after the attenuator to effectively compensate for the insertion loss of the preceding stage, ensuring the overall system maintains a low noise figure and high signal sensitivity, thus improving the signal-to-noise ratio. A single-pole four-throw switch combined with four bandpass filters of different passbands forms the key segmented filtering unit. This structure allows signals to be routed to filters of different frequency bands via switching, enabling a single device to selectively process signals from multiple frequency bands, resulting in a high degree of functional integration. The final stage power divider amplifier circuit not only achieves a 1-to-4 power distribution, but its built-in amplifier also compensates for losses caused by filtering and switching, and provides isolation and drive capability for each output channel, ensuring high isolation and good amplitude and phase characteristics at each port. This invention achieves multi-functional integration of filtering and frequency selection, gain control, low-noise amplification, frequency band switching, and power distribution within a single compact module, improving the system's adaptability, flexibility, and integration.

[0041] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the embodiments of this application. The singular forms “a,” “the,” and “the” used in the embodiments and claims of this application are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that, unless otherwise stated, “a plurality” means two or more; the terms “first,” “second,” “third,” etc., are used only to distinguish and not to describe a particular order or sequence, nor should they be construed as indicating or implying relative importance. The term “and / or” as used herein refers to and includes any or all possible combinations of one or more associated listed items. When the above description relates to drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. In the description of this application, those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0042] The embodiments described above are merely examples of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these modifications and improvements all fall within the protection scope of this utility model.

Claims

1. A multi-channel radio frequency signal distribution system, characterized in that: It includes a preliminary filtering module, a gain adjustment module, a segmented filtering module, and a multi-output module connected in sequence. The preliminary filtering module includes a first bandpass filter; The gain adjustment module includes a digitally controlled attenuator and a low-noise amplifier connected in sequence; The segmented filtering module includes a first single-pole four-throw switch, a bandpass filter bank, and a second single-pole four-throw switch connected in sequence. The bandpass filter bank includes a second bandpass filter, a third bandpass filter, a fourth bandpass filter, and a fifth bandpass filter. By switching the selection states of the first and second single-pole four-throw switches, the signal path switching between the second, third, fourth, and fifth bandpass filters can be achieved, thus completing the frequency band selection function. The multi-output module includes a first two-way power divider, a first driver amplifier and a second driver amplifier respectively connected to the two output terminals of the first two-way power divider, a second two-way power divider connected to the output terminal of the first driver amplifier, and a third two-way power divider connected to the output terminal of the second driver amplifier.

2. The radio frequency signal multi-channel distribution system according to claim 1, characterized in that: It also includes a fixed attenuator disposed between the segmented filtering module and the multi-output module.

3. The radio frequency signal multi-channel distribution system according to claim 2, characterized in that: It also includes an RF generator for outputting accurate and stable RF sine wave signals, the output of which is connected to the preliminary filtering module; and an RF receiver for receiving RF signals in a specific frequency band, the input of which is connected to the output of the second and third power dividers.

4. The radio frequency signal multi-channel distribution system according to claim 3, characterized in that: The numerically controlled attenuator is model HMC1095LP4E, the low-noise amplifier is model FW1103; the first single-pole four-throw switch and the second single-pole four-throw switch are model HMC241ALP3E; the first two-way power divider, the second two-way power divider and the third two-way power divider are all model SBTC-2-10L+; the first driver amplifier and the second driver amplifier are model ADL5545ARKZ-R7; the fixed attenuator is specifically a "π-type" resistive fixed attenuator.

5. The radio frequency signal multi-channel distribution system according to claim 4, characterized in that: The target frequency band for the first bandpass filter is 470MHz to 830MHz; the target frequency band for the second bandpass filter is 470MHz to 510MHz; the target frequency band for the third bandpass filter is 540MHz to 590MHz; the target frequency band for the fourth bandpass filter is 640MHz to 690MHz; and the target frequency band for the fifth bandpass filter is 810MHz to 830MHz.

6. A radio frequency signal multi-channel distribution circuit structure, applied to the radio frequency signal multi-channel distribution system of claim 5, characterized in that: The numerically controlled attenuator includes pins VDD, RF1, ACG1, ACG2, ACG3, ACG4, ACG5, ACG6, ACG7, NC, RF2, V1, V2, V3, V4, V5, and V6; the low-noise amplifier includes pins Vbias, RFin, and RFout; the first single-pole four-throw switch includes pins RFC, VDD, GND5, RF1, RF2, RF3, and RF4; the second single-pole four-throw switch includes pins RFC, VDD, GND5, RF1, RF2, RF3, and RF4; the first two-way power divider, the second two-way power divider, and the third two-way power divider include pins SUM, P1, and P2. The VDD pin of the digitally controlled attenuator is connected to a 5V power supply and to one end of capacitor C9, the other end of which is grounded. The RF1 pin of the digitally controlled attenuator is connected to capacitor C10, the other end of which is connected to the output of the bandpass filter. The ACG1, ACG2, ACG3, ACG4, ACG5, ACG6, ACG7, and NC pins of the digitally controlled attenuator are simultaneously connected to one end of capacitor C16, the other end of which is grounded. The V1 pin of the digitally controlled attenuator is connected to resistor R7. The V2 pin of the digitally controlled attenuator is connected to resistor R6. The V3 pin of the digitally controlled attenuator is connected to resistor R5. The V4 pin of the digitally controlled attenuator is connected to resistor R4. The V5 pin of the digitally controlled attenuator is connected to resistor R3. The V6 pin of the digitally controlled attenuator is connected to resistor R2. The low-noise amplifier's RFin pin is connected to capacitor C11, and the other end of capacitor C11 is connected to the digitally controlled attenuator's RF2 pin. The low-noise amplifier's RFin pin is also connected to inductor L1, and the other end of inductor L1 is connected to capacitor C6 and resistor R8 respectively. The other end of capacitor C6 is grounded. The other end of resistor R8 is connected to capacitor C3 and resistor R1 respectively. The other end of capacitor C3 is grounded. The other end of resistor R1 is connected to a 5V power supply, capacitor C4, capacitor C5, and inductor L2 respectively. The other end of capacitor C4 and capacitor C5 are grounded. The other end of inductor L2 is connected to the RFout pin. The Vbias pin is connected to inductor L1. The first single-pole four-throw switch has its RFC pin connected to capacitor C12, and the other end of capacitor C12 is connected to the RFout pin of the low-noise amplifier. The first single-pole four-throw switch has its VDD pin connected to a 5V power supply, and its GND5 pin grounded. A capacitor C14 is also connected between the first single-pole four-throw switch's VDD pin and its GND5 pin. The RFC pin of the second single-pole four-throw switch is connected to capacitor C13; the VDD pin of the second single-pole four-throw switch is connected to a 5V power supply; the GND5 pin of the second single-pole four-throw switch is grounded; and a capacitor C15 is also connected between the VDD pin and the GND5 pin of the second single-pole four-throw switch. The first single-pole four-throw switch pin RF1 is connected to the second single-pole four-throw switch pin RF1 in sequence through capacitor C1, second bandpass filter, and capacitor C2; the first single-pole four-throw switch pin RF2 is connected to the second single-pole four-throw switch pin RF2 in sequence through capacitor C7, third bandpass filter, and capacitor C8; the first single-pole four-throw switch pin RF3 is connected to the second single-pole four-throw switch pin RF3 in sequence through capacitor C17, fourth bandpass filter, and capacitor C18; the first single-pole four-throw switch pin RF4 is connected to the second single-pole four-throw switch pin RF4 in sequence through capacitor C20, fifth bandpass filter, and capacitor C21. The fixed attenuator includes resistors R9, R10, and R11. Resistor R9 is connected to the other end of capacitor C13, and the other end of resistor R9 is connected to the first two-way power divider. The end of resistor R9 connected to capacitor C13 is also connected to resistor R10, and the end of resistor R9 connected to the first two-way power divider is also connected to resistor R11. The SUM pin of the first two-way power divider is connected to the resistor R9; the P1 pin of the first two-way power divider is connected to the capacitor C34, and the other end of the capacitor C34 is connected to the first driver amplifier; the P2 pin of the first two-way power divider is connected to the capacitor C29, and the other end of the capacitor C29 is connected to the second driver amplifier; the output terminal of the first driver amplifier is connected to the capacitor C28 and the inductor L3, respectively; the other end of the capacitor C28 is connected to the SUM pin of the second two-way power divider; the other end of the inductor L3 is connected to the 5V power supply and the capacitor C22, and the other end of the capacitor C22 is grounded; The output of the second driver amplifier is connected to capacitor C33 and inductor L4 respectively. The other end of capacitor C33 is connected to pin SUM of the third two-way power divider. The other end of inductor L4 is connected to a 5V power supply and capacitor C31 respectively. The other end of capacitor C31 is grounded. Pin P1 of the second two-way power divider is connected to capacitor C19. Pin P2 of the second two-way power divider is connected to capacitor C27. Pin P1 of the third two-way power divider is connected to capacitor C30. Pin P2 of the third two-way power divider is connected to capacitor C32. The other ends of capacitors C19, C27, C30 and C32 are connected to the RF receiver.

7. The radio frequency signal multi-channel distribution circuit structure according to claim 6, characterized in that: The capacitance of capacitor C9 is 0.1μF, the capacitance of capacitor C10 is 100pF, the resistance of resistors R2, R3, R4, R5, R6, and R7 is 10Ω, the capacitance of capacitor C16 is 470pF, the resistance of resistor R9 is 18Ω, the resistance of resistor R10 is 300Ω, and the resistance of resistor R11 is 300Ω.

8. The radio frequency signal multi-channel distribution circuit structure according to claim 6, characterized in that: The capacitance of capacitor C11 is 100pF, the inductance of inductor L1 is 18nH, the capacitance of capacitor C6 is 100pF, the resistance of resistor R8 is 10R, the capacitance of capacitor C3 is 100pF, the resistance of resistor R1 is 6.8K, the capacitance of capacitor C4 is 0.1μF, the capacitance of capacitor C5 is 100pF, and the inductance of inductor L2 is 47nH.

9. The radio frequency signal multi-channel distribution circuit structure according to claim 6, characterized in that: The capacitance of capacitor C12 is 100pF, the capacitance of capacitor C14 is 0.1μF, the capacitance of capacitor C13 is 100pF, the capacitance of capacitor C15 is 0.1μF, and the capacitances of capacitors C1, C2, C7, C8, C17, C18, C20, and C21 are all 100pF.

10. The radio frequency signal multi-channel distribution circuit structure according to claim 6, characterized in that: The capacitors C13, C34, C29, C28, C33, C19, C27, C30, and C32 have a capacitance of 100pF, the capacitors C22 and C31 have a capacitance of 0.1μF, the inductance of inductor L3 is 100nH, and the inductance of inductor L4 is 100nH.

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