A USB3.0 data line

Abstract

The utility model discloses a USB3.0 data line relates to USB data transmission technical field to solve the short transmission distance of traditional USB3.0 data line in prior art. USB3.0 data line includes: USB's first interface, first cable of preset length, signal amplifier, second cable of preset length and USB's second interface, wherein, first end of first cable is connected with first interface, and second end of first cable is connected with the first end of signal amplifier, signal amplifier includes at least re -drive circuit, the second end of signal amplifier is connected with the first end of second cable, and second end of second cable is connected with second interface. The utility model can increase the signal transmission distance of USB3.0 data line under the premise of guaranteeing signal transmission quality.

Description

Technical Field

[0001] This utility model relates to the field of USB data transmission technology, and in particular to a USB 3.0 data cable. Background Technology

[0002] With the increasing popularity of digital devices and the growing demand for data transmission, the USB 3.0 interface has been widely adopted due to its high-speed data transmission capabilities.

[0003] Traditional USB 3.0 cables have a maximum transmission distance of only 2.5 meters. Signal attenuation occurs beyond 2.5 meters, so the issue of signal attenuation due to transmission distance needs to be addressed for longer USB 3.0 cables. Utility Model Content

[0004] The purpose of this invention is to provide a USB 3.0 data cable that increases the signal transmission distance of the USB 3.0 data cable while ensuring signal transmission quality.

[0005] To achieve the above objectives, this utility model provides the following technical solution: This utility model provides a USB 3.0 data cable, comprising: a first USB interface, a first cable of a preset length, a signal amplifier, a second cable of the preset length, and a second USB interface; The first end of the first cable is connected to the first interface; The second end of the first cable is connected to the first end of the signal amplifier; the signal amplifier includes at least a re-driving circuit. The second end of the signal amplifier is connected to the first end of the second cable; The second end of the second cable is connected to the second interface.

[0006] In one optional embodiment, the preset length is greater than or equal to 2.5 meters and less than or equal to 3 meters.

[0007] In one optional embodiment, the signal amplifier further includes a first connector, a transient voltage suppression circuit, a second connector, and a voltage regulator circuit; The first connector is connected to the first cable; The first connector is also connected to the transient voltage suppression circuit; the transient voltage suppression circuit is connected to the re-drive circuit; The re-driving circuit is connected to the second connector; The second connector is connected to the second cable; The re-driving circuit is also connected to the voltage regulator circuit, and both the re-driving circuit and the voltage regulator circuit are connected to the power supply voltage.

[0008] In one optional embodiment, the re-driving circuit includes at least a signal transfer driver and a first filter voltage regulator circuit, the first filter voltage regulator circuit being connected to the signal transfer driver.

[0009] In one optional embodiment, the first filter regulator circuit includes a first capacitor, a second capacitor, and a third capacitor; The first capacitor, the second capacitor, and the third capacitor are connected in parallel. The first terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the third capacitor are connected to the power supply voltage, and the second terminals of the first capacitor, the second terminal of the second capacitor, and the second terminal of the third capacitor are all grounded.

[0010] In one alternative embodiment, the transient voltage suppression circuit includes a plurality of transient voltage suppression diodes.

[0011] In one alternative embodiment, the re-driving circuit further includes a plurality of capacitors; the plurality of capacitors includes a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor; The plurality of transient voltage suppression diodes includes a first transient voltage suppression diode, a second transient voltage suppression diode, a third transient voltage suppression diode, and a fourth transient voltage suppression diode; The first connector is connected to the second end of the first cable; The first signal transmitting end of the first connector is connected to the input end of the first transient voltage suppression diode, and the output end of the first transient voltage suppression diode is connected to the first end of the fourth capacitor; the second end of the fourth capacitor is connected to the first end of the first overspeed transmit differential pair in the signal adapter driver; the first end of the first overspeed receive differential pair in the signal adapter driver is connected to the first signal receiving end of the second connector. The second signal transmitting end of the first connector is connected to the input end of the second transient voltage suppressor diode, and the output end of the second transient voltage suppressor diode is connected to the first end of the fifth capacitor; the second end of the fifth capacitor is connected to the second end of the first overspeed transmit differential pair in the signal adapter driver; the second end of the first overspeed receive differential pair in the signal adapter driver is connected to the second signal receiving end of the second connector. The first signal transmitting end of the second connector is connected to the first end of the sixth capacitor; the second end of the sixth capacitor is connected to the first end of the second high-speed transmission differential pair in the signal adapter driver; The first terminal of the second overspeed receiving differential pair in the signal transfer driver is connected to the input terminal of the third transient voltage suppression diode; the output terminal of the third transient voltage suppression diode is connected to the first signal receiving terminal in the first connector. The second signal transmitting end of the second connector is connected to the first end of the seventh capacitor; the second end of the seventh capacitor is connected to the second end of the second high-speed transmission differential pair in the signal adapter driver; The second terminal of the second overspeed receiving differential pair in the signal transfer driver is connected to the input terminal of the fourth transient voltage suppression diode; the output terminal of the fourth transient voltage suppression diode is connected to the second signal receiving terminal in the first connector.

[0012] In one alternative embodiment, the USB 3.0 data cable further includes a power supply circuit connected to the redrive circuit.

[0013] In one optional embodiment, the power supply circuit includes multiple voltage divider circuits; each voltage divider circuit includes two resistors; the two resistors are a first sub-resistor and a second sub-resistor, respectively; the first terminal of the first sub-resistor is connected to the power supply voltage, the first terminal of the second sub-resistor is connected to the second terminal of the first sub-resistor, and the second terminal of the second sub-resistor is grounded; The second end of the first sub-resistor is also connected to the signal transfer driver.

[0014] In one optional embodiment, the voltage regulator circuit includes a low-dropout linear regulator, an overcurrent and overvoltage protector, a second filter regulator sub-circuit, a third filter regulator sub-circuit, an eighth capacitor, a ninth capacitor, and an inductor. The output terminal of the low-dropout linear regulator and the first terminal of the second filter voltage regulator sub-circuit are both connected to the power supply voltage terminal of the signal adapter driver; the power supply voltage terminal of the signal adapter driver, the output terminal of the low-dropout linear regulator, and the first terminal of the second filter voltage regulator sub-circuit are all connected to the power supply voltage; the second terminal of the second filter voltage regulator sub-circuit is grounded. The input terminal of the low-dropout linear regulator and the first terminal of the third filter regulator sub-circuit are both connected to the first terminal of the inductor; the second terminal of the third filter regulator sub-circuit is grounded; the second terminal of the inductor and the first terminal of the eighth capacitor are both connected to the output terminal of the overcurrent and overvoltage protector; the second terminal of the eighth capacitor is grounded. The input terminal of the overcurrent and overvoltage protector is connected to the first terminal of the ninth capacitor, and the second terminal of the ninth capacitor is grounded.

[0015] Compared with the prior art, the USB 3.0 data cable provided by this utility model increases the transmission distance of the USB 3.0 data cable by adding a signal amplifier between two cables of the same length, which can amplify and restore the original signal, while ensuring the signal transmission quality. Attached Figure Description

[0016] The accompanying drawings, which are included to provide a further understanding of the present invention and constitute a part of this invention, illustrate exemplary embodiments of the present invention and, together with the description thereof, serve to explain the present invention and do not constitute an undue limitation thereof. In the drawings: Figure 1 A schematic diagram of the structure of a USB 3.0 data cable provided in one embodiment of this utility model; Figure 2 A schematic diagram of the circuit structure of a signal amplifier provided for one embodiment of the present invention; Figure 3 A schematic diagram of the circuit structure of a re-driving circuit provided in one embodiment of the present invention; Figure 4 A schematic diagram of the transient voltage suppression circuit provided in one embodiment of the present invention; Figure 5 A pin diagram of a first connector provided for one embodiment of the present invention; Figure 6 A pin diagram of a second connector provided for one embodiment of the present invention; Figure 7 A schematic diagram of the circuit structure of a power supply circuit provided in one embodiment of this utility model; Figure 8 This is a schematic diagram of the circuit structure of a voltage regulator circuit provided in one embodiment of the present invention.

[0017] Reference numerals: 10-USB-A interface; 20-First cable; 30-Signal amplifier; 40-Second cable; 50-USB-B interface; 31-Redrive circuit; 32-First connector; 33-Transient voltage suppression circuit; 34-Second connector; 35-Voltage regulator circuit; 36-Power supply circuit; 60-First filter and voltage regulator sub-circuit. Detailed Implementation

[0018] To facilitate a clear description of the technical solutions of the embodiments of this utility model, the terms "first" and "second" are used in the embodiments of this utility model to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are only used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0019] It should be noted that in this utility model, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design scheme described as "exemplary" or "for example" in this utility model should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0020] In this invention, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between the related objects, indicating that three relationships can exist.

[0021] like Figure 1 As shown, this utility model embodiment provides a USB 3.0 data cable, which may include: a first USB interface ( Figure 1 The USB-A interface 10, the first cable 20 of a preset length, the signal amplifier 30, the second cable 40 of a preset length, and the second USB interface ( Figure 1 USB-B port 50). The first end of the first cable 20 is connected to the first interface; The second end of the first cable 20 is connected to the first end of the signal amplifier 30; the signal amplifier 30 includes at least a re-driving circuit. The second end of the signal amplifier 30 is connected to the first end of the second cable 40; The second end of the second cable 40 is connected to the second interface.

[0022] Specifically, the USB-A interface of USB 3.0 is a common high-speed data transfer interface. It adds extra pins to the traditional USB 2.0 Type-A interface to support higher data transfer rates.

[0023] The technical advantages of this utility model embodiment are explained as follows: The first cable 20 and the second cable 40 are of the same length, and this design is based on special considerations. Existing USB 3.0 data cables only have one cable, and the standard length of this cable is generally 2.5 meters. However, the application scenarios of a 2.5-meter length are certainly limited. Once the application scenario exceeds 2.5 meters, the existing standard 2.5-meter USB 3.0 data cable cannot meet the actual needs. Therefore, in order to improve the application rate, it is often necessary to lengthen the USB 3.0 data cable. However, once the length of the USB 3.0 data cable exceeds 2.5 meters, the signal will experience more attenuation. In order to prevent signal attenuation, it is necessary to amplify the attenuated signal. In this utility model embodiment, a low-cost and relatively simple overall circuit structure re-driving circuit is used. The function of the re-driving circuit is to amplify the attenuated signal to the same level as the original signal. One reason is that the length of the first cable needs to be consistent with the length of the second cable. This way, when the original signal attenuates to, for example, 95% at the end of the first cable, after being amplified and restored by the re-drive circuit in the signal amplifier, it can be restored to 100% of the original signal. After passing through the second cable of the same length, when it reaches the output at the end of the second cable, the signal is still attenuated to, for example, 95%. This is equivalent to both being attenuated to, for example, 95%. However, the length of the USB 3.0 data cable in this embodiment can be increased to twice that of the prior art. That is, after utilizing the signal amplification and restoration function of the re-drive circuit in the signal amplifier, the signal transmission distance of the USB 3.0 data cable in this embodiment is increased.

[0024] Based on this inventive concept, the USB 3.0 data cable of this utility model embodiment may further include a third cable of a preset length and a second signal amplifier, wherein the second signal amplifier includes at least a second re-driving circuit.

[0025] Based on this inventive concept, the USB 3.0 data cable of this utility model embodiment may further include a fourth cable of a preset length and a third signal amplifier, wherein the third signal amplifier includes at least a third re-driving circuit.

[0026] In other words, the USB 3.0 data cable of this embodiment may include M signal amplifiers and M+1 cables of preset length. Each signal amplifier includes a corresponding re-driving circuit, and M is a positive integer greater than or equal to 1.

[0027] In a preferred embodiment, the preset length is greater than or equal to 2.5 meters and less than or equal to 3 meters.

[0028] In a more preferred embodiment, the preset length is 2.5 meters.

[0029] like Figure 2 As shown, the signal amplifier 30 includes not only the re-drive circuit 31, but also the first connector 32, the transient voltage suppression circuit 33, the second connector 34, and the voltage regulator circuit 35; The first connector 32 is connected to the first cable 20; The first connector 32 is also connected to the transient voltage suppression circuit 33; the transient voltage suppression circuit 33 is connected to the re-drive circuit 31; The re-drive circuit 31 is connected to the second connector 34; The second connector 34 is connected to the second cable 40; The re-drive circuit 31 is also connected to the voltage regulator circuit 35, and both the re-drive circuit 31 and the voltage regulator circuit 35 are connected to the power supply voltage.

[0030] Specifically, the transient voltage suppression circuit 33 is connected between the first connector 32 and the re-drive circuit 31, and its function is to protect the circuit from damage caused by voltage spikes.

[0031] like Figure 3 As shown, the re-drive circuit 31 includes at least a signal transfer driver U1 and a first filter and voltage regulator sub-circuit 60, which is connected to the signal transfer driver U1.

[0032] Specifically, such as Figure 3 As shown, the first filter and voltage regulator sub-circuit 60 includes a first capacitor C1, a second capacitor C2, and a third capacitor C3; Among them, the first capacitor C1, the second capacitor C2 and the third capacitor C3 are connected in parallel; The first terminal of the first capacitor C1, the first terminal of the second capacitor C2, and the first terminal of the third capacitor C3 are connected to the power supply voltage VCC, and the second terminals of the first capacitor C1, the second terminal of the second capacitor C2, and the second terminal of the third capacitor C3 are all grounded.

[0033] For example Figure 3 As shown, the signal adapter driver U1 can be implemented using corresponding devices from related technologies, which will not be elaborated here. It should be noted that... Figure 3 The signals on the transmission line are as follows: USB3-SSTXM: Represents a differential signal transmitted from the USB 3.0 interface (TX stands for Transmit). It is used to send differential signals from the USB 3.0 interface to the signal transfer driver U1. It is one of the key signals for sending data in USB 3.0 communication, and differential transmission improves anti-interference capability and stability.

[0034] USB3-SSTXP: In conjunction with USB3-SSTXM, it is another differential signal transmitted from the USB3.0 interface direction, together forming a differential pair, enabling the USB3.0 interface to transmit differential signals to the signal transfer driver U1, ensuring the reliability of data transmission.

[0035] USB3-SSRXM: Represents the receive differential signal from the USB3.0 interface (RX stands for Receive), used to transmit signals from subsequent circuits (after processing by signal transfer drivers, etc.) to the USB3.0 interface, and is an important carrier for USB3.0 data reception.

[0036] USB3-SSRXP: When used in conjunction with USB3-SSRXM, it provides another differential signal reception from the USB3.0 interface. Together with USB3-SSRXM, it forms a differential pair to complete the differential signal transmission to the USB3.0 interface, ensuring the quality of received data.

[0037] USB3-RxD-EN: This is a signal used to control the USB 3.0 receive direction (Rx direction) enable. The signal is transferred to the USB 3.0 receive direction enable control signal terminal of driver U1 (corresponding to the port marked USB3-RxD-EN), and is used to receive the USB 3.0 receive direction enable control signal to control the working enable state of the driver in the USB 3.0 receive direction.

[0038] USB3-EQ-A: Used for equalization control signals in USB3.0 communication. It participates in adjusting the equalization characteristics of USB3.0 signal transmission, ensuring that the signal maintains good quality during transmission and reducing signal distortion caused by transmission loss.

[0039] USB3-DE-A: This involves the control of USB3.0 differential signals, playing a controlling role in the transmission of differential signals and ensuring that USB3.0 differential signals are transmitted and processed in the expected manner.

[0040] USB3-EQ-B: Similar to USB3-EQ-A, it is also used for equalization control signals in USB3.0 communication. It adjusts the signal transmission quality from another dimension or for different channels.

[0041] USB3-DE-B: Related to the functions of USB3-DE-A, it involves the control of USB3.0 differential signals and helps to effectively manage the transmission of differential signals.

[0042] FX3-SSTXM: Represents a differential signal transmitted from the direction of FX3 (which can be understood as a certain type of processing or control module, such as the relevant main control module, etc.). It is used to send differential signals from the FX3 module to the signal transfer driver U1, participate in the data transmission process between FX3 and the signal transfer driver, and use the advantages of differential transmission to ensure signal quality.

[0043] FX3-SSTXP: When used in conjunction with FX3-SSTXM, it is another differential signal transmitted from the FX3 direction, forming a differential pair. This enables the FX3 module to transmit differential signals to the signal transfer driver U1, ensuring the reliability of data transmission.

[0044] FX3-SSRXM: Represents the received differential signal from the FX3 direction. It is used by the FX3 module to receive differential signals transmitted from the signal transfer driver U1, etc., so that the FX3 can acquire relevant data for subsequent processing, control and other operations.

[0045] FX3-SSRXP: In conjunction with FX3-SSRXM, it is another differential signal received from the FX3 direction. Together with FX3-SSRXM, it forms a differential pair to complete the reception of differential signals by the FX3 module and ensure the quality of received data.

[0046] Specifically, the transient voltage suppression circuit TVS2 includes multiple transient voltage suppression diodes. These diodes include a first transient voltage suppression diode, a second transient voltage suppression diode, a third transient voltage suppression diode, and a fourth transient voltage suppression diode.

[0047] For example Figure 4 The transient voltage suppression circuit TVS2 can be implemented using a chip of the corresponding model in related technologies, which will not be elaborated here. The chip includes at least 4 transient voltage suppression diode circuits.

[0048] like Figure 3 As shown, the re-driving circuit 31 also includes multiple capacitors; the multiple capacitors include a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7. The first connector is connected to the second end of the first cable; Combination Figure 3 , Figure 4 , Figure 5 and Figure 6 To understand, the first connector 32 (i.e. Figure 5The first signal transmitting terminal USB3-TX- of J1 is connected to the input terminal I1 of the first transient voltage suppressor diode (transmit signal USB3-SSTXM), and the output terminal O1 of the first transient voltage suppressor diode is connected to the first terminal of the fourth capacitor C4; the second terminal of the fourth capacitor C4 is connected to the first terminal TXA- of the first overspeed transmit differential pair in the signal adapter driver U1; the first terminal RXA- of the first overspeed receive differential pair in the signal adapter driver U1 (output signal FX3-SSTXM) is connected to the first signal receiving terminal (USB-RX-) in the second connector; The second signal transmitting terminal USB3-TX+ of the first connector 32 is connected to the input terminal I2 of the second transient voltage suppressor diode (transmitting signal USB3-SSTXP), and the output terminal O2 of the second transient voltage suppressor diode is connected to the first terminal of the fifth capacitor C5; the second terminal of the fifth capacitor C5 is connected to the second terminal TXA+ of the first overspeed transmit differential pair in the signal adapter driver U1; the second terminal RXA+ of the first overspeed receive differential pair in the signal adapter driver U1 (output signal FX3-SSTXP) is connected to the second signal receiving terminal (USB-RX+) of the second connector; Second connector 34 (i.e.) Figure 6 The first signal transmitting terminal (USB3-TX-) of the circuit is connected to the first terminal of the sixth capacitor (transmit signal FX3-SSRXM), and the second terminal of the sixth capacitor is connected to the first terminal TXB- of the second overspeed transmission differential pair in the signal transfer driver U1. The first terminal TXB- (output signal USB3-SSRXM) of the second overspeed receiving differential pair in the signal transfer driver U1 is connected to the input terminal I3 of the third transient voltage suppression diode; the output terminal O3 of the third transient voltage suppression diode is connected to the first signal receiving terminal (USB3-RX-) in the first connector 32. Second connector 34 (i.e.) Figure 6 The second signal transmitting terminal (USB3-TX+) of the circuit is connected to the first terminal of the seventh capacitor (transmit signal FX3-SSRXP), and the second terminal of the seventh capacitor is connected to the second terminal TXB+ of the second overspeed transmission differential pair in the signal transfer driver U1. The second terminal RXB- (output signal USB3-SSRXP) of the second overspeed receiving differential pair in the signal transfer driver U1 is connected to the input terminal I4 of the fourth transient voltage suppression diode; the output terminal O4 of the fourth transient voltage suppression diode is connected to the second signal receiving terminal (USB3-RX+) in the first connector 32.

[0049] In practical implementations, signal adapter drivers (signal adapter driver chips), such as the PI3EQX7502AI, include multiple pins, including pins TXA-, TXA+, TXB-, TXB+, RXA-, RXA+, RXB-, RXB+, two Vdd33 pins, pin RxD-EN, pin EQ-A, pin DE-A, pin EQ-B, pin DE-B, and multiple ground pins. The signal transmission direction of pins TXA-, TXA+, RXA-, and RXA+ is from the USB-A interface to the USB-B interface. The interface is used to transmit signal A. The specific transmission path is as follows: USB-A interface, first cable, first connector 32, first transient voltage suppressor diode (second transient voltage suppressor diode), capacitor C4 (capacitor C5), pin TXA- (pin TXA+), pin RXA- (pin RXB+), second connector 34; the signal transmission direction of pins TXB-, TXB+, RXB-, and RXB+ is from USB-B interface to USB-A interface, used to transmit signal B. Thus, bidirectional signal transmission of signal A from USB-A interface to USB-B interface and signal B from USB-B interface to USB-A interface is completed. The two Vdd33 pins are for connecting the power supply voltage VCC. Multiple ground pins are used depending on the situation. Pin RxD-EN is for connecting the enable signal. Pins EQ-A and EQ-B are used to set the equalization value; pins DE-A and DE-B are used to set the buffer value. Of course, the signal conversion driver chip may also include other pins, which will not be listed here.

[0050] For example Figure 5 As shown, the first connector 32, also known as the USB3.0_A_180 interface, is an integrated circuit chip. It includes multiple pins such as VBUS, D-, D+, two ground pins GND1 and GND2, two signal transmit pins USB_TX- and USB_TX+, and two signal receive pins USB_RX- and USB_RX+, as well as other ground pins. Pins D- and D+ are for data processing to ensure backward compatibility with USB2.0 for USB3.0; pin VBUS is the power supply input.

[0051] Similarly to the first connector 32, for example... Figure 6As shown, the second connector may also include the same number of pins, such as pin VBUS, pin D-, pin D+, two ground pins GND1 and GND2, two signal transmitting pins USB_TX- and USB_TX+, and two signal receiving pins USB_RX- and USB_RX+, as well as other ground pins. Pins D- and D+ are for data processing to ensure backward compatibility with USB 2.0 for USB 3.0; pin VBUS is the input terminal for the power line (VBUS). In summary, the circuit structures of the first connector 32 and the second connector 34 are basically the same, jointly completing bidirectional signal transmission. Capacitors C20 and C30 are both connected to pin VBUS of the first connector J1 to protect the electrical signals on that pin.

[0052] For example Figure 2 and Figure 7 The USB 3.0 data cable also includes a power supply circuit 36, which is connected to the re-drive circuit 31. In all the figures of this embodiment, DGND is the ground terminal.

[0053] The power supply circuit 36 ​​includes multiple voltage divider circuits; each voltage divider circuit includes two resistors; the two resistors are a first sub-resistor and a second sub-resistor; the first terminal of the first sub-resistor is connected to the power supply voltage, the first terminal of the second sub-resistor is connected to the second terminal of the first sub-resistor, and the second terminal of the second sub-resistor is grounded; the second terminal of the first resistor is also connected to the signal conversion driver.

[0054] For example, such as Figure 7 As shown, the power supply circuit 36 ​​includes a first voltage divider circuit, a second voltage divider circuit, a third voltage divider circuit, a fourth voltage divider circuit, and a fifth voltage divider circuit.

[0055] In the first voltage divider resistor configuration, the first sub-resistor is resistor R1, and the second sub-resistor is resistor R2. The first terminal of resistor R1 is connected to the supply voltage VCC, and the second terminal of resistor R1 is connected to the first terminal of resistor R2. The second terminal of resistor R2 is grounded. The second terminal of resistor R1 is connected to pin RxD-EN of the signal adapter driver U1. It should be noted that the USB 3.0 receive direction enable control signal terminal of the signal adapter driver U1 (corresponding to the port labeled USB3-RxD-EN, i.e., pin RxD-EN in this case) is used to receive the USB 3.0 receive direction enable control signal to control the driver's operating enable state in the USB 3.0 receive direction. Further details will not be elaborated upon below.

[0056] In the second voltage divider circuit, the first sub-resistor is the third resistor R3, and the second sub-resistor is the fourth resistor R4. The first terminal of the third resistor R3 is connected to the supply voltage VCC, and the second terminal of the third resistor R3 is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is grounded. The second terminal of the third resistor R3 is connected to the EQ-A pin of the signal adapter driver U1.

[0057] In the third voltage divider circuit, the first sub-resistor is the fifth resistor R5, and the second sub-resistor is the sixth resistor R6. The first terminal of the fifth resistor R5 is connected to the supply voltage VCC, and the second terminal of the fifth resistor R5 is connected to the first terminal of the sixth resistor R6. The second terminal of the sixth resistor R6 is grounded. The second terminal of the fifth resistor R5 is connected to pin DE-A of the signal transfer driver U1.

[0058] In the fourth voltage divider circuit, the first sub-resistor is the seventh resistor R7, and the second sub-resistor is the eighth resistor R8. The first terminal of the seventh resistor R7 is connected to the supply voltage VCC, and the second terminal of the seventh resistor R7 is connected to the first terminal of the eighth resistor R8. The second terminal of the eighth resistor R8 is grounded. The second terminal of the seventh resistor R7 is connected to the EQ-B pin of the signal adapter driver U1.

[0059] In the fifth voltage divider resistor, the first sub-resistor is the ninth resistor R9, and the second sub-resistor is the tenth resistor R10. The first terminal of the ninth resistor R9 is connected to the supply voltage VCC, and the second terminal of the ninth resistor R9 is connected to the first terminal of the tenth resistor R10. The second terminal of the tenth resistor R10 is grounded. The second terminal of the ninth resistor R9 is connected to pin DE-B of the signal transfer driver U1.

[0060] like Figure 2 As shown, the voltage regulator circuit 35 includes at least a low-dropout linear regulator and an overcurrent and overvoltage protector; such as Figure 8 As shown, the voltage regulator circuit 35 also includes a second filter voltage regulator sub-circuit, a third filter voltage regulator sub-circuit, an eighth capacitor, a ninth capacitor, and an inductor; Among them, Figure 8 In this circuit, the output terminals (OUT1 and OUT2) of the low-dropout linear regulator U2 and the first terminal of the second filter regulator circuit are both connected to the power supply voltage terminal (pin Vdd33) of the signal transfer driver. The low-dropout linear regulator U2 is used to output a stable voltage VCC at the output terminal. The power supply voltage terminal of the signal transfer driver U1, the output terminals (OUT1 and OUT2) of the low-dropout linear regulator U2, and the first terminal of the second filter regulator circuit are all connected to the power supply voltage VCC. The second terminal of the second filter regulator circuit is grounded. The second filter regulator circuit includes a tenth capacitor C10 and an eleventh capacitor C11. The first terminals of the tenth capacitor C10 and the eleventh capacitor C11 are both connected to the power supply voltage VCC, and the second terminals of the tenth capacitor C10 and the eleventh capacitor C11 are both grounded. The input terminal IN of the low dropout linear regulator U2 and the first terminal of the third filter regulator circuit are both connected to the first terminal of the inductor FB2; the second terminal of the third filter regulator circuit is grounded; the second terminal of the inductor FB2 and the first terminal of the eighth capacitor C8 are both connected to the output terminal OUT of the overcurrent and overvoltage protector TVS3; the second terminal of the eighth capacitor C8 is grounded. from Figure 8 Here's a breakdown: VBUS_IN is typically the input voltage terminal of the USB bus. In a USB system, VBUS is the bus voltage that provides power to USB devices. "VBUS_IN" indicates that this point is the input port for the USB bus voltage, used to receive the external USB bus power supply voltage, providing the power input basis for subsequent circuits (such as the overcurrent and overvoltage protector TVS3). USB3_VBUS generally refers to the power voltage line of the USB 3.0 bus. Under the USB 3.0 specification, it is the bus voltage line used to provide power to USB 3.0 related devices or circuits, receiving power processed by components such as TVS3 and inductor FB2, to power subsequent devices such as U2, ensuring the power supply of USB 3.0 devices or modules.

[0061] The input terminal IN of the overcurrent and overvoltage protector TVS3 is connected to the first terminal of the ninth capacitor C9, and the second terminal of the ninth capacitor C9 is grounded. The enable terminal EN and the ground terminal GND of the overcurrent and overvoltage protector TVS3 are both grounded.

[0062] The function of the overcurrent and overvoltage protector TVS3 is to protect the circuit.

[0063] For example, the low-dropout linear regulator U2 can be implemented using the corresponding chip model in related technologies, which will not be elaborated here.

[0064] For example, the overcurrent and overvoltage protector TVS3 can be implemented using the corresponding chip model in related technologies, which will not be elaborated here.

[0065] As can be seen from the above, the function of the voltage regulator circuit 35 is to convert the input power supply (the input terminal IN of the overcurrent and overvoltage protector TVS3 is connected to the input power supply) into a stable voltage, such as 3.3V, and output the stable voltage.

[0066] Although the present invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0067] Although the present invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made therein without departing from the spirit and scope of the present invention. Accordingly, this specification and drawings are merely exemplary descriptions of the present invention as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the present invention. Clearly, those skilled in the art can make various alterations and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such modifications and modifications of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include such modifications and modifications.

Claims

1. A USB 3.0 data cable, characterized in that, include: The USB first interface, the first cable of a preset length, the signal amplifier, the second cable of the preset length, and the USB second interface; The first end of the first cable is connected to the first interface; The second end of the first cable is connected to the first end of the signal amplifier; the signal amplifier includes at least a re-drive circuit, a first connector, a transient voltage suppression circuit, a second connector, and a voltage regulator circuit; The first connector is connected to the first cable; The first connector is also connected to the transient voltage suppression circuit; the transient voltage suppression circuit is connected to the re-drive circuit; The re-driving circuit is connected to the second connector; The second connector is connected to the second cable; The re-driving circuit is also connected to the voltage regulator circuit, and both the re-driving circuit and the voltage regulator circuit are connected to the power supply voltage. The second end of the signal amplifier is connected to the first end of the second cable; The second end of the second cable is connected to the second interface.

2. The USB 3.0 data cable according to claim 1, characterized in that, The preset length is greater than or equal to 2.5 meters and less than or equal to 3 meters.

3. The USB 3.0 data cable according to claim 1, characterized in that, The re-driving circuit includes at least a signal transfer driver and a first filter and voltage regulator sub-circuit, wherein the first filter and voltage regulator sub-circuit is connected to the signal transfer driver.

4. The USB 3.0 data cable according to claim 3, characterized in that, The first filter and voltage regulator sub-circuit includes a first capacitor, a second capacitor, and a third capacitor; The first capacitor, the second capacitor, and the third capacitor are connected in parallel. The first terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the third capacitor are connected to the power supply voltage, and the second terminals of the first capacitor, the second terminal of the second capacitor, and the second terminal of the third capacitor are all grounded.

5. The USB 3.0 data cable according to claim 4, characterized in that, The transient voltage suppression circuit includes multiple transient voltage suppression diodes.

6. The USB 3.0 data cable according to claim 5, characterized in that, The re-driving circuit also includes multiple capacitors; the multiple capacitors include a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor; The plurality of transient voltage suppression diodes includes a first transient voltage suppression diode, a second transient voltage suppression diode, a third transient voltage suppression diode, and a fourth transient voltage suppression diode; The first connector is connected to the second end of the first cable; The first signal transmitting end of the first connector is connected to the input end of the first transient voltage suppression diode, and the output end of the first transient voltage suppression diode is connected to the first end of the fourth capacitor; the second end of the fourth capacitor is connected to the first end of the first overspeed transmit differential pair in the signal adapter driver; the first end of the first overspeed receive differential pair in the signal adapter driver is connected to the first signal receiving end of the second connector. The second signal transmitting end of the first connector is connected to the input end of the second transient voltage suppressor diode, and the output end of the second transient voltage suppressor diode is connected to the first end of the fifth capacitor; the second end of the fifth capacitor is connected to the second end of the first overspeed transmit differential pair in the signal adapter driver; the second end of the first overspeed receive differential pair in the signal adapter driver is connected to the second signal receiving end of the second connector. The first signal transmitting end of the second connector is connected to the first end of the sixth capacitor; the second end of the sixth capacitor is connected to the first end of the second high-speed transmission differential pair in the signal adapter driver; The first terminal of the second overspeed receiving differential pair in the signal transfer driver is connected to the input terminal of the third transient voltage suppression diode; The output terminal of the third transient voltage suppression diode is connected to the first signal receiving terminal in the first connector; The second signal transmitting end of the second connector is connected to the first end of the seventh capacitor; the second end of the seventh capacitor is connected to the second end of the second high-speed transmission differential pair in the signal adapter driver; The second terminal of the second overspeed receiving differential pair in the signal transfer driver is connected to the input terminal of the fourth transient voltage suppression diode; the output terminal of the fourth transient voltage suppression diode is connected to the second signal receiving terminal in the first connector.

7. The USB 3.0 data cable according to claim 4, characterized in that, It also includes the power supply circuit. The power supply circuit is connected to the re-drive circuit.

8. The USB 3.0 data cable according to claim 7, characterized in that, The power supply circuit includes multiple voltage divider circuits; each voltage divider circuit includes two resistors; the two resistors are a first sub-resistor and a second sub-resistor; the first terminal of the first sub-resistor is connected to the power supply voltage, the first terminal of the second sub-resistor is connected to the second terminal of the first sub-resistor, and the second terminal of the second sub-resistor is grounded; The second end of the first sub-resistor is also connected to the signal transfer driver.

9. The USB 3.0 data cable according to claim 3, characterized in that, The voltage regulator circuit includes a low dropout linear regulator, an overcurrent and overvoltage protector, a second filter regulator sub-circuit, a third filter regulator sub-circuit, an eighth capacitor, a ninth capacitor, and an inductor. The output terminal of the low-dropout linear regulator and the first terminal of the second filter voltage regulator sub-circuit are both connected to the power supply voltage terminal of the signal adapter driver; the power supply voltage terminal of the signal adapter driver, the output terminal of the low-dropout linear regulator, and the first terminal of the second filter voltage regulator sub-circuit are all connected to the power supply voltage; the second terminal of the second filter voltage regulator sub-circuit is grounded. The input terminal of the low-dropout linear regulator and the first terminal of the third filter regulator sub-circuit are both connected to the first terminal of the inductor; the second terminal of the third filter regulator sub-circuit is grounded; the second terminal of the inductor and the first terminal of the eighth capacitor are both connected to the output terminal of the overcurrent and overvoltage protector; the second terminal of the eighth capacitor is grounded. The input terminal of the overcurrent and overvoltage protector is connected to the first terminal of the ninth capacitor, and the second terminal of the ninth capacitor is grounded.

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