An antenna feed line extension system for a reader / writer

Abstract

The utility model discloses an antenna feeder extension system of reader -writer. Antenna feeder extension system of reader -writer includes: CPU module, SPI signal coding module, SPI signal decoding module and wireless radio frequency module, CPU module is used for data processing and will handle after SPI signal transmission to SPI signal coding module, SPI signal coding module will SPI signal conversion difference signal and transmission to SPI signal decoding module, SPI signal decoding module and wireless radio frequency module set up on antenna board, and wireless radio frequency module is connected with SPI signal decoding module, and SPI signal decoding module will difference signal restore SPI signal and transmission to wireless radio frequency module, and wireless radio frequency module realizes the read -write function of non -contact ticket card according to SPI signal. The utility model realizes signal long -distance stable transmission, promotes communication reliability, satisfies the demand of complex wiring scene.

Description

Technical Field

[0001] This utility model relates to the field of rail transit technology, and in particular to an antenna feeder extension system for a reader / writer. Background Technology

[0002] In rail transit applications, traditional dedicated readers typically employ a multi-antenna design, connecting the reader's mainboard to the antenna board via coaxial cables or SPI signal lines. Within devices such as TVMs and AGMs, the complex structural layout often necessitates long connecting cables for signal transmission between the reader and the antenna board. In some applications, to reduce system costs and the number of readers, even longer antenna feeder lengths are required, sometimes necessitating "through-machine" cabling (i.e., cables must traverse the entire device cavity). However, limited by the transmission distance of existing interface technologies, standard feeder lengths are insufficient for such long-distance connections. Therefore, a technical solution is urgently needed to effectively extend the connection distance between the reader and the antenna board, thereby reducing overall system costs and simplifying cabling design.

[0003] Early rail transit readers mostly used coaxial cables to connect the antenna, and the NFC radio frequency chip was integrated on the motherboard. This solution suffered from low modularity and poor development flexibility. At the same time, coaxial cables are sensitive to bending, have low mechanical strength, and are prone to signal attenuation or breakage due to repeated bending, resulting in poor reliability and have been gradually phased out by the industry.

[0004] Current mainstream solutions have shifted to modular designs, integrating the NFC chip onto the antenna board and communicating with the reader motherboard via SPI (Serial Peripheral Interface) signal lines. This design improves system integration and maintainability, but the communication distance of the SPI interface is limited, typically with an effective transmission length not exceeding 3 meters. In applications requiring long-distance cabling (such as large AGM equipment or centralized multi-antenna layouts), the insufficient SPI feeder length is particularly prominent, making it difficult to meet practical deployment requirements. Therefore, existing technologies still face significant technical bottlenecks in providing long-distance, high-reliability, and low-cost antenna connection solutions. Utility Model Content

[0005] This invention provides an antenna feeder extension system for a reader / writer to solve the technical problem that the transmission distance of the existing SPI interface is limited and it is difficult to meet the requirements of long-distance cabling. It enables stable long-distance signal transmission, significantly improves communication reliability, and meets the application requirements of complex cabling scenarios.

[0006] According to one aspect of the present invention, an antenna feeder extension system for a reader / writer is provided, the antenna feeder extension system for the reader / writer includes: a CPU module, an SPI signal encoding module, an SPI signal decoding module, and a wireless radio frequency module;

[0007] The CPU module and the SPI signal encoding module are mounted on the card reader and are connected. The CPU module is used for data processing and transmits the processed SPI signal to the SPI signal encoding module.

[0008] The SPI signal encoding module is connected to the SPI signal decoding module. The SPI signal encoding module is used to convert the SPI signal into a differential signal and transmit it to the SPI signal decoding module.

[0009] The SPI signal decoding module and the wireless radio frequency module are mounted on the antenna board. The wireless radio frequency module is connected to the SPI signal decoding module. The SPI signal decoding module is used to restore the differential signal to the SPI signal and transmit it to the wireless radio frequency module. The wireless radio frequency module is used to realize the read and write function of the contactless ticket card according to the SPI signal.

[0010] Optionally, the CPU module is located on the motherboard side of the card reader.

[0011] Optionally, the SPI signal encoding module is located on the motherboard of the card reader.

[0012] Optionally, the SPI signal decoding module is located at the antenna board end, and the SPI signal encoding module and the SPI decoding module are arranged in pairs.

[0013] Optionally, the wireless radio frequency module includes: an NFC chip and an antenna circuit;

[0014] The NFC chip is connected to the antenna circuit, which transmits the SPI signal to the NFC chip. The NFC chip is used to implement the read and write function of the contactless ticket card based on the SPI signal.

[0015] Optionally, the SPI signal encoding module includes: a 123rd resistor, a 94th capacitor, a 95th capacitor, an SPI communication interface chip, a 132nd resistor, a 133rd resistor, a 96th capacitor, a 97th capacitor, a 134th resistor, a pulse transformer, a 136th resistor, a 135th resistor, a 124th resistor, a 125th resistor, a 126th resistor, a 127th resistor, a 128th resistor, a 129th resistor, a 130th resistor, and a 131st resistor;

[0016] The first 123rd resistor is connected between the first power supply terminal and the first pin of the SPI communication interface chip. The sixth pin of the SPI communication interface chip is connected to the first power supply terminal, the first terminal of the ninety-fourth capacitor, and the first terminal of the ninety-fifth capacitor. The second terminal of the ninety-fourth capacitor is grounded, and the second terminal of the ninety-fifth capacitor is grounded. The sixteenth pin of the SPI communication interface chip is connected to the first terminal of the first 132nd resistor. The second terminal of the first 132nd resistor is connected to the first terminal of the first 133rd resistor and then to the fifteenth pin of the SPI communication interface chip. The second terminal of the first 133rd resistor is grounded. The first 134th resistor... The first end of the first resistor is connected to the eleventh pin of the SPI communication interface chip and the first pin of the pulse transformer. The second end of the first 134 resistor is connected to the tenth pin of the SPI communication interface chip and the third pin of the pulse transformer. The first 136 resistor is connected between the first pin and the sixteenth pin of the pulse transformer. The first 135 resistor is connected between the third pin and the fourteenth pin of the pulse transformer. The ninth pin of the SPI communication interface chip is connected to the first end of the ninety-sixth capacitor, the first end of the ninety-seventh capacitor, and the second power supply terminal. The second end of the ninety-sixth capacitor is grounded, and the second end of the ninety-seventh capacitor is grounded.

[0017] Optionally, the seventh pin of the SPI communication interface chip is connected to the first end of the first 124 resistor and the first end of the first 125 resistor, the second end of the first 124 resistor is connected to the second power supply terminal, and the second end of the first 125 resistor is grounded.

[0018] Optionally, the eighth pin of the SPI communication interface chip is connected to the first end of the first 126 resistor and the first end of the first 127 resistor, the second end of the first 126 resistor is connected to the second power supply terminal, and the second end of the first 127 resistor is grounded.

[0019] Optionally, the twelfth pin of the SPI communication interface chip is connected to the first end of the first 128 resistor and the first end of the first 129 resistor, the second end of the first 128 resistor is connected to the second power supply terminal, and the second end of the first 129 resistor is grounded.

[0020] Optionally, the thirteenth pin of the SPI communication interface chip is connected to the first end of the first 130 resistor and the first end of the first 131 resistor, the second end of the first 130 resistor is connected to the second power supply terminal, and the second end of the first 131 resistor is grounded.

[0021] The technical solution of this utility model embodiment involves a CPU module processing data and transmitting the processed SPI signal to an SPI signal encoding module. The SPI signal encoding module converts the SPI signal into a differential signal and transmits it to an SPI signal decoding module. The SPI signal decoding module restores the differential signal to an SPI signal and transmits it to a wireless radio frequency module. The wireless radio frequency module uses the SPI signal to implement the contactless ticket reading and writing function. This solves the technical problem that the existing SPI interface has limited transmission distance and cannot meet the requirements of long-distance cabling. It achieves stable long-distance signal transmission, suppresses the low reliability caused by long cables, significantly improves communication reliability, and fully meets the application requirements of complex cabling scenarios in rail transit equipment.

[0022] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 A schematic diagram of the antenna feeder extension system of a reader / writer provided according to an embodiment of the present utility model;

[0025] Figure 2 This is a circuit diagram of an SPI signal encoding module provided according to an embodiment of the present utility model. Detailed Implementation

[0026] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0027] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0028] Figure 1 This is a schematic diagram of the antenna feeder extension system for a reader according to an embodiment of the present invention, with reference to... Figure 1 According to one aspect of the present invention, an antenna feeder extension system for a reader / writer is provided. The antenna feeder extension system for the reader / writer includes: a CPU module 10, an SPI signal encoding module 20, an SPI signal decoding module 30, and a wireless radio frequency module 40.

[0029] CPU module 10 and SPI signal encoding module 20 are mounted on the card reader. CPU module 10 and SPI signal encoding module 20 are connected. CPU module 10 is used for data processing and transmits the processed SPI signal to SPI signal encoding module 20.

[0030] The SPI signal encoding module 20 is connected to the SPI signal decoding module 30. The SPI signal encoding module 20 is used to convert the SPI signal into a differential signal and transmit it to the SPI signal decoding module 30.

[0031] The SPI signal decoding module 30 and the wireless radio frequency module 40 are mounted on the antenna board. The wireless radio frequency module 40 is connected to the SPI signal decoding module 30. The SPI signal decoding module 30 is used to restore the differential signal to the SPI signal and transmit it to the wireless radio frequency module 40. The wireless radio frequency module 40 is used to realize the read and write function of the contactless ticket card according to the SPI signal.

[0032] Specifically, based on the traditional SPI feeder architecture, a pair of SPI signal encoding modules 20 and SPI signal decoding modules 30 are introduced into the signal transmission link. Through encoding techniques such as signal modulation, level conversion, or differential transmission, the original SPI communication signal is converted into a differential signal form with strong anti-interference capability and longer transmission distance, thereby achieving stable transmission of SPI data over long-distance cables. At the receiving end, the SPI signal decoding module 30 restores the received differential signal to a standard SPI format SPI signal for normal use by the antenna board.

[0033] By converting the SPI signal into a differential signal with strong anti-interference capability and high signal integrity, this embodiment of the invention achieves stable long-distance signal transmission. This differential transmission method effectively suppresses problems such as signal attenuation, electromagnetic interference, and timing offset caused by long cables, significantly improving communication reliability. Actual testing has verified that, using this encoding / decoding mechanism, the transmission distance of the SPI signal can reach up to 10 meters, far exceeding the 3-meter limit of traditional direct connection methods, fully meeting the application requirements of complex wiring scenarios in rail transit equipment.

[0034] Through the above technical means, this embodiment effectively breaks through the 3-meter transmission distance limitation of the traditional SPI interface, significantly extends the connection distance between the reader and the antenna board, maintains the modular design advantages of the system, improves wiring flexibility, and reduces the system integration difficulty and overall cost of rail transit terminal equipment (such as TVM and AGM).

[0035] The technical solution of this utility model embodiment involves a CPU module processing data and transmitting the processed SPI signal to an SPI signal encoding module. The SPI signal encoding module converts the SPI signal into a differential signal and transmits it to an SPI signal decoding module. The SPI signal decoding module restores the differential signal to an SPI signal and transmits it to a wireless radio frequency module. The wireless radio frequency module uses the SPI signal to implement the contactless ticket reading and writing function. This solves the technical problem that the existing SPI interface has limited transmission distance and cannot meet the requirements of long-distance cabling. It achieves stable long-distance signal transmission, suppresses the low reliability caused by long cables, significantly improves communication reliability, and fully meets the application requirements of complex cabling scenarios in rail transit equipment.

[0036] Continue to refer to Figure 1 Optionally, the CPU module 10 is located on the motherboard side of the card reader.

[0037] Continue to refer to Figure 1 Optionally, the SPI signal encoding module 20 is located on the motherboard of the card reader.

[0038] Continue to refer to Figure 1 Optionally, the SPI signal decoding module 30 is located at the antenna board end, and the SPI signal encoding module 20 and the SPI decoding module 30 are set in pairs.

[0039] Specifically, the CPU module 10 is located on the reader motherboard side and is responsible for overall control and data processing; the SPI signal encoding module 20 and the SPI signal decoding module 30 are set up in pairs and deployed on the motherboard and antenna board respectively, and are used to encode, convert and restore the SPI communication signal.

[0040] Optionally, the wireless radio frequency module includes: an NFC chip and an antenna circuit;

[0041] The NFC chip is connected to the antenna circuit, which transmits the SPI signal to the NFC chip. The NFC chip then uses the SPI signal to read and write contactless tickets.

[0042] Specifically, the wireless radio frequency module is integrated on the antenna board, including an NFC chip and antenna circuitry, enabling contactless ticket reading and writing. After receiving a digital command from the SPI, the NFC chip's internal radio frequency circuitry generates and modulates a 13.56MHz carrier signal according to the command content. This modulated radio frequency signal is output to the antenna circuitry through the chip's TX pin. Upon receiving the modulated signal, the antenna circuitry establishes an alternating electromagnetic field around itself through electromagnetic induction. This electromagnetic field provides energy to passive tickets entering its working area, activating them; simultaneously, it transmits the modulated signal carrying the command information. The activated ticket, upon receiving the command, returns response data via load modulation. This response changes the electromagnetic field at the antenna circuitry's receiving end. The changed electromagnetic field signal is captured by the antenna circuitry and sent back to the NFC chip via the RX pin. The NFC chip's internal circuitry demodulates and decodes the signal, temporarily storing the resulting digital response data in its buffer. The NFC chip then uploads the ticket's response data to the main controller via the SPI bus (MISO line) or notifies the main controller that the data is ready via the IRQ line. The main controller thus completed a full contactless read / write operation.

[0043] By combining a high-performance NFC chip with a precisely tuned antenna circuit and communicating with the CPU module via a standard SPI interface, a stable and efficient contactless ticket reading and writing function is achieved. The SPI interface provides a high-speed data transmission rate, making this module particularly suitable for applications requiring rapid transactions or large data volume read / write operations, such as transportation ticket gates, vending machines, and smart POS terminals.

[0044] Figure 2 This is a circuit diagram of an SPI signal encoding module according to an embodiment of the present invention, with reference to... Figure 2Optionally, the SPI signal encoding module includes: resistor R123 (123rd), capacitor C94 (94th), capacitor C95 (95th), SPI communication interface chip U17, resistor R132 (132nd), resistor R133 (133rd), capacitor C96 (96th), capacitor C97 (97th), resistor R134 (134th), pulse transformer U18, resistor R136 (136th), resistor R135 (135th), resistor R124 (124th), resistor R125 (125th), resistor R126 (126th), resistor R127 (127th), resistor R128 (128th), resistor R129 (129th), resistor R130 (130th), and resistor R131 (131st).

[0045] Resistor R123 (number 123) is connected between the first power supply terminal VCC and pin 1 of the SPI communication interface chip U17. Pin 6 of the SPI communication interface chip U17 is connected to the first power supply terminal VCC, the first terminal of capacitor C94 (number 94), and the first terminal of capacitor C95 (number 95). The second terminal of capacitor C94 and capacitor C95 are grounded. Pin 16 of the SPI communication interface chip U17 is connected to the first terminal of resistor R132 (number 132). The second terminal of resistor R132 is connected to the first terminal of resistor R133 (number 133), and then connected to pin 15 of the SPI communication interface chip U17. The second terminal of resistor R133 is grounded. The first terminal of resistor R134 is... The 11th pin 11 of the SPI communication interface chip U17 and the first pin 1 of the pulse transformer U18 are connected. The second end of the 134th resistor R134 is connected to the 10th pin 10 of the SPI communication interface chip U17 and the third pin 3 of the pulse transformer U18. The 136th resistor R136 is connected between the first pin 1 and the 16th pin 16 of the pulse transformer U18. The 135th resistor R135 is connected between the third pin 3 and the fourteenth pin 14 of the pulse transformer U18. The 9th pin 9 of the SPI communication interface chip U17 is connected to the first end of the 96th capacitor C96, the first end of the 97th capacitor C97, and the second power supply terminal VCC-5V0. The second end of the 96th capacitor C96 and the second end of the 97th capacitor C97 are grounded.

[0046] Continue to refer to Figure 2 Optionally, pin 7 of the SPI communication interface chip U17 is connected to the first end of resistor R124 and resistor R125, the second end of resistor R124 is connected to the second power supply terminal VCC-5V0, and the second end of resistor R125 is grounded.

[0047] Continue to refer to Figure 2 Optionally, pin 8 of the SPI communication interface chip U17 is connected to the first end of resistor R126 and resistor R127, the second end of resistor R126 is connected to the second power supply terminal VCC-5V0, and the second end of resistor R127 is grounded.

[0048] Continue to refer to Figure 2 Optionally, pin 12 of the SPI communication interface chip U17 is connected to the first end of resistor R128 and resistor R129, the second end of resistor R128 is connected to the second power supply terminal VCC-5V0, and the second end of resistor R129 is grounded.

[0049] Continue to refer to Figure 2 Optionally, pin 13 of the SPI communication interface chip U17 is connected to the first end of resistor R130 and resistor R131, the second end of resistor R130 is connected to the second power supply terminal VCC-5V0, and the second end of resistor R131 is grounded.

[0050] Specifically, the circuit structures of the SPI signal encoding module and the SPI signal decoding module are basically the same. The difference is that the MSTR pin of the SPI signal encoding module is a pull-up pin in configuration mode, while the MSTR pin of the SPI signal decoding module is a pull-down pin in configuration mode.

[0051] The core working principle of the SPI signal encoding module is to achieve electrical isolation between the master and slave devices while maintaining SPI communication, thereby improving anti-interference capabilities and protecting the core circuit from external voltage surges. The signal is encoded / driven through the SPI communication interface chip U17, and the pulse transformer U18 transmits the energy signal while isolating current. The peripheral circuitry serves two purposes: a resistor network ensures signal integrity and sets the correct voltage level; a capacitor network provides a stable and clean voltage to both power supplies.

[0052] The working principle of this module can be summarized in the following steps: Standard SPI signal input / output: The master controller (such as an MCU) sends standard SPI signals (SCLK, MOSI, CS) and receives MISO signals. Signal encoding and isolation: The SPI signal first enters the SPI communication interface chip U17, which encodes or levels the SPI signal, and then performs electrical isolation through the pulse transformer U18. The transformer transmits the signal through magnetic field coupling, cutting off the direct electrical connection. Signal decoding and recovery: On the other side of the isolation, the signal is decoded or processed and restored to a standard SPI signal for transmission to the target slave device. Power isolation: To achieve complete isolation, both sides of the module (master side and slave device side) must be powered by independent isolated power supplies. Capacitors C94-C97 are used for power filtering on these two sides.

[0053] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. An antenna feeder extension system for a reader / writer, characterized in that, include: CPU module, SPI signal encoding module, SPI signal decoding module, and wireless radio frequency module; The CPU module and the SPI signal encoding module are mounted on the card reader and are connected. The CPU module is used for data processing and transmits the processed SPI signal to the SPI signal encoding module. The SPI signal encoding module is connected to the SPI signal decoding module. The SPI signal encoding module is used to convert the SPI signal into a differential signal and transmit it to the SPI signal decoding module. The SPI signal decoding module and the wireless radio frequency module are mounted on the antenna board. The wireless radio frequency module is connected to the SPI signal decoding module. The SPI signal decoding module is used to restore the differential signal to the SPI signal and transmit it to the wireless radio frequency module. The wireless radio frequency module is used to realize the read and write function of the contactless ticket card according to the SPI signal.

2. The system according to claim 1, characterized in that, The CPU module is located on the motherboard side of the card reader.

3. The system according to claim 1, characterized in that, The SPI signal encoding module is located on the motherboard of the card reader.

4. The system according to claim 1, characterized in that, The SPI signal decoding module is located at the antenna board end, and the SPI signal encoding module is set in pairs with the SPI signal decoding module.

5. The system according to claim 1, characterized in that, The wireless radio frequency module includes: an NFC chip and an antenna circuit; The NFC chip is connected to the antenna circuit, which transmits the SPI signal to the NFC chip. The NFC chip is used to implement the read and write function of the contactless ticket card based on the SPI signal.

6. The system according to claim 1, characterized in that, The SPI signal encoding module includes: resistor 123, capacitor 94, capacitor 95, SPI communication interface chip, resistor 132, resistor 133, capacitor 96, capacitor 97, resistor 134, pulse transformer, resistor 136, resistor 135, resistor 124, resistor 125, resistor 126, resistor 127, resistor 128, resistor 129, resistor 130, and resistor 131; The first 123rd resistor is connected between the first power supply terminal and the first pin of the SPI communication interface chip. The sixth pin of the SPI communication interface chip is connected to the first power supply terminal, the first terminal of the ninety-fourth capacitor, and the first terminal of the ninety-fifth capacitor. The second terminal of the ninety-fourth capacitor is grounded, and the second terminal of the ninety-fifth capacitor is grounded. The sixteenth pin of the SPI communication interface chip is connected to the first terminal of the first 132nd resistor. The second terminal of the first 132nd resistor is connected to the first terminal of the first 133rd resistor and then to the fifteenth pin of the SPI communication interface chip. The second terminal of the first 133rd resistor is grounded. The first 134th resistor... The first end of the first resistor is connected to the eleventh pin of the SPI communication interface chip and the first pin of the pulse transformer. The second end of the first 134 resistor is connected to the tenth pin of the SPI communication interface chip and the third pin of the pulse transformer. The first 136 resistor is connected between the first pin and the sixteenth pin of the pulse transformer. The first 135 resistor is connected between the third pin and the fourteenth pin of the pulse transformer. The ninth pin of the SPI communication interface chip is connected to the first end of the ninety-sixth capacitor, the first end of the ninety-seventh capacitor, and the second power supply terminal. The second end of the ninety-sixth capacitor is grounded, and the second end of the ninety-seventh capacitor is grounded.

7. The system according to claim 6, characterized in that, The seventh pin of the SPI communication interface chip is connected to the first end of the first 124 resistor and the first end of the first 125 resistor. The second end of the first 124 resistor is connected to the second power supply terminal, and the second end of the first 125 resistor is grounded.

8. The system according to claim 6, characterized in that, The eighth pin of the SPI communication interface chip is connected to the first end of the first 126 resistor and the first end of the first 127 resistor. The second end of the first 126 resistor is connected to the second power supply terminal, and the second end of the first 127 resistor is grounded.

9. The system according to claim 6, characterized in that, The 12th pin of the SPI communication interface chip is connected to the first end of the first 128 resistor and the first end of the first 129 resistor. The second end of the first 128 resistor is connected to the second power supply terminal, and the second end of the first 129 resistor is grounded.

10. The system according to claim 6, characterized in that, The 13th pin of the SPI communication interface chip is connected to the first end of the first 130 resistor and the first end of the first 131 resistor. The second end of the first 130 resistor is connected to the second power supply terminal, and the second end of the first 131 resistor is grounded.

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