component carrier

Abstract

The present disclosure relates to a component carrier comprising a stack (1) having a plurality of layer structures (100) comprising electrically conductive layer structures (102) and / or a plurality of electrically insulating layer structures (104). The component carrier comprises a plurality of information-carrying structures (110) formed on at least two different layer structures (100) in a vertically offset manner; wherein at least two of the information-carrying structures (110) are laterally offset in a plan view of the stack (1). On the side opposite to at least one layer structure (100) on which at least one information-carrying structure (110) is formed, at least one further layer structure (101) is provided in the stack (1), which further layer structure (101) does not have an information-carrying structure.

Description

Technical Field

[0001] This disclosure relates to component carriers, and more particularly to a component carrier having an information carrier structure formed on a multi-layered structure and vertically misaligned. Background Technology

[0002] Component carriers, such as printed circuit boards (PCBs), substrates, and interposers, play a crucial role in modern electronic devices by providing mechanical support and electrical connections to various components. These carriers typically comprise multilayer structures, including conductive and insulating layers arranged in a stacked configuration. As electronic devices continue to evolve, there is an increasing demand for more complex and compact component carriers that can accommodate higher densities of components and interconnects.

[0003] One aspect of component carrier manufacturing involves the ability to track and identify individual layers and components throughout the production process. This is particularly important for quality control, defect analysis, and product traceability. Various methods have been employed to achieve this, including the use of information carrier structures such as barcodes, quick-response codes, or other identifiers embedded within the component carrier layers.

[0004] One challenge in the field of component carriers is the efficient integration of information carrier structures within a layered structure without compromising the overall design or function of the carrier. The traditional approach of adding identifiers to each layer may not always be suitable for complex multi-layered structures, especially in coreless designs that utilize temporary carrier layers during manufacturing.

[0005] Another challenge is the ability to maintain traceability and information continuity at different stages of the manufacturing process, particularly in scenarios where layers are stacked on either side of a temporary carrier and subsequently removed (and flipped). Ensuring that relevant manufacturing and quality control information is retained for each removed (and flipped) section using traditional identification methods can be problematic.

[0006] Furthermore, the asymmetrical distribution of components and layers in modern component carriers presents challenges in terms of the placement and arrangement of information-carrying structures. This is especially true for designs that integrate different types of layers or structures on opposite sides of the carrier, as maintaining a unified and accessible identification scheme becomes more complex.

[0007] Finally, it is necessary to optimize the use of space within the component carrier. Adding information-carrying structures to multiple layers can potentially impact the available area for circuitry and components. Within the industry, balancing the need for full traceability with the demands for miniaturization and enhanced functionality remains an ongoing challenge.

[0008] It has been recognized that a component carrier is needed to overcome one or more of these problems. Utility Model Content

[0009] In a first aspect, a component carrier is provided. The component carrier includes: a stack comprising a plurality of layered structures, the plurality of layered structures including a plurality of electrically conductive layered structures and / or a plurality of electrically insulating layered structures; a plurality of information-carrying structures formed vertically offset on at least two different layered structures; wherein, in a plan view of the stack, at least two of the information-carrying structures are laterally offset; and wherein, on a side of the stack opposite to at least one layered structure having at least two of the information-carrying structures, at least one additional layered structure is provided in the stack, the at least additional layered structure not having an information-carrying structure.

[0010] This configuration allows for efficient organization and retrieval of information across multiple layers of the component carrier, while maintaining structural integrity and minimizing interference between information-carrying structures.

[0011] In the plan view of the stacked component, the information-carrying structures are misaligned laterally, meaning that at least two information-carrying structures are disposed on / in two different layers constituting the stacked component, and at a planar position from a top view perpendicular to the main surface of the stacked component, the at least two information-carrying structures do not overlap each other at least partially, preferably, the at least two information-carrying structures do not overlap each other completely; in other words, from the top view, the outer contour (partially or completely) of one of the at least two information-carrying structures is outside the outer contour of the other of the at least two information-carrying structures.

[0012] Therefore, this configuration offers several advantages for the manufacturing and operation of the component carrier. The vertical staggering of the information carrier structure between different layers allows for efficient use of space while maintaining clear identification throughout the stack. The lateral staggering of the information carrier structure in a plan view prevents interference between different identification elements and allows for independent reading of each structure without overlap or conflict.

[0013] The vertically staggered configuration also allows for hierarchical information storage, where different layers can hold complementary or cumulative information related to manufacturing processes, quality control parameters, or component specifications. This multi-layered information architecture enhances traceability while preserving design flexibility for complex electronic applications.

[0014] Maintaining at least one additional layer structure without an information carrier structure in this arrangement optimizes the available surface area for component mounting and electrical connections. This selective placement of the information carrier structure allows manufacturers to balance traceability requirements with functional design needs. The opposite positioning of layers with and without information carrier structures facilitates asymmetric design schemes, where the information carrier structure is located on the opposite side of the stack, satisfying different functional requirements on both sides of the component carrier and allowing for traceability of its own specific information.

[0015] The potential applications of this component carrier structure extend to multiple industries. In the field of electronics, this component carrier structure can be used to produce high-density interconnect (HDI) boards, flexible printed circuits, or advanced packaging solutions. The enhanced traceability features make this component carrier structure particularly valuable for industries with stringent quality control requirements, such as aerospace, automotive, or medical device manufacturing.

[0016] At least one additional layer structure comprises the same material as at least one layer structure having at least one of at least two information-bearing structures.

[0017] Using the same material for both layers ensures consistency in electrical and mechanical properties across the entire stack, improving overall performance and reliability and simplifying the manufacturing process.

[0018] The component carrier can be constructed as a coreless structure.

[0019] The coreless structure allows for a reduction in the thickness and weight of the component carrier, making it suitable for compact electronic devices and applications requiring high-density packaging.

[0020] Multiple information-carrying structures can be arranged asymmetrically within the thickness portion of the stacked component.

[0021] The asymmetrical placement of the information-carrying structure enables optimized space utilization and facilitates easier access to specific information layers during manufacturing or inspection.

[0022] The stacked component may include at least one central layer structure, which symmetrically divides at least one upper layer structure and at least one bottom layer structure, wherein multiple information carrying structures are formed in at least one upper layer structure and at least one central layer structure, or multiple information carrying structures are formed on at least one upper layer structure and at least one central layer structure.

[0023] This symmetrical arrangement with a central layer provides balanced mechanical performance and allows for efficient distribution of information-carrying structures among the upper, central, and lower layers.

[0024] At least one bottom layer structure may not have an information-carrying structure.

[0025] Maintaining a bottom-layer structure without an information-carrying structure allows for increased available surfaces for mounting components or interfacing with other devices, and simplifies information management of stacked components.

[0026] At least one upper layer structure and / or at least one bottom layer structure and / or at least one central layer structure may each include multiple layer structures.

[0027] Integrating multi-layer structures within each major section of the stack enhances design flexibility and allows for more complex wiring for electrical connections and information-carrying structures.

[0028] The number of upper layers can be the same as the number of bottom layers.

[0029] Ensuring that the number of upper and lower layers is equal ensures symmetry and balance in the overall structure, which improves mechanical stability and reduces warping issues.

[0030] Multiple information-carrying structures can be disposed within each of multiple upper-layer structures, or multiple information-carrying structures can be disposed on each of multiple upper-layer structures. In an embodiment, the information-carrying structures are formed together with the electrically conductive layer structure via laser imaging. Therefore, the information-carrying structures are disposed within the electrically conductive layer structure and simultaneously disposed on the electrically insulating layer structure.

[0031] Distributing information-carrying structures across multiple upper-level layers allows for increased information density and provides redundancy in the event of local information corruption or defects.

[0032] Each bottom layer structure in the bottom layer structure can have a corresponding upper layer structure. In an embodiment, the bottom layer structure and the corresponding upper layer structure can be formed in the same manufacturing process.

[0033] This one-to-one correspondence between the upper and lower layers facilitates easier tracking and organization of layers during manufacturing and assembly. This feature indicates that the corresponding upper and lower layers are related to each other, especially in terms of information.

[0034] At least one upper layer may not have a corresponding lower layer.

[0035] This configuration allows for additional flexibility in design and can accommodate dedicated functions or (embedded or surface-mounted) components that (in the upper layer) require an asymmetrical layer arrangement and / or may not be associated with other layers, especially in terms of information.

[0036] In a layered structure, an opening may be provided next to the corresponding information-carrying structure at a position corresponding to the position of another information-carrying structure among multiple information-carrying structures.

[0037] These openings enable vertical connections between information-carrying structures on different layers, facilitating the transmission of information or electrical signals within the stacked components.

[0038] The opening can be located at a position corresponding to the position of another information-bearing structure formed in or on an adjacent layer structure.

[0039] Aligning the opening with the adjacent layer structure allows a reader facing the side of the stack (i.e., the main surface) to simultaneously read two information-carrying structures.

[0040] The opening can be placed in the electrically conductive layer structure.

[0041] The openings in the conductive layer allow for reliable reading of the information-carrying structure, unaffected by the intermediate conductive material.

[0042] At least one of the multiple information-carrying structures can be configured to carry information corresponding to at least one other layer structure.

[0043] This feature enables efficient tracking and correlation of information between different layers, regardless of whether the layers are physically adjacent or physically separated in the stack.

[0044] At least one of the multiple information-carrying structures can be configured to carry information corresponding to at least one additional layer structure located at a corresponding opposite stacking position on the other side of the stack. In an embodiment, the at least one additional layer structure located at a corresponding opposite stacking position on the other side of the stack is separated from the at least one layer structure by at least one central layer structure.

[0045] This arrangement facilitates easy mapping and identification of corresponding structures on the opposite side of the stack, reduces the number of information-carrying structures, and / or eliminates the need to read information on the opposite side of the stack. This arrangement is particularly useful in coreless designs.

[0046] At least one of the multiple information carrying structures may be (only) set in at least one upper layer structure, or at least one of the multiple information carrying structures may be (only) set on at least one upper layer structure.

[0047] Placing the information carrier structure on only one side of the stacked component improves and simplifies accessibility for reading or modification during manufacturing or inspection. For example, instead of placing the reader at the bottom of the component carrier, the reader can be placed at the top of the component carrier.

[0048] At least one additional layer structure may be disposed in at least one bottom layer structure, or at least one additional layer structure may be disposed on at least one bottom layer structure.

[0049] Using the bottom layer for another structure that does not have information-carrying elements simplifies the information management of the layers that make up the stack.

[0050] One of the multiple information-carrying structures can carry only the information corresponding to the corresponding layer structure. In an implementation, another information-carrying structure can be located in at least one central layer structure and can carry only the information corresponding to the corresponding central layer structure.

[0051] This localized information storage enables rapid identification and characterization of individual layers without referencing other parts of the stack.

[0052] At least one central layer structure may include one of the multiple information carrying structures that carries information corresponding to the corresponding layer structure.

[0053] Integrating information specific to the central layer improves overall traceability and facilitates easier identification of the central structure of stacked components.

[0054] The information carrier structure of the subsequently produced layer structure may include information contained in the information carrier structure of the previously produced layer structure, as well as information from at least one other layer structure.

[0055] This cumulative information storage method allows the application of the complete history of the manufacturing process within the component carrier itself.

[0056] At least one of the multiple information carrying structures can be constructed as one of the following: two-dimensional (2D) code, quick response (QR) code, barcode, three-dimensional (3D) code, and alphanumeric code.

[0057] The use of a standardized encoding format ensures compatibility with existing scanning and identification systems, facilitating easy integration into manufacturing and quality control processes.

[0058] At least one of the multiple information carrying structures can be constructed as a patterned electrically conductive layer structure of a stack.

[0059] Integrating the information-carrying structure directly into the electrical conductive layer minimizes the need for additional manufacturing processes and improves the overall space utilization within the stack.

[0060] The layer structure that supports the information-carrying structure in the stacked component can be an electrically insulating layer structure.

[0061] Using insulating layers in information-carrying structures helps prevent interference with electrical signals in adjacent conductive layers and improves overall signal integrity within the component carrier.

[0062] In a second aspect, a method for manufacturing a component carrier is provided. The method includes: providing a stack comprising a plurality of layered structures, the plurality of layered structures including a plurality of electrically conductive layered structures and / or a plurality of electrically insulating layered structures; forming a plurality of information carrier structures on at least two different layered structures of the plurality of layered structures in a vertically staggered manner; wherein, in a plan view of the stack, at least two of the plurality of information carrier structures are laterally staggered; and, on a side of the stack opposite to at least one layered structure on which at least two of the at least two information carrier structures are formed, providing at least one additional layered structure in the stack, said at least one additional layered structure not having an information carrier structure.

[0063] This manufacturing method enables the production of component carriers with selectively placed information-carrying structures, thereby achieving efficient information management throughout the entire manufacturing process and the lifecycle of the final product.

[0064] This method may include providing a temporary carrier layer.

[0065] When the initial layer structure cannot provide sufficient stiffness on its own, and the initial layer can be removed in a later stage, the temporary load-bearing layer provides structural support during manufacturing, which is particularly useful for coreless designs.

[0066] The method may include forming multiple layer structures on one side of a temporary carrier, the multiple layer structures including multiple electrically conductive layer structures and / or multiple electrically insulating layer structures, and at least two different layer structures among the multiple layer structures including multiple information carrying structures.

[0067] This step allows for the formation of a coreless structure with integrated information-carrying structure on one side of a temporary support.

[0068] The method may include forming multiple layer structures on the opposite side of a temporary carrier, the multiple layer structures including multiple electrically conductive layer structures and / or multiple electrically insulating layer structures, and at least two different layer structures among the multiple layer structures including multiple information carrying structures.

[0069] The stacked layers on both sides of the temporary support allow for the formation of symmetrical or complementary structures, which is particularly useful for coreless designs.

[0070] The method may include removing multiple layer structures formed on one side of the temporary support layer and removing multiple layer structures formed on the opposite side of the temporary support layer.

[0071] This disassembly step completes the formation of the stacked structure (preferably a coreless structure), resulting in two independent component carriers each with its own corresponding information-carrying structure. In this embodiment, the multiple layered structures formed on the opposite side of the temporary carrier layer are flipped 180 degrees after the disassembly step, so that in subsequent manufacturing processes, the multiple layered structures formed on the opposite side of the temporary carrier layer can be processed in the same way as the multiple layered structures formed on one side of the temporary carrier layer.

[0072] The temporary support layer may include at least one central layer and two opposite detachment layers.

[0073] This multi-layered temporary support design facilitates easier and more controlled removal of the final component support, thereby improving manufacturing output and quality.

[0074] In the context of this application, the term "component carrier" may specifically refer to any support structure capable of accommodating one or more components thereon and / or therein to provide mechanical support and / or electrical connection. In other words, a component carrier can be constructed as a mechanical and / or electronic carrier for components. In particular, a component carrier can be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. A component carrier can also be a hybrid board combining different component carriers of the types described above.

[0075] In the context of this application, the term "stacked structure" may specifically refer to an arrangement of multiple planar layer structures installed in a manner that is stacked in parallel with each other.

[0076] In the context of this application, the term "layer structure" may specifically refer to a continuous layer, a patterned layer, or a plurality of discontinuous islands in a common plane.

[0077] In the context of this application, the term "main surface" of a body may specifically refer to one of the two opposing largest surfaces of the body. The main surfaces may be connected by circumferential sidewalls. The thickness of the body (e.g., a stacked component) may be defined by the distance between the two opposing main surfaces.

[0078] In an embodiment, the component carrier is constructed as one of the following: a printed circuit board, a substrate (particularly an integrated circuit substrate), and an interlayer.

[0079] In the context of this application, the term "printed circuit board" (PCB) can specifically refer to a plate-shaped component carrier formed by laminating several electrically conductive layer structures with several electrically insulating layer structures, for example, by applying pressure and / or by providing heat to laminate several electrically conductive layer structures with several electrically insulating layer structures. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may include resin and / or glass fiber, i.e., so-called prepreg or FR4 material. Various electrically conductive layer structures can be laminated to form through-holes, for example by laser drilling or mechanical drilling, and the various electrically conductive layer structures can be connected to each other in the desired manner by filling the through-holes with an electrically conductive material (especially copper), thereby forming vias or arbitrary through-hole connections. The filled holes can connect the entire stack (the through-hole connection extends through multiple layers or the entire stack), or the filled holes can connect at least two electrically conductive layers; the filled holes are referred to as vias. Similarly, optical interconnect structures can be formed through the various layers of the stack to receive electro-optical circuit boards (EOCBs). In addition to embedding one or more components within a printed circuit board, printed circuit boards are typically constructed to house one or more components on one or two opposite surfaces of a sheet-like printed circuit board. One or more components can be soldered to their respective main surfaces. The dielectric portions of a PCB can be composed of resin and reinforcing fibers such as glass fiber.

[0080] In the context of this application, the term "substrate" can specifically refer to a small component carrier, particularly an IC substrate. In the context of a PCB, an IC substrate can be a relatively small component carrier on which one or more components can be mounted, and can act as a connection medium between one or more chips and another PCB. For example, an IC substrate can have substantially the same size as the components (particularly electronic components) to be mounted thereon (e.g., in the case of chip-scale packages (CSP)). More specifically, an IC substrate can be understood as a carrier for electrical connections or electrical networks, and a component carrier equivalent to a printed circuit board (PCB), but with a considerably higher density of lateral and / or vertically arranged connectors. For example, lateral connectors are conductive channels, while vertical connectors can be, for example, drilled holes. These lateral and / or vertical connectors can be specifically arranged within the IC substrate and can be used to provide electrical, thermal, and / or mechanical connections between accommodating or non-accommodating components (such as bare wafers), particularly IC chips, and printed circuit boards or intermediate printed circuit boards. In the context of this application, "substrate" particularly facilitates electrical connections and / or heat dissipation and / or provides mechanical strength. Therefore, in the context of this application, the term "substrate" is specifically used as a synonym for "IC substrate." It should be noted, in particular, that the term "substrate" should not be confused with the term "substrate" commonly used in the context of wafer fabrication, where "substrate" typically refers to a substrate material used as a base material in wafer fabrication, on which devices or circuits are stacked, and which forms a foundation layer supporting the electronic or photonic structures integrated into the wafer. This is not the meaning of "substrate" in the context of this application.

[0081] The substrate or interlayer may include or be composed of the following as electrically insulating materials: an inorganic layer structure or at least one layer of glass, silicon (Si) or photo-imaging or dry-etching organic material, such as epoxy-based stacked materials (e.g., epoxy-based stacked films) or polymer compounds (which may include photosensitive molecules and / or thermosensitive molecules, or may not include photosensitive molecules and / or thermosensitive molecules), such as polyimide or polybenzoxazole.

[0082] In embodiments, at least one electrical insulating layer structure comprises at least one of the following: resins or polymers, such as epoxy resins, cyanate ester resins, benzocyclobutene resins, bismaleimide triazine resins, polyphenylene derivatives (e.g., polyphenylene ether-based, PPE), polyimide (PI), polyamide (PA), liquid crystal polymers (LCP), polytetrafluoroethylene (PTFE), and / or combinations thereof. Reinforcing structures, such as meshes, fibers, spheres, or other types of filler particles, such as reinforcing structures made of glass (multilayer glass), may also be used to form a composite. The combination of a semi-cured resin and a reinforcing agent is referred to as a prepreg, such as fibers impregnated with the aforementioned resins. These prepregs are typically named according to their properties, such as FR4 or FR5, which describe the flame-retardant properties of the prepreg. While prepregs, particularly FR4, are generally preferred for rigid printed circuit boards, other materials may also be used, particularly epoxy-based stacking materials (e.g., stacked films) or photo-imageable dielectric materials. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and / or cyanate ester resins may be preferred. In addition to these polymers, low-temperature co-fired ceramics (LTCC) or other materials with low, very low, or ultra-low dielectric constants can be used as electrical insulation structures in component carriers.

[0083] In an embodiment, at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, tungsten, and magnesium. Although copper is generally preferred, other materials or coating versions of other materials may also be used, particularly those coated with superconducting or conductive polymeric materials, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT).

[0084] At least one component may be selected from at least one of the following: a non-conductive inlay, a conductive inlay (e.g., a metallic inlay, preferably comprising copper or aluminum), a heat transfer unit (e.g., a heat pipe), a light guiding element (e.g., an optical waveguide or optical conductor connector), an electronic component, or a combination thereof. The inlay may be, for example, a metal block with an insulating material coating (i.e., an insulating metal substrate (IMS) inlay) or without an insulating material coating (i.e., an insulating metal substrate (IMS) inlay), and may be embedded or surface-mounted for heat dissipation purposes. Suitable materials are determined based on the material's thermal conductivity, which should be at least 2 W / mK. Such materials are typically based on metals, metal oxides, and / or ceramics, but are not limited to these, for example, copper, alumina (Al₂O₃), or aluminum nitride (AlN). Other geometries with increased surface area are also often used to improve heat exchange capacity. Furthermore, the components can be active electronic components (implemented to have at least one pn junction), passive electronic components such as resistors, inductors, or capacitors, electronic chips, storage devices (such as dynamic random access memory (DRAM) or other data memories), filters, integrated circuits (such as field-programmable gate arrays (FPGAs), programmable array logic (PALs), general-purpose array logic (GALs), and complex programmable logic devices (CPLDs)), signal processing components, and power management components (such as field-effect transistors (FETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), complementary metal-oxide-semiconductor (CMOS) transistors, junction field-effect transistors (JF-MOSFETs)). Devices such as LEDs (Electronic Transistors) or Insulated Gate Field-Effect Transistors (IGFETs), all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs), and / or any other suitable inorganic compounds, include optoelectronic interface elements, light-emitting diodes (LEDs), optocouplers, voltage converters (e.g., DC / DC or AC / DC converters), encryption components, transmitters and / or receivers, electromechanical transducers, sensors, actuators, microelectromechanical systems (MEMS), microprocessors, capacitors, resistors, inductors, batteries, switches, cameras, antennas, logic chips, and energy harvesting units. However, other components can be embedded within component carriers. For example, magnetic elements can be used as components. These magnetic elements can be permanent magnets (e.g., ferromagnetic, antiferromagnetic, multiferroic, or ferrimagnetic elements, such as ferrite cores) or paramagnetic elements. However, the component can also be an integrated circuit substrate, an interposer, or another component carrier (e.g., in a board-in-board structure). The component can be surface-mounted on the component carrier and / or embedded inside the component carrier.In addition, other components may also be used as components, especially those that generate and emit electromagnetic radiation and / or are sensitive to electromagnetic radiation propagating from the environment.

[0085] In one embodiment, the component carrier is a laminated component carrier. In such embodiments, the component carrier is a composite of multiple layers that are stacked and connected together by applying pressure and / or heat.

[0086] After the internal layer structure of the component carrier is processed, one or more additional electrically insulating and / or electrically conductive layer structures can be symmetrically or asymmetrically (particularly by lamination) on one main surface or two opposite main surfaces of the processed layer structure. In other words, stacking can continue until the desired number of layers is obtained.

[0087] After the stacked components of the electrical insulation layer structure and the electrical conductivity layer structure are formed, the obtained layer structure or component carrier can be surface treated.

[0088] Specifically, in terms of surface treatment, electrically insulating solder resist can be applied to one or two opposite main surfaces of a laminate or component carrier. For example, a solder resist can be formed over the entire main surface, and the solder resist layer can then be patterned to expose one or more electrically conductive surface portions that will be used to electrically bond the component carrier to the electronic periphery. The surface portions of the component carrier still covered by the solder resist, particularly those containing copper, can be effectively protected against oxidation or corrosion.

[0089] Regarding surface treatment, a surface treatment portion can also be selectively applied to the exposed electrically conductive surface portion of the component carrier. Such a surface treatment portion can be an electrically conductive covering material on the exposed electrically conductive layer structure (e.g., pads, conductive tracks, etc., particularly including or composed of copper) on the surface of the component carrier. If this exposed electrically conductive layer structure is not protected, the exposed electrically conductive component carrier material (especially copper) may oxidize, making the component carrier less reliable. The surface treatment portion can then be formed, for example, as an interface between a surface-mount component and the component carrier. The surface treatment portion functions to protect the exposed electrically conductive layer structure (especially copper circuitry) and to enable connection processes with one or more components, for example, by soldering. Examples of suitable materials for the surface treatment portion include organic solderable corrosion inhibitors (OSP), electroless nickel immersion gold (ENIG), electroless nickel immersion palladium immersion gold (ENIPIG), gold (especially hard gold), electroless tin, nickel-gold, nickel-palladium, etc.

[0090] In the context of this application, the term "inorganic layer structure" may specifically refer to a layer structure comprising inorganic materials, such as inorganic compounds. In particular, the dielectric material of the inorganic layer structure, or even the entire inorganic layer structure, may be made entirely or at least substantially entirely of inorganic materials. In another embodiment, the inorganic layer structure may include an inorganic dielectric material and an additional dielectric material. The inorganic compound may be a compound without carbon-hydrogen bonds or a chemical compound without organic compounds. For example, the inorganic layer structure may include glass, such as silicon-based glass, particularly soda-lime glass and / or borosilicate glass and / or aluminosilicate glass and / or lithium silicate glass and / or alkali-free glass. In another example, the inorganic layer structure may include ceramic materials, such as ceramic materials comprising aluminum nitride and / or alumina and / or silicon nitride and / or boron nitride and / or tungsten. In yet another example, the inorganic layer structure may include semiconductor materials, such as silicon and / or germanium and / or silicon oxide and / or germanium oxide and / or silicon carbide and / or gallium nitride. In another embodiment, the inorganic layer structure may include (elemental) metals and / or metal alloys, such as copper and / or tin and / or bronze. In yet another embodiment, the inorganic layer structure may include inorganic materials not listed in the above examples, such as: molybdenum disulfide (MoS2), copper gallium oxide (CuGaO2), silver aluminum oxide (AgAlO2), lithium gallium telluride (LiGaTe2), silver indium selenide (AgInSe2), copper iron sulfide (CuFeS2), and beryllium oxide (BeO).

[0091] It should be noted that the reference numerals in the claims should not be interpreted as limiting the scope of the claims.

[0092] The embodiments of this utility model are not limited to the preferred embodiments shown in the accompanying drawings and described above. Rather, various variations using the illustrated solutions and the principles of this utility model are possible, the scope of which is defined by the appended claims. Attached Figure Description

[0093] Non-limiting and non-exhaustive examples are described with reference to the accompanying drawings.

[0094] Figure 1 A cross-sectional view of a component bearing having a multi-layered structure according to various aspects of this disclosure is shown.

[0095] Figure 2 The manufacturing process according to the embodiment is described. Figure 1 Temporary support components used when the component is a support.

[0096] Similar features are indicated using common reference numerals throughout the accompanying drawings. Detailed Implementation

[0097] Figure 1The component carriers according to various embodiments are shown.

[0098] The component carrier includes a component stack 1. The component stack 1 includes multiple layer structures 100. Each layer structure 100 includes multiple electrically conductive layer structures 102 and electrically insulating layer structures 104. Preferably, the electrically conductive layer structures 102 and electrically insulating layer structures 104 are arranged in an alternating configuration within the component stack 1.

[0099] The component carrier includes multiple information carrier structures 110. These information carrier structures 110 are formed vertically offset on at least two different layer structures 100 of the multiple layer structures. In the plan view of the component stack 1, at least two of the multiple information carrier structures 110 are laterally offset.

[0100] The component carrier includes at least one additional layer structure 101. This additional layer structure 101 is disposed on the side of the component stack 1 opposite to the at least one layer structure 100 on which at least one information carrier structure 110 is formed. The additional layer structure 101 does not have an information carrier structure. Preferably, the additional layer structure 101 comprises the same material as the at least one layer structure 100 on which at least one information carrier structure 110 is formed.

[0101] Preferably, the component stack 1 includes a central layer structure 120. The central layer structure 120 symmetrically divides into at least one upper layer structure 130 and at least one bottom layer structure 140. Preferably, an information carrying structure 110 is formed in at least one upper layer structure 130 and the central layer structure 120, or the information carrying structure 110 is formed on at least one upper layer structure 130 and the central layer structure 120. Preferably, at least one bottom layer structure 140 does not have an information carrying structure 110. Therefore, according to this embodiment, layer structure 100 belongs to the central layer structure 120 and / or the upper layer structure 130, while the other layer structure 101 belongs to the bottom layer structure 140.

[0102] Preferably, at least one upper layer structure 130, at least one bottom layer structure 140, and the central layer structure 120 each include a plurality of layer structures 100, such as... Figure 1 As shown in the figure. Preferably, the number of upper layer structures 130 is the same as the number of bottom layer structures 140. Preferably, a plurality of information carrying structures 110 are disposed in each of the plurality of upper layer structures 130, or a plurality of information carrying structures 110 are disposed on each of the plurality of upper layer structures 130.

[0103] Specifically, each bottom layer structure in the bottom layer structure 140 has a corresponding upper layer structure 130. However, at least one upper layer structure 130 may not have a corresponding bottom layer structure 140.

[0104] An opening 131 may be provided next to a corresponding information-bearing structure 110 in the layer structure 100. Preferably, the opening 131 is positioned corresponding to the position of another information-bearing structure in the information-bearing structure 110. In particular, the opening 131 is provided at a position corresponding to the position of another information-bearing structure in the information-bearing structure 110 formed in or on the adjacent layer structure 100. Preferably, the opening 131 is provided in the electrically conductive layer structure 102.

[0105] In the illustrated embodiment, the information-carrying structure 110 is asymmetrically disposed within the thickness portion of the component stack 1. Preferably, the information-carrying structure 110 in or on the upper layer structure 130 includes information from the bottom layer structure 140, and in particular, information from the bottom layer structure 140 disposed at a position opposite to that of the upper layer structure 130 on which the information-carrying structure 110 is disposed. The correspondence between the information-carrying structure 110 and the information from the bottom layer structure 140 is established through... Figure 1 The arrow markers in the text indicate this.

[0106] Preferably, at least one information carrying structure 110 disposed in or on the structure belonging to the central layer structure 120 carries the information of the corresponding layer structure, and may carry only the information of the corresponding layer structure.

[0107] Figure 2 A temporary support structure used in manufacturing component supports according to various embodiments is shown.

[0108] The temporary support 200 is configured as a base for forming a layered structure on both sides during the manufacturing process of the component support. The temporary support 200 includes at least one central layer and two opposite detachable layers.

[0109] Multiple layer structures 100 may be formed on one side of the temporary support 200. These layer structures 100 include multiple electrically conductive layer structures 102 and / or multiple electrically insulating layer structures 104. At least two different layer structures 100 formed on this side include multiple information carrying structures 110, as shown in... Figure 1 The implementation method is shown in the figure.

[0110] Similarly, multiple layer structures 100 are formed on opposite sides of the temporary support 200. These layer structures 100 also include multiple electrically conductive layer structures 102 and / or multiple electrically insulating layer structures 104. At least two different layer structures 100 formed on opposite sides also include multiple information carrying structures 110, as shown in... Figure 1 The implementation method is shown in the figure.

[0111] The manufacturing process involves removing multiple layered structures 100 formed on one side of the temporary support 200 and removing multiple layered structures 100 formed on the opposite side of the temporary support 200. This removal step allows the formation of two independent component supports, each component support having its own set of layered structures and information carrying structures.

[0112] Using temporary support components 200 in this way enables the efficient production of component support components with layered structures and information-carrying structures on both sides. This method improves manufacturing flexibility and allows for the formation of more complex component support component designs.

[0113] The manufacturing process for the component carrier involves several key steps that enable the formation of a coreless structure with information-carrying capabilities on both sides.

[0114] The temporary support member 200 is used as the base for forming the layered structure. Preferably, the temporary support member 200 allows the layered structure (and the information carrying structure 110) to be formed simultaneously on two opposite sides of the temporary support member 200.

[0115] Features of any of the above examples or embodiments can be combined to produce other examples or embodiments without losing the intended effect. It should be understood that the above descriptions of embodiments or examples are merely exemplary, and various modifications can be made by those skilled in the art. Furthermore, those skilled in the art will recognize that many other modifications and combinations of aspects are feasible. Therefore, the described aspects are intended to encompass all such changes, modifications, and variations that fall within the scope of the appended claims.

Claims

1. A component carrier, characterized in that, The component carrier includes: The stack (1) includes multiple layer structures (100), which include multiple electrically conductive layer structures (102) and / or multiple electrically insulating layer structures (104). Multiple information carrying structures (110) are formed on at least two different layer structures among the multiple layer structures (100) in a vertically staggered manner; Viewed from the plan view of the stacked component (1), at least two of the plurality of information-bearing structures (110) are misaligned laterally; and Wherein, on the side of the stack opposite to at least one layer structure (100) on which at least one of the at least two information carrying structures (110) is formed, at least one additional layer structure (101) is provided in the stack, the at least one additional layer structure not having an information carrying structure.

2. The component carrier according to claim 1, characterized in that, The at least one additional layer structure (101) comprises the same material as the at least one layer structure (100) on which at least one of the at least two information carrying structures (110) is formed.

3. The component carrier according to claim 1 or 2, characterized in that, The component carrier is constructed as a coreless structure.

4. The component carrier according to any one of claims 1 to 3, characterized in that, The plurality of information carrying structures (110) are arranged asymmetrically within the thickness portion of the stacked member.

5. The component carrier according to any one of claims 1 to 4, characterized in that, The stack includes at least one central layer structure (120), which symmetrically divides into at least one upper layer structure (130) and at least one bottom layer structure (140), wherein the plurality of information carrying structures (110) are formed in the at least one upper layer structure (130) and the at least one central layer structure (120), or the plurality of information carrying structures (110) are formed on the at least one upper layer structure (130) and the at least one central layer structure (120).

6. The component carrier according to claim 5, characterized in that, The at least one bottom layer structure (140) does not have an information carrying structure (110).

7. The component carrier according to claim 5 or 6, characterized in that, The at least one upper layer structure (130) and / or the at least one bottom layer structure (140) and / or the at least one central layer structure (120) comprises multiple layer structures.

8. The component carrier according to claim 7, characterized in that, The number of the upper layer structure (130) is the same as the number of the bottom layer structure (140).

9. The component carrier according to claim 7 or 8, characterized in that, Each of the plurality of upper layer structures (130) is provided with a plurality of information carrying structures (110), or each of the plurality of upper layer structures (130) is provided with a plurality of information carrying structures (110).

10. The component carrier according to any one of claims 5 to 9, characterized in that, Each of the bottom layer structures (140) has a corresponding upper layer structure (130).

11. The component carrier according to claim 10, characterized in that, At least one upper layer structure (130) does not have a corresponding bottom layer structure (140).

12. The component carrier according to any one of claims 1 to 11, characterized in that, In the layer structure (100), an opening is provided next to the corresponding information carrying structure (110) at a position corresponding to the position of another information carrying structure (110) among the plurality of information carrying structures (110).

13. The component carrier according to claim 12, characterized in that, The opening (131) is located at a position corresponding to the position of another information carrier structure formed in or on an adjacent layer structure in the plurality of information carrier structures (110).

14. The component carrier according to claim 12 or 13, characterized in that, The opening (131) is disposed in the electrically conductive layer structure (102).

15. The component carrier according to any one of claims 1 to 14, characterized in that, At least one of the plurality of information carrying structures (110) is configured to carry information corresponding to the at least one additional layer structure (101).

16. The component carrier according to claim 15, characterized in that, At least one of the plurality of information carrying structures (110) is configured to carry information corresponding to at least one additional layer structure (101) located at the opposite stacking position on the other side of the stack (1).

17. The component carrier according to any one of claims 1 to 16, characterized in that, At least one of the plurality of information carrying structures (110) is disposed in the at least one upper layer structure (130), or at least one of the plurality of information carrying structures (110) is disposed on the at least one upper layer structure (130).

18. The component carrier according to claim 5, characterized in that, The at least one additional layer structure (101) is disposed in the at least one bottom layer structure (140), or the at least one additional layer structure (101) is disposed on the at least one bottom layer structure (140).

19. The component carrier according to any one of claims 15 to 18, characterized in that, One of the multiple information carrying structures (110) carries only the information corresponding to the corresponding layer structure.

20. The component carrier according to any one of claims 15 to 19, characterized in that, The at least one central layer structure (120) includes one of the plurality of information carrying structures (110) that carries information corresponding to the corresponding layer structure.

21. The component carrier according to any one of claims 1 to 20, characterized in that, The information carrying structure (110) of the subsequently produced layer structure (100) includes information contained in the information carrying structure of the previously produced layer structure (100) and information of at least one other layer structure (101).

22. The component carrier according to any one of claims 1 to 21, characterized in that, At least one of the plurality of information carrying structures (110) is constructed as one of the following: a QR code, a barcode, a 3D code, and an alphanumeric code.

23. The component carrier according to any one of claims 1 to 21, characterized in that, At least one of the plurality of information carrier structures (110) is constructed as a fast response code.

24. The component carrier according to any one of claims 1 to 23, characterized in that, At least one of the plurality of information carrying structures (110) is configured as a patterned electrically conductive layer structure (102) of the stack (1).

25. The component carrier according to any one of claims 1 to 24, characterized in that, The layer structure (100) that carries the information carrying structure (110) of the stacked component is an electrically insulating layer structure (104).

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