Back contact cells, cell assemblies and photovoltaic systems

Abstract

The utility model discloses a kind of back contact battery, battery assembly and photovoltaic system, the back contact battery includes silicon wafer and the grid line structure of being arranged in the back light surface of silicon wafer;The grid line structure includes first grid line and second grid line, the first grid line and second grid line are alternately arranged along first direction and the polarity of the first grid line and second grid line is opposite;First region and second region are equipped on the silicon wafer;In the first region, along first direction, the pitch of the first grid line and second grid line is L1, in the second region, along first direction, the pitch of the first grid line and second grid line is L2, L1 and L2 satisfy: 1 The back contact battery provided by the utility model improves current collection capacity by adjusting the grid line pitch of different regions.

Description

Technical Field

[0001] This utility model relates to the field of solar cell technology, and in particular to a back contact battery, battery module and photovoltaic system. Background Technology

[0002] Back-contact batteries place both positive and negative electrode grid lines on the back side, reducing the shading of the cell by the grid line structure, increasing the short-circuit current, and improving the energy conversion efficiency. In back-contact batteries, photogenerated carriers need to be transported laterally and longitudinally to the corresponding electrodes on the back side. Currently, the grid lines on back-contact batteries are usually evenly spaced. However, the paths for carriers generated in different areas of the battery to reach the back electrode are different. If the grid line spacing is too large in areas with longer transport paths, it will result in insufficient current collection capacity, leading to increased series resistance and exacerbated local recombination in that area, affecting the fill factor and conversion efficiency of the battery. If the grid line spacing is too small in areas with shorter transport paths, it will result in waste of grid line printing material. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a back contact battery, battery module and photovoltaic system, which improves the current collection capability by adjusting the grid spacing in different areas.

[0004] To solve the above-mentioned technical problems, this utility model provides a back contact battery, including a silicon wafer and a grid line structure disposed on the back surface of the silicon wafer; the grid line structure includes a first grid line and a second grid line, the first grid line and the second grid line are alternately arranged along a first direction and the polarities of the first grid line and the second grid line are opposite. The silicon wafer has a first region and a second region; in the first region, the distance between the first gate line and the second gate line along the first direction is L1, and in the second region, the distance between the first gate line and the second gate line along the first direction is L2, where L1 and L2 satisfy: 1 ​​< L1 : L2 ≤ 2.

[0005] As an improvement to the above scheme, L1 and L2 satisfy: L1:L2=1.2~1.8.

[0006] As an improvement to the above scheme, the area of ​​the first region is S1, and the area of ​​the second region is S2, where S1 and S2 satisfy: S1≥S2.

[0007] As an improvement to the above scheme, S1 and S2 satisfy: S1:S2=1.5~4.

[0008] As an improvement to the above solution, along the first direction, the first region is positioned close to the edge of the silicon wafer, and the second region is positioned far from the edge of the silicon wafer relative to the first region.

[0009] As an improvement to the above scheme, along the first direction, the second region is located between two adjacent first regions.

[0010] As an improvement to the above solution, in the first region, along the first direction, the spacing between the first gate line and the second gate line increases from the center of the silicon wafer towards the edge; and / or In the second region, along the first direction, the spacing between the first gate line and the second gate line increases from the center of the silicon wafer toward the edge.

[0011] As an improvement to the above scheme, in the first region, along the first direction, the increment of the spacing between the first gate line and the second gate line is δ1, and in the second region, along the first direction, the increment of the spacing between the first gate line and the second gate line is δ2, wherein δ1 and δ2 satisfy: δ1≥δ2.

[0012] As an improvement to the above scheme, δ1 and δ2 satisfy: δ1:δ2=1.2~1.5.

[0013] As an improvement to the above solution, in the first region, along the first direction, the spacing between the first gate line and the second gate line is equal; and / or In the second region, along the first direction, the spacing between the first gate line and the second gate line is equal.

[0014] As an improvement to the above scheme, in the first region, the width of the first gate line is D1, and in the second region, the width of the first gate line is D2, where D1 and D2 satisfy: D1 ≥ D2; and / or In the first region, the width of the second gate line is D3, and in the second region, the width of the second gate line is D4, where D3 and D4 satisfy: D3≥D4.

[0015] As an improvement to the above scheme, D1 and D2 satisfy: D1:D2 = 1.5~3; and / or D3 and D4 satisfy: D3:D4=1.5~3.

[0016] Accordingly, this utility model also provides a battery assembly, including the aforementioned back contact battery.

[0017] Accordingly, this utility model also provides a photovoltaic system, including the aforementioned battery module.

[0018] The present invention has the following beneficial effects: The back contact battery provided by this utility model sets different grid line spacings for different regions on the silicon wafer, thereby matching the carrier transport conditions in different regions of the silicon wafer. For the first region with a shorter carrier transport path, the grid line spacing is increased accordingly, and for the second region with a longer carrier transport path, the grid line spacing is decreased accordingly. By controlling the grid line spacing of the first and second regions within a preset range, the power loss and voltage drop on the entire silicon wafer surface are made as uniform as possible, thereby improving the overall current collection capability of the back contact battery. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the structure of a back contact battery provided in an embodiment of the present invention; Figure 2 This is a partial structural schematic diagram of a back contact battery provided in an embodiment of the present invention; Figure 3 This is a partial structural schematic diagram of a back contact battery provided in another embodiment of the present invention; Figure 4 This is a partial structural schematic diagram of a back contact battery provided in another embodiment of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0021] In this invention, the reference to "embodiment" or "implementation" means that a specific feature, component, or characteristic described in connection with an embodiment or implementation may be included in at least one embodiment of this invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0022] In the description of this utility model, it should be understood that the terms "length," "width," "upper," "lower," "left," "right," "horizontal," "top," and "bottom," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0023] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0024] like Figure 1 and Figure 2 As shown, this utility model embodiment provides a back contact battery, including a silicon wafer 1 and a grid line structure 2 disposed on the back surface of the silicon wafer 1; the grid line structure 2 includes a first grid line 21 and a second grid line 22, the first grid line 21 and the second grid line 22 are alternately arranged along a first direction and the polarities of the first grid line 21 and the second grid line 22 are opposite. The silicon wafer 1 has a first region 110 and a second region 120. In the first region 110, the spacing between the first gate line 21 and the second gate line 22 along a first direction is L1. In the second region 120, the spacing between the first gate line 21 and the second gate line 22 along the first direction is L2. L1 and L2 satisfy: 1 ​​< L1:L2 ≤ 2. If the spacing ratio is too large, the gate lines in the first region 110 are too sparse. Due to recombination loss during carrier transport, the first region 110 cannot effectively collect current, and the local series resistance of this region increases significantly. In a preferred embodiment, L1 and L2 satisfy: L1:L2 = 1.2~1.8, exemplarily 1.3, 1.4, 1.5, 1.6 or 1.7, but not limited to these.

[0025] The back-contact battery provided by this utility model sets different grid line spacings for the first region 110 and the second region 120 on the battery cell, thereby matching the carrier transport conditions in different regions of the battery cell. The carrier transport path in the first region 110 is shorter, so the grid line spacing is increased accordingly, while the carrier transport path in the second region 120 is longer, so the grid line spacing is decreased accordingly. By controlling the grid line spacing of the first region 110 and the second region 120 within a preset range, the power loss and voltage drop on the entire surface of the battery cell are made as uniform as possible, thereby improving the overall current collection capability of the back-contact battery.

[0026] In embodiments of this invention, the back contact battery can be a back contact battery with a main grid or a back contact battery without a main grid. Preferably, the back contact battery cell is a back contact battery without a main grid. The first direction can be parallel to the edge of the silicon wafer 1. Specifically, the first direction can be the width direction of the back contact battery. It is understood that the polarities of the first grid line 21 and the second grid line 22 are opposite. When the first grid line 21 is an N-type grid line, the second grid line 22 is a P-type grid line; when the first grid line 21 is a P-type grid line, the second grid line 22 is an N-type grid line.

[0027] In one embodiment, the area of ​​the first region 110 is S1, and the area of ​​the second region 120 is S2, where S1 and S2 satisfy: S1 ≥ S2. That is, the area of ​​the first region 110, with a larger gate line spacing, is relatively larger than the area of ​​the second region 120, with a smaller gate line spacing. If the area of ​​the second region 120 is too large, the gate line metal printing cost will increase significantly; if the area of ​​the second region 120 is too small, it will be difficult to effectively improve the current collection capability, and carrier losses will surge. In a preferred embodiment, S1 and S2 satisfy: S1:S2 = 1.5~4, exemplarily 1.8, 2, 2.5, 3, or 3.5, but not limited thereto.

[0028] In one embodiment, along a first direction, the first region 110 is positioned close to the edge of the back contact battery cell, and the second region 120 is positioned away from the edge of the back contact battery cell relative to the first region 110.

[0029] In a preferred embodiment, along the first direction, the second region 120 is located between two adjacent first regions 110. That is, the back contact battery has two first regions 110, located at the beginning and end of the back contact battery along the first direction, and the second region 120 is located between the two first regions 110. Specifically, the spacing between the first grid lines 21 and the second grid lines 22 of the two first regions 110 can be the same or different.

[0030] In one implementation, such as Figure 3As shown, in the first region 110, along the first direction, the spacing between the first gate line 21 and the second gate line 22 increases from the center of the silicon wafer 1 towards the edge; and / or, in the second region 120, along the first direction, the spacing between the first gate line 21 and the second gate line 22 increases from the center of the silicon wafer 1 towards the edge. That is, the gate line spacing can be gradually set in either the first region 110 or the second region 120, or both the first region 110 and the second region 120 can have gradually set gate line spacing. This gradual setting can further match the current density of different regions and further improve the current collection capability.

[0031] Specifically, when the gate line spacing of both the first region 110 and the second region 120 is gradually increased, in the first region 110, the increment of the spacing between the first gate line 21 and the second gate line 22 is δ1, and in the second region 120, the increment of the spacing between the first gate line 21 and the second gate line 22 is δ2, where δ1 and δ2 satisfy: δ1 ≥ δ2. Since the gate line spacing of the first region 110 is relatively large, the increment of the spacing can be increased accordingly to ensure uniform and controllable carrier transmission loss. Preferably, δ1 and δ2 satisfy: δ1:δ2 = 1.2~1.5, exemplarily 1.25, 1.3, 1.35, 1.4, or 1.45, but not limited to these.

[0032] In a preferred embodiment, such as Figure 2 As shown, in the first region 110, the spacing between the first grid line 21 and the second grid line 22 is equal along the first direction; in the second region 120, the spacing between the first grid line 21 and the second grid line 22 is equal along the first direction. That is, by setting the first grid line 21 and the second grid line 22 at equal intervals in the first region 110 and the second region 120 respectively, the design difficulty of the printing screen can be reduced, and the grid line printing speed can be improved.

[0033] It is understood that the widths of the first gate line 21 and the second gate line 22 in the first region 110 and the second region 120 may be the same or different. In one embodiment, such as Figure 4As shown, in the first region 110, the width of the first gate line 21 is D1, and in the second region 120, the width of the first gate line 21 is D2, where D1 and D2 satisfy: D1≥D2; and / or, in the first region 110, the width of the second gate line 22 is D3, and in the second region 120, the width of the second gate line 22 is D4, where D3 and D4 satisfy: D3≥D4. The gate line spacing in the first region 110 is larger, which correspondingly increases the gate line width and ensures the current collection capability of the gate line. The gate line spacing in the second region 120 is smaller, which correspondingly reduces the gate line width, saving gate line printing paste while avoiding contact between the first gate line 21 and the second gate line 22 of different polarities. In a preferred embodiment, D1 and D2 satisfy: D1:D2=1.5~3, for example 1.6, 1.8, 2, 2.4 or 2.6, but not limited thereto; and / or, D3 and D4 satisfy: D3:D4=1.5~3, for example 1.6, 1.8, 2, 2.4 or 2.6, but not limited thereto.

[0034] Accordingly, this utility model embodiment also provides a battery assembly, including the aforementioned back contact battery. The back contact battery can be formed into a battery string layer through solder ribbons, insulating layers, and busbars. The battery assembly may include the battery string layer, a frame, a cover plate, and an adhesive film. The adhesive film can be filled between the battery string layer and the back plate and / or the cover plate. As a filler, the adhesive film can be a transparent colloid with good light transmittance and aging resistance. For example, the adhesive film can be an EVA film or a POE film, and the specific choice can be made according to the actual situation, without limitation.

[0035] A cover plate can be placed over the front of the battery string layer. The cover plate can be made of ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%, protecting the back contact batteries while minimizing impact on their efficiency. Simultaneously, an adhesive film bonds the cover plate and the battery string layer together, providing sealing, insulation, and waterproofing / moisture protection for the battery string layer.

[0036] The backplate can be attached to the back of the battery string layer. The backplate can protect and support the battery string layer, and has reliable insulation, water resistance and aging resistance. There are multiple options for the backplate, which can usually be tempered glass, plexiglass, aluminum alloy TPT composite film, etc. The specific choice can be set according to the specific situation, and there are no restrictions here.

[0037] The backsheet, battery string layer, encapsulant film, and cover plate can be set on the frame. The frame serves as the main external support structure for the entire battery assembly and can provide stable support and installation for the battery assembly.

[0038] Accordingly, this utility model embodiment also provides a photovoltaic system, including the aforementioned battery modules. In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants, and can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, solar buildings, etc. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is to say, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple battery modules; for example, multiple battery modules may form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to realize solar power supply.

[0039] The above description is the preferred embodiment of this utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications are also considered to be within the protection scope of this utility model.

Claims

1. A back-contact battery, characterized in that, The device includes a silicon wafer and a gate line structure disposed on the back surface of the silicon wafer; the gate line structure includes a first gate line and a second gate line, the first gate line and the second gate line are alternately arranged along a first direction and the polarities of the first gate line and the second gate line are opposite; The silicon wafer has a first region and a second region; in the first region, the distance between the first gate line and the second gate line along the first direction is L1, and in the second region, the distance between the first gate line and the second gate line along the first direction is L2, where L1 and L2 satisfy: 1 ​​< L1 : L2 ≤ 2.

2. The back contact battery as described in claim 1, characterized in that, L1 and L2 satisfy the following condition: L1:L2 = 1.2~1.

8.

3. The back contact battery as described in claim 1, characterized in that, The area of ​​the first region is S1, and the area of ​​the second region is S2. S1 and S2 satisfy: S1≥S2.

4. The back contact battery as described in claim 3, characterized in that, S1 and S2 satisfy: S1:S2=1.5~4.

5. The back contact battery as described in claim 1, characterized in that, Along a first direction, the first region is positioned close to the edge of the silicon wafer, and the second region is positioned relatively far from the edge of the silicon wafer relative to the first region.

6. The back contact battery as described in claim 5, characterized in that, Along the first direction, the second region is located between two adjacent first regions.

7. The back contact battery as described in claim 1, characterized in that, In the first region, along a first direction, the spacing between the first gate line and the second gate line increases from the center of the silicon wafer toward the edge; and / or In the second region, along the first direction, the spacing between the first gate line and the second gate line increases from the center of the silicon wafer toward the edge.

8. The back contact battery as described in claim 7, characterized in that, In the first region, the increment of the spacing between the first gate line and the second gate line is δ1, and in the second region, the increment of the spacing between the first gate line and the second gate line is δ2. δ1 and δ2 satisfy: δ1≥δ2.

9. The back contact battery as described in claim 8, characterized in that, δ1 and δ2 satisfy: δ1:δ2=1.2~1.

5.

10. The back contact battery as described in claim 1, characterized in that, In the first region, along the first direction, the spacing between the first gate line and the second gate line is equal; and / or In the second region, along the first direction, the spacing between the first gate line and the second gate line is equal.

11. The back contact battery as claimed in claim 1, characterized in that, In the first region, the width of the first gate line is D1, and in the second region, the width of the first gate line is D2, where D1 and D2 satisfy: D1 ≥ D2; and / or In the first region, the width of the second gate line is D3, and in the second region, the width of the second gate line is D4, where D3 and D4 satisfy: D3≥D4.

12. The back contact battery as described in claim 11, characterized in that, D1 and D2 satisfy: D1:D2 = 1.5~3; and / or D3 and D4 satisfy: D3:D4=1.5~3.

13. A battery assembly, characterized in that, Includes the back contact battery as described in any one of claims 1 to 12.

14. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 13.

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