A positive face heat dissipation kelvin package structure with inner insulation

Abstract

The utility model belongs to but is not limited to semiconductor technical field, especially a kind of inner insulation front face heat dissipation kelvin packaging structure, comprising: semiconductor chip, layered copper frame, insulating ceramic lining, tin paste welding layer, aluminium bonding wire and epoxy resin plastic package body;Layered copper frame is divided into upper and lower two layers independent conductive area, middle embedded high heat conduction ceramic lining realizes electrical isolation and mechanical support;Semiconductor chip is fixed in upper layer framework by tin paste welding;Lower layer framework back metal layer is exposed to package body outside after plastic package, as heat dissipation base plate;Layered copper frame pipe leg adopts up-down symmetric double-way layout, lock material hole structure is arranged in pipe leg inside, and differential spacing layout is used.The utility model breaks through the limitation of traditional bottom heat dissipation while retaining the low-cost advantage of traditional packaging, realizes potential isolation, supports high-voltage flexible design, and eliminates control signal interference, to improve overall reliability.

Description

Technical Field

[0001] This invention belongs to, but is not limited to, the field of semiconductor technology, and particularly relates to an internally insulated front-side heat dissipation Kelvin package structure. Background Technology

[0002] Surface mount packaging (SMT) for power devices is a widely used surface mount technology in modern electronics manufacturing. Its core lies in achieving miniaturization and high density of electronic components through highly integrated packaging, adapting to the needs of automated production. In the manufacturing process, SMT packaging for power devices first relies on wafer dicing: after back-side grinding and thinning, individual dies are separated according to predetermined dicing lines using precision dicing technology, forming small-sized chips. These chips are then mounted onto the central area of ​​a packaging substrate made of a copper alloy with high electrical and thermal conductivity using thermally conductive bonding materials (such as solder or sintered silver). The substrate not only provides physical protection but also undertakes the core heat dissipation function. The substrate is typically rectangular, with three protruding leads on the edge, corresponding to power, ground, and control leads, respectively. Solder joints within the leads are used for subsequent bonding connections. Metal wires (such as aluminum or copper wires) are used to wire bond the chip's pads to the leads on the substrate, achieving electrical connection and forming a complete internal circuit structure. Next, the entire package structure is encased in an insulating plastic shell for physical protection, with the bottom package substrate exposed outside the molded body, serving as a heat sink. After packaging, to facilitate subsequent soldering, these leads are processed into a wing shape using a lead-cutting process, and finally fixed and soldered to the PCB board using a reflow soldering process.

[0003] Semiconductor packaging is a crucial step in integrated circuit manufacturing. It not only provides protection and support for the chip but also ensures a reliable connection between the chip and external circuits, forming the foundation for the normal operation of semiconductor devices. Currently, most semiconductor power devices are packaged using traditional bottom-heat dissipation methods, where chip heat is primarily transferred to the circuit board via bottom metal pads. However, this heat dissipation method has significant limitations. First, its heat dissipation performance is limited by the thermal resistance between the chip and the heat dissipation pads, resulting in poor effectiveness and an upper limit to heat dissipation capacity. Second, due to the lack of an insulating layer, the pads and the internal circuitry of the chip are connected, requiring a specific voltage, which severely restricts circuit board wiring. Furthermore, traditional packaging lacks an independent drive circuit, causing small-signal and high-current power signals controlling the chip's switching to share the same pin. The control signal is subject to interference from high current, thus affecting switching speed, increasing power consumption, and exacerbating chip heating.

[0004] Based on the above analysis, the urgent technical problems that need to be solved in the existing technology are as follows: Although traditional surface mount packaging technology has significant advantages in terms of size and performance, it still has the following objective limitations in practical applications:

[0005] 1. Limited heat dissipation performance:

[0006] Traditional surface mount packaging uses exposed bottom pads as the primary heat dissipation path. The back of the chip directly contacts the metal heat sink, limiting the heat dissipation path to the back of the chip → bottom of the lead frame → PCB pads. Although the bottom heat dissipation path is direct, it is relatively long, and its heat dissipation performance is limited by the thermal resistance of the material between the chip and the heat sink, making it difficult to meet the heat dissipation requirements of high-power devices. Furthermore, the difference in thermal expansion coefficients between the chip, solder, and PCB can easily induce interfacial stress under temperature cycling, leading to a risk of fatigue cracking at the solder joints.

[0007] 2. Poor electrical isolation:

[0008] Traditional surface mount packaging, lacking an insulating layer, presents two major problems: First, the back of the bare chip is connected to the thermal pad, directly connecting the heatsink to the internal circuitry of the chip, causing the heatsink to become charged. This means the thermal pad area on the PCB must be designed to have the same potential as the chip's thermal pad. Not only can high-voltage lines not be arranged from below, but low-voltage lines also need to maintain a sufficient safety distance from this area, severely limiting wiring flexibility and making surface leakage short circuits prone to occur in humid or dirty environments. Second, heat dissipation relies mainly on the PCB, but the PCB has poor thermal conductivity, and the chip easily overheats, resulting in a clear upper limit to its heat dissipation capacity.

[0009] 3. Control signal interference:

[0010] Traditional packaging causes a common-source inductance effect because the drive circuit and power circuit share the same source pin. When the switching transistor is turned off at high frequency, the parasitic inductance of the shared line will generate a reverse voltage due to the sudden change in power current. This voltage is superimposed on the gate voltage, causing violent oscillations. This not only significantly increases switching losses, but also generates serious dV / dt and di / dt noise. It can even cause the switching transistor to delay operation or conduct incorrectly, thus damaging the normal function of the device. Utility Model Content

[0011] To address the problems existing in the prior art, this utility model provides an internally insulated, front-side heat dissipation Kelvin package structure.

[0012] This invention is implemented as follows: an internally insulated, front-side heat-dissipating Kelvin package structure includes: a semiconductor chip, a layered copper frame, an insulating ceramic backing, a solder paste layer, aluminum bonding wires, and an epoxy resin encapsulator. The layered copper frame is divided into upper and lower independent conductive areas, with a high thermal conductivity ceramic backing embedded in the middle to achieve electrical isolation and mechanical support. The semiconductor chip is fixed to the upper frame by solder paste. The metal layer on the back of the lower frame is exposed on the outside of the package after encapsulation, serving as a heat dissipation substrate. The legs of the layered copper frame adopt a symmetrical dual-path layout, and a locking hole structure is provided on the inner side of the legs to enhance the bonding strength of the encapsulator. Differentiated spacing layout avoids incorrect polarity connection of the package.

[0013] Furthermore, the interconnection between the semiconductor chip and the ceramic substrate and copper frame is all achieved through screen-printed solder paste soldering.

[0014] Furthermore, after the molding process, the tube legs are vertically exposed on the upper and lower sides of the package, and the ribs are cut and bent upwards at 90° to form metal heat dissipation fins, which are used as independent heat dissipation surfaces;

[0015] Furthermore, the metal flaps on the upper and lower sides of the molded body are tin-plated.

[0016] Furthermore, the two pins at the bottom of the molded package serve as the main power path: the collector and the emitter, respectively. The collector is formed by directly soldering the metal layer on the back of the chip to the upper lead frame and extending through the pins of the frame. The metal layer on the front of the chip is connected to another corresponding pin through bonding wires.

[0017] Furthermore, the two pins on the top of the molded package form a drive control loop: the base and the Kelvin detection terminal, respectively. The base metal layer on the front of the chip is connected to the corresponding pin by a bonding wire, while the Kelvin detection terminal is directly led out from the emitter metal layer of the chip through an independent bonding wire and connected to a dedicated pin.

[0018] This invention retains the heat dissipation advantages of the large central metal pad at the bottom, while adding a highly efficient frontal heat dissipation path by changing the original single-sided downward-facing wing-shaped pins to a double-sided symmetrical reverse-folding design. This design means that the pins are no longer simply horizontally soldered to the PCB surface, but are bent upwards at 90 degrees, becoming independent heat dissipation surfaces. With the heat sink positioned directly above the chip, the intermediate thermal resistance layer is reduced, allowing heat to be directly conducted from the chip to the package shell and then directly transferred to the heat sink via the thermal interface material. This results in a shorter heat dissipation path and lower thermal resistance, significantly improving heat dissipation efficiency. Furthermore, the double-sided soldered pin structure is more stable, effectively preventing displacement during assembly.

[0019] Inside the package structure, an inner insulating layer is added to isolate the chip from the heatsink, allowing the heatsink to be independently grounded or floating. This avoids the problem of high-voltage traces or high-density signal wiring being impossible to implement in the bottom area of ​​the PCB due to potential limitations. This design not only improves heat dissipation but also reduces chip temperature, enhances its durability, adapts to more compact space layout requirements, saves on the process of installing insulating sheets, improves production efficiency, and saves on material costs.

[0020] In terms of pin layout, this invention introduces an independent drive circuit pin (i.e., Kelvin pin), which completely eliminates signal interference by physically isolating the drive path and power path, thereby improving the gate voltage control accuracy and reducing switching losses.

[0021] This invention retains the low-cost advantages of traditional packaging while overcoming the limitations of traditional bottom heat dissipation, achieving potential isolation, supporting flexible high-voltage designs, and eliminating control signal interference, thereby improving overall reliability. This design is particularly suitable for applications in harsh environments such as vibration and temperature cycling.

[0022] (1) The expected benefits and commercial value of the technical solution of this utility model after transformation are as follows:

[0023] It can improve the heat dissipation efficiency of power devices, reduce switching losses, and is suitable for high power density scenarios such as new energy vehicle electric control and industrial inverters. At the same time, it eliminates the cost of external insulating pads and assembly processes, reduces PCB wiring design costs, and fills the market gap for low-cost packaging of small and medium-sized high-power devices.

[0024] (2) The technical solution of this utility model fills a technical gap in the industry both domestically and internationally:

[0025] Existing packaging technologies, both domestically and internationally, primarily address heat dissipation (e.g., double-layer DBC substrate), electrical isolation (e.g., external insulating sheet), or signal interference (e.g., independent pins) issues separately. This solution, for the first time, integrates 'inner insulating layer + double-sided heat dissipation + Kelvin pins', breaking through the technical bottleneck of 'heat dissipation - isolation - anti-interference' synergistic optimization, and achieving multi-dimensional performance improvement of a single packaging structure.

[0026] (3) The technical solution of this utility model solves a technical problem that people have long wanted to solve but have never been able to solve successfully:

[0027] Traditional solutions require additional insulating pads outside the package, which increases cost and assembly complexity and affects heat dissipation efficiency. This solution, by incorporating a ceramic insulating layer, optimizes both insulation and heat dissipation without increasing cost, thus solving this long-standing problem.

[0028] (4) The technical solution of this utility model overcomes technical bias:

[0029] It is widely believed in the industry that "double-sided folded pins increase soldering difficulty and reduce production efficiency." This solution, through "differentiated spacing layout + 90° precise bending process," not only achieves front-side heat dissipation but also improves soldering stability and compatibility with automated production, thus breaking this prejudice. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the external appearance provided in an embodiment of the present utility model;

[0031] Figure 2 This is a perspective view of the external shape provided in an embodiment of the present utility model;

[0032] Figure 3An exploded structural diagram provided in this embodiment of the utility model;

[0033] Figure 4 This is a front view diagram provided in an embodiment of the present utility model;

[0034] Figure 5 This is a schematic diagram of the back side provided in an embodiment of the present invention;

[0035] Figure 6 This is a side view diagram provided in an embodiment of the present utility model;

[0036] In the diagram: 1. Semiconductor chip; 2. Upper copper frame; 3. Lower copper frame; 4. Insulating ceramic backing; 5. Solder paste layer; 6. Aluminum bonding wire; 7. Epoxy resin encapsulation; 111. First pin on the left; 112. First pin on the right; 113. Second pin on the left; 114. Second pin on the right. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this utility model clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this utility model.

[0038] This invention provides an internally insulated, front-side heat-dissipating Kelvin package structure to address the problem of insufficient heat dissipation capacity in traditional semiconductor chip packages. This invention optimizes the structure of traditional surface-mount packages for power devices, focusing on improvements to pin layout, heat dissipation design, and circuit connection design to enhance the device's mechanical reliability, thermal stability, and electrical performance.

[0039] In terms of pin layout, the bottom pins are symmetrically reconstructed by folding them back, changing the traditional single-sided downward-folding wing-shaped pins to a double-sided symmetrical upward-folding (90° upward folding) wing-shaped design. The double-sided soldered pins form two stable support points, effectively preventing pin displacement or cold solder joints caused by stress during SMT mounting, reflow soldering, and transportation. This not only improves soldering stability but also significantly reduces contact resistance and thermal resistance issues caused by poor soldering. At the same time, the upward-folding pins create an independent heat dissipation surface on the top of the package, allowing direct contact with air or an external heat sink. By reversing the bending of the pins on both sides, a front-side heat dissipation structure can be formed on the circuit board, with the pins directly exposed on the top of the package as an independent heat dissipation surface. While retaining the heat dissipation advantages of the large-area metal pad at the bottom center, this adds a highly efficient front-side heat dissipation path, significantly reducing thermal resistance and increasing power density.

[0040] Regarding the internal structure of the package, two design features have been added: First, the insulation design utilizes a ceramic sheet with both high dielectric strength and volume resistivity as the insulating material. This sheet is precisely placed and firmly bonded to the upper and lower copper frames to form an internal insulation structure. This design integrates insulation and thermal conductivity within the package, avoiding the complex steps of adding additional insulating pads in traditional methods. It also adapts to high-voltage operating conditions and effectively prevents leakage and breakdown. Second, precision-designed locking holes have been added to the pin bonding locations. During molding, the molten epoxy molding compound can fully flow into the locking holes and solidify to form mechanical anchors, significantly enhancing the bonding force between the molding compound and the frame, while also improving the package's resistance to moisture penetration.

[0041] In terms of circuit connection design, a new Kelvin pin connection method has been added: the base and Kelvin detection terminal (E1) are led out from the upper end of the plastic package, and the collector (C) and emitter (E) are led out from the lower end; the Kelvin detection terminal is led out directly from the emitter metal layer of the chip through an independent aluminum bonding wire, and together with the base, it forms a drive control loop, realizing the physical separation of the drive signal and the main power current, completely eliminating the induced voltage drop generated on the parasitic inductance by the sudden change of the main power loop current, which not only reduces switching losses, but also enables the switching transistor to operate faster and cleaner, improving the circuit operation stability and power conversion efficiency.

[0042] like Figure 1 As shown, this utility model provides an internally insulated, front-side heat dissipation Kelvin package structure, suitable for surface mount packaging of power device products. Figure 2The diagram shown is an exploded view of the packaging structure provided in this embodiment. The internally insulated, front-side heat-dissipating Kelvin package structure consists of: a semiconductor chip 1, an upper copper frame 2, a lower copper frame 3, an insulating ceramic substrate 4, a solder paste layer 5, aluminum bonding wires 6, and an epoxy resin encapsulator 7. The frame is divided into two independent upper and lower layers. The upper frame has two leads on each side, forming a symmetrical dual-path layout. Differential lead spacing avoids incorrect polarity connection. Locking holes are provided on the inner side of the leads, forming mechanical anchor points through encapsulation material filling to enhance the bonding strength of the encapsulator. The first pin 111 on the left serves as the collector (C), and the first pin 112 on the right serves as the emitter (E), forming the main power path. The second pin 113 on the left serves as the base (B), and the second pin 114 on the right serves as the Kelvin detection terminal (E1), directly connecting the additional drive source lead to the gate circuit, achieving separation from the power supply circuit. Semiconductor chip 1 is soldered onto the upper copper frame 2 using screen-printed solder paste. Aluminum bonding wires 6 are then used to connect the front metal layer of the chip to its corresponding pins, achieving electrical connection between the chip and the frame. A high thermal conductivity ceramic substrate is embedded between the upper and lower frames for electrical isolation. The lower frame consists of a large-area metal pad, which, together with the top heat sink, forms a double-sided heat dissipation path to reduce the chip junction temperature. After internal connections are completed, a molding compound encapsulates the semiconductor chip 1, solder paste layer 5, and aluminum bonding wires 6 onto an insulating copper frame containing an insulating ceramic substrate 4. At this point, the back metal layer of the lower frame is exposed on the outside of the package, forming an independent heat sink that supports independent grounding or floating. Simultaneously, the leads are exposed on the top and bottom sides of the package. The molded product undergoes a lead-cutting process, where the four straight leads on the top and bottom sides of the molding compound are bent upwards at 90° to form metal heat sinks, used as independent heat dissipation surfaces.

[0043] The internally insulated, front-side heat-dissipating Kelvin package structure provided in this embodiment of the invention comprises a semiconductor chip 1, upper and lower layered copper frames 2 and 3, an insulating ceramic backing plate 4, a solder paste layer 5, aluminum bonding wires 6, and a molding compound 7. The semiconductor chip 1 is securely mounted on the upper copper frame 2 via the solder paste layer 5, enabling direct heat and current conduction. The insulating ceramic backing plate 4 is sandwiched between the upper and lower copper frames, isolating the electrical path while ensuring efficient thermal conductivity in the vertical direction. The entire assembly structure is externally encapsulated in the molding compound 7 to provide mechanical protection and secure the relative positions of the internal components.

[0044] In terms of connection, the upper copper frame 2 has a first pin 111 and a second pin 113, and the lower copper frame 3 has a first pin 112 and a second pin 114, each undertaking different electrode functions. The first pin 111 serves as the collector C, and the first pin 112 serves as the emitter E, forming the main power path. The second pin 113 serves as the base B, and the second pin 114 serves as the Kelvin detection terminal E1. An additional drive source is directly connected to the front metal layer of chip 1 through aluminum bonding wire 6, realizing the separation of the signal circuit and the power circuit, thereby effectively reducing the influence of parasitic inductance.

[0045] In terms of assembly, chip 1 is located at the core of the structure and is tightly bonded to the upper copper frame 2 via solder paste layer 5. An insulating ceramic backing plate 4 is embedded between the upper and lower copper frames, serving both as an electrical isolation medium and a highly thermally conductive path. Aluminum bonding wires 6 bridge the front of chip 1 with the corresponding pins, completing the electrical interconnection. The molding compound 7 fills the locking holes during injection molding, enhancing the bonding strength between the internal components and the outer casing, resulting in excellent mechanical reliability during long-term operation.

[0046] Functionally, the large metal pads on the back of the lower copper frame 3 are directly exposed on the outer surface of the package, forming an independent heat sink that supports independent external grounding or a floating state. After the upper copper frame 2 undergoes a 90° bend, its four leads extend to form heat sink fins, which, together with the lower pads, create a double-sided heat dissipation path. This structure significantly reduces the junction temperature of chip 1 and improves the stability and lifespan of power devices under high current density conditions.

[0047] Power current flows into chip 1 from collector 111 and is then discharged through emitter 112 to form the main power path. At the same time, base 113 receives the drive signal, and Kelvin detection terminal 114 feeds back the chip current to the drive circuit. The current conducts and switches within chip 1, and the heat generated is conducted along solder paste layer 5 to the upper and lower copper frames, and further diffused and discharged through ceramic backing plate 4 and external heat sink. The plastic package 7 provides environmental isolation and mechanical protection, thus achieving an organic combination of electrical conduction, heat dissipation, and structural protection.

[0048] Example 1

[0049] In one specific application, the semiconductor chip 1 is an IGBT chip, fixed to the upper copper frame 2 by a solder paste layer 5. The front metal layer of chip 1 is connected to the base pin 113 and the Kelvin detection terminal 114 via aluminum bonding wires 6, which completely separates the drive signal from the power circuit and reduces the impact of parasitic inductance on the switching speed. An insulating ceramic backing plate 4 is embedded between the upper and lower copper frames, with the exposed back of the lower copper frame 3 serving as the main heat dissipation surface. Combined with the bent metal heat dissipation fins of the upper layer, double-sided heat dissipation is achieved.

[0050] Example 2

[0051] In another application, semiconductor chip 1 is a MOSFET chip, arranged in a multi-chip parallel configuration on the upper copper frame 2, with the chips uniformly soldered together via solder paste layer 5. Aluminum bonding wires 6 connect the front metal layers of multiple chips 1 in parallel to pins 111 and 112, forming a main power path with high current carrying capacity. The base pin 113 is used for signal input, while the Kelvin detection terminal 114 provides an independent current sampling path, ensuring the stability of the gate drive signal. When used in high-power DC-DC converters, this structure effectively improves the current sharing performance of the device and reduces switching losses.

[0052] The two embodiments described above demonstrate that the internally insulated, front-side heat-dissipating Kelvin package structure of this invention is not only suitable for different types of power chips (such as IGBTs and MOSFETs), but also achieves a synergistic effect of low parasitic inductance and efficient heat dissipation through a double-sided heat dissipation design and Kelvin pin layout. This solution can be widely applied in high-power electronic devices, significantly improving the thermal management capabilities and dynamic performance of the devices.

[0053] In the description of this utility model, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," "outer," "front end," "rear end," "head," "tail," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. In addition, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0054] The above description is only a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any modifications, equivalent substitutions and improvements made by those skilled in the art within the technical scope disclosed in this utility model, and within the spirit and principles of this utility model, should be included within the protection scope of this utility model.

Claims

1. A Kelvin package structure with internal insulation and front-side heat dissipation, characterized in that, include: Semiconductor chips, layered copper frames, insulating ceramic substrates, solder paste layers, aluminum bonding wires, and epoxy resin encapsulation; The layered copper frame is divided into two independent conductive areas, upper and lower, with a high thermal conductivity ceramic backing embedded in the middle to achieve electrical isolation and mechanical support. The semiconductor chip is fixed to the upper frame by solder paste. The metal layer on the back of the lower frame is exposed on the outside of the package after molding, serving as a heat dissipation substrate. The legs of the layered copper frame adopt a symmetrical dual-path layout, with locking holes on the inner side of the legs and a differentiated spacing layout.

2. The internally insulated front-side heat dissipation Kelvin package structure as described in claim 1, characterized in that, The interconnection between the semiconductor chip and the ceramic substrate and copper frame is all done by screen printing solder paste.

3. The internally insulated front-side heat dissipation Kelvin package structure as described in claim 1, characterized in that, After the molding process, the tube legs are vertically exposed on the top and bottom sides of the package. The tubes are cut and shaped, then bent upwards at 90° to form metal heat dissipation fins, which are used as independent heat dissipation surfaces.

4. The internally insulated front-side heat dissipation Kelvin package structure as described in claim 1, characterized in that, The metal flaps on the top and bottom sides of the plastic seal are tin-plated.

5. The internally insulated front-side heat dissipation Kelvin package structure as described in claim 1, characterized in that, The two pins at the bottom of the molded package serve as the main power path: the collector and the emitter, respectively. The collector is formed by directly soldering the metal layer on the back of the chip to the upper lead frame and forming a pin that extends from the frame. The emitter metal layer on the front of the chip is connected to another corresponding pin through a bonding wire.

6. The internally insulated front-side heat dissipation Kelvin package structure as described in claim 1, characterized in that, The two pins on the top of the molded package form a drive control loop: the base and the Kelvin detection terminal, respectively. The base metal layer on the front of the chip is connected to the corresponding pin by a bonding wire, while the Kelvin detection terminal is directly led out from the emitter metal layer of the chip through an independent bonding wire and connected to a dedicated pin.

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