Optical package structure
Patent Information
- Application Number
- CN202521684195.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2025-07-30
- Filing Date
- 2025-08-08
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2035-08-08
AI Technical Summary
[0005]然而,前述的共同封装光学装置中的光晶片与转换晶片须通过电路板及基板内的金属线路进行信号的传输,不仅装置整体尺寸过大且过厚,而不利电子产品的微小化,同时其信号传输路径过长,易导致信号的耗损,并半随着散热问题
[0021]由上可知,本申请的光学封装结构主要在承载板上设置半导体元件及电子元件,并于电子元件上堆叠光元件,进而构成三层垂直堆叠的光学封装结构,同时可通过形成于承载板内部的多个导电穿孔及形成于该电子元件内部的导通孔,使光元件、电子元件、半导体元件及承载板之间可缩短彼此相互间信号传递路径,提升传输速率;此外,通过在半导体元件上设置散热件,可提升整体结构的散热效能,并可令光学元件为光元件所支撑,减少光学元件发生断裂风险;再者,由于光元件于制程后段接合于电子元件上,故可避免制程中干涉问题。
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Figure CN224910128U_ABST
Abstract
Description
Technical Field
[0001] This application relates to a semiconductor packaging structure, and more particularly to an optical packaging structure with optical elements. Background Technology
[0002] With the booming development of the electronics industry, electronic products are gradually moving towards multifunctionality and high performance. The application of current fifth-generation (5G) communication technology has expanded to various fields such as the Internet of Things (IoT), Industrial Internet of Things (IIoT), cloud computing, artificial intelligence (AI), autonomous vehicles, and medical care. As applications expand, a massive amount of data needs to be efficiently transmitted, processed, and stored, especially data transmission. This has led the industry to replace electricity with light as the data transmission medium to improve transmission capacity, efficiency, and distance, while reducing energy consumption. Against this backdrop, co-packaged optical devices have become a future trend in semiconductor and packaging technology.
[0003] Please see Figure 1A and Figure 1B The diagram shows a top view and a partial cross-sectional view of the existing co-packaged optical device 1.
[0004] like Figure 1A As shown, in the existing co-packaged optical device 1, multiple optical engines 11 and a conversion chip 12 are integrated onto a circuit board 10. Figure 1B As shown, the conversion chip 12 is first disposed on a substrate 13, and then connected to the circuit board 10 through the substrate 13. Each optical engine 11 includes a semiconductor chip 112 formed in a package structure 111 and an optical chip 113 connected to the package structure 111. One end of the optical chip 113 is connected to an optical fiber 14, and a shelf 15 is provided below the junction of the optical chip 113 and the optical fiber 14 to enable the optical signal to be transmitted to the photoelectric engine 11 for communication.
[0005] However, in the aforementioned co-packaged optical devices, the optical chip and conversion chip must transmit signals through the metal lines within the circuit board and substrate. This results in an excessively large and thick overall device size, hindering the miniaturization of electronic products. Furthermore, the excessively long signal transmission path leads to signal loss and heat dissipation issues. Additionally, placing the optical engine on the circuit board, with its pre-fabrication and protruding optical chip from the packaging structure, can cause interference during the manufacturing process. Moreover, the suspended support can result in insufficient fiber support, posing a risk of breakage.
[0006] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Utility Model Content
[0007] In view of the various deficiencies of the prior art, this application provides an optical packaging structure, including: a carrier plate; a semiconductor element disposed and electrically connected to the carrier plate; an electronic element disposed and electrically connected to the carrier plate; a heat sink disposed on the semiconductor element; and an optical element disposed and electrically connected to the electronic element.
[0008] This application also provides a method for manufacturing an optical packaging structure, including: mounting and electrically connecting a semiconductor element and an electronic element on a carrier plate; providing a heat sink on the semiconductor element; and mounting and electrically connecting an optical element on the electronic element.
[0009] In the aforementioned optical packaging structure and its manufacturing method, a semiconductor element and a plurality of electronic elements are disposed on the carrier plate, and the plurality of electronic elements are disposed around the semiconductor element.
[0010] In the aforementioned optical packaging structure and its manufacturing method, the carrier plate is an intermediate plate with multiple conductive perforations formed inside.
[0011] In the aforementioned optical packaging structure and its manufacturing method, the carrier plate has a first side and a second side opposite to each other, so that the semiconductor element and the electronic element are disposed on the first side, and a plurality of conductive elements are implanted on the second side.
[0012] In the aforementioned optical packaging structure and its manufacturing method, the semiconductor element is a conversion-type application-specific integrated circuit element.
[0013] In the aforementioned optical packaging structure and its manufacturing method, the electronic component is an electronic integrated circuit component.
[0014] In the aforementioned optical packaging structure and its manufacturing method, multiple through holes are formed inside the electronic component.
[0015] The aforementioned optical packaging structure and its manufacturing method also include a covering layer formed on the carrier plate and covering the semiconductor element, the electronic element and the heat sink.
[0016] In the aforementioned optical packaging structure and its manufacturing method, the upper surface of the heat sink and the upper surface of the electronic component are flush with each other and the covering layer is exposed.
[0017] In the aforementioned optical packaging structure and its manufacturing method, the optical element is a photonic integrated circuit element.
[0018] The aforementioned optical packaging structure and its manufacturing method also include an optical element attached to the optical element.
[0019] The aforementioned optical packaging structure and its manufacturing method also include a circuit board for mounting the carrier plate.
[0020] In the aforementioned optical packaging structure and its manufacturing method, the heat sink protrudes above the semiconductor element and extends around to the electronic element to cover the semiconductor element and the electronic element.
[0021] As can be seen from the above, the optical packaging structure of this application mainly consists of semiconductor components and electronic components on a carrier plate, and optical components are stacked on the electronic components to form a three-layer vertically stacked optical packaging structure. At the same time, multiple conductive vias formed inside the carrier plate and through-holes formed inside the electronic components can shorten the signal transmission path between the optical components, electronic components, semiconductor components and the carrier plate, thereby improving the transmission rate. In addition, by setting heat sinks on the semiconductor components, the heat dissipation performance of the overall structure can be improved, and the optical components can be supported by the optical components, reducing the risk of breakage of the optical components. Furthermore, since the optical components are bonded to the electronic components in the later stages of the manufacturing process, interference problems during the manufacturing process can be avoided. Attached Figure Description
[0022] Figure 1A and Figure 1B This is a plan view and a partial cross-sectional view of an existing co-packaged optical device.
[0023] Figures 2A to 2E This is a cross-sectional schematic diagram of the manufacturing method of the first embodiment of the optical packaging structure of this application.
[0024] Figure 3 This is a cross-sectional schematic diagram of the second embodiment of the optical packaging structure of this application.
[0025] Explanation of reference numerals in the attached figures 1. Co-packaged optical devices 10 circuit boards 11 optical engines 111 package structure 112 Semiconductor Wafer 113 optical chip 12 conversion chips 13 substrates 14 fiber optic cables 15 supports 2,3 Optical Packaging Structure 20 bearing plate 20a First Side 20b Second Side 200 conductive via 201 wiring layer 202 conductive element 21 Semiconductor Components 22 electronic components 220 via 23 Passive Components 24, 34 heat sink 240 adhesive layer 25 coating layers 26 optical elements 260 optical components 27 circuit boards 271 Insulation Layer 272 line layer. Detailed Implementation
[0026] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.
[0027] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," "third," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.
[0028] Please see Figures 2A to 2E This is a cross-sectional schematic diagram of the optical packaging structure and its manufacturing method of this application.
[0029] like Figure 2AAs shown, a carrier plate 20 is provided, and at least one semiconductor element 21 and at least one electronic element 22 are disposed and electrically connected on the carrier plate 20. The illustration in this embodiment shows that a semiconductor element 21 and a plurality of electronic elements 22 are disposed on the carrier plate 20. The plurality of electronic elements 22 are disposed around the semiconductor element 21, and the thickness of the electronic element 22 is greater than the thickness of the semiconductor element 21.
[0030] The carrier plate 20 is, for example, an interposer (e.g., a silicon interposer) with multiple conductive vias 200 (e.g., conductive through-silicon vias (TSVs)) formed therein. The carrier plate 20 has opposing first sides 20a and second sides 20b, and a wiring layer 201 (e.g., a redistribution layer (RDL)) is formed on the first side 20a for the semiconductor element 21 and the multiple electronic components 22 to be disposed on the first side 20a and electrically connected to the wiring layer 201. Multiple conductive elements 202 (e.g., solder bumps or copper bumps) are implanted on the second side 20b of the carrier plate 20.
[0031] In this embodiment, the semiconductor element 21 is a system-on-a-chip (SoC), such as a switch ASIC, which can be mounted and electrically connected to the carrier plate 20 through multiple conductive bumps.
[0032] The electronic component 22 is, for example, an electronic integrated circuit (EIC) component, which can be mounted and electrically connected to the carrier plate 20 through multiple conductive bumps, and multiple through holes 220 can be formed inside the electronic component 22 to facilitate rapid electrical conduction between its two opposing surfaces.
[0033] In addition, at least one passive element 23 (e.g., an integrated passive element (IPD)) may be provided on the carrier plate 20 to improve the overall electrical function of the structure.
[0034] like Figure 2B As shown, a heat sink 24 is attached to the semiconductor element 21. The heat sink 24 is, for example, a waste wafer or a metal block, and can be disposed on the semiconductor element 21 through an adhesive layer 240, such as a die attach film (DAF), so that the heat generated by the semiconductor element 21 during operation can be dissipated to the outside through the heat sink 24.
[0035] like Figure 2C As shown, a covering layer 25 is formed on the carrier plate 20 to cover the semiconductor element 21, the electronic element 22, the passive element 23, and the heat sink 24. The covering layer 25 is, for example, an encapsulating colloid.
[0036] Next, the covering layer 25 can be thinned to expose the heat sink 24 and the electronic component 22. The thinning process can be carried out by grinding to remove part of the covering layer 25, part of the heat sink 24 and part of the electronic component 22, so that the upper surface of the heat sink 24 and the upper surface of the electronic component 22 are flush with each other and the covering layer 25 is exposed.
[0037] like Figure 2D As shown, an optical element 26 is attached to the electronic element 22 that exposes the outer covering layer 25 to obtain the optical packaging structure 2 of this application.
[0038] In this embodiment, the optical element 26 is, for example, a photonic integrated circuit (PIC).
[0039] Alternatively, an optical element 260 can be attached to the optical element 26. The optical element 260 may be, for example, a fiber optic array unit (FAU), a fiber optic slot, a lens, or a mirror. It is attached to the optical element 26 and can be supported by the optical element 26.
[0040] like Figure 2E As shown, the carrier plate 20 can then be attached to a circuit board 27. The circuit board 27 includes an insulating layer 271 and a circuit layer 272 bonded to the insulating layer 271, so that the carrier plate 20 can be attached to and electrically connected to the circuit layer 272 of the circuit board 27 through the plurality of conductive elements 202.
[0041] Accordingly, this application directly mounts a semiconductor element 21 (conversion-type application-specific integrated circuit element) and an electronic element 22 (electronic integrated circuit element) on a carrier plate 20 (intermediate plate), and directly mounts an optical element 26 (photonic integrated circuit element) on the electronic element 22, thereby forming a 3D stacked structure. Multiple conductive vias 200 are formed inside the carrier plate 20 (intermediate plate), or multiple through-holes 220 are formed in the electronic element 22, to directly stack and electrically connect the semiconductor element 21, electronic element 22, optical element 26, and carrier plate 20, thereby shortening the signal transmission distance between the components and improving signal transmission efficiency. Simultaneously, this application provides a heat sink 24 on the semiconductor element 21 so that the heat generated during the operation of the semiconductor element 21 can be dissipated to the outside through the heat sink 24. Furthermore, this application stably mounts the optical element 260 above the optical element 26 to prevent the optical element 260 from breaking.
[0042] Through the aforementioned manufacturing method, this application also discloses an optical packaging structure 2, including: a carrier plate 20, a semiconductor element 21 and an electronic element 22 disposed on the carrier plate 20, a heat sink 24 disposed on the semiconductor element 21, and an optical element 26 disposed on the electronic element 22.
[0043] The carrier plate 20 may be an intermediate plate having multiple conductive perforations 200.
[0044] The semiconductor element 21 may be a system-on-a-chip (SoC), such as a switch application-specific integrated circuit (ASIC).
[0045] The electronic component 22 can be an electronic integrated circuit component, which has multiple through holes 220 formed inside.
[0046] The heat sink 24 may be a scrap chip.
[0047] The optical element 26 can be a photonic integrated circuit element, and it can also be provided with an optical element 260.
[0048] In addition, the optical packaging structure 2 also includes a cover layer 25 and a circuit board 27. The cover layer 25 is formed on the carrier plate 20 to cover the semiconductor element 21, the electronic element 22, and the heat sink 24. The circuit board 27 includes an insulating layer 271 and a circuit layer 272 bonded to the insulating layer 271, so that the carrier plate 20 can be placed and electrically connected to the circuit board 27.
[0049] Please see Figure 3 This is a cross-sectional schematic diagram of the second embodiment of the optical packaging structure of this application. The optical packaging structure 3 of this embodiment is generally the same as that of the previous embodiment, the main difference being that the heat sink 34 protrudes above the semiconductor element 21 and extends around to the top of the electronic element 22, so that the heat sink 34 covers the semiconductor element 21 and the electronic element 22 to improve heat dissipation efficiency.
[0050] In summary, the optical packaging structure of this application mainly consists of semiconductor and electronic components mounted on a carrier plate, with optical components stacked on the electronic components, thus forming a three-layer vertically stacked optical packaging structure. Furthermore, multiple conductive vias formed inside the carrier plate and through-holes formed inside the electronic components shorten the signal transmission paths between the optical components, electronic components, semiconductor components, and the carrier plate, thereby increasing the transmission rate. Additionally, by providing heat sinks on the semiconductor components, the overall heat dissipation performance of the structure is improved, and the optical components are supported by the light components, reducing the risk of breakage. Moreover, since the optical components are bonded to the electronic components in the later stages of the manufacturing process, interference problems during the manufacturing process can be avoided.
[0051] The above embodiments are used to illustrate the principles and effects of this application, and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.
Claims
1. An optical packaging structure, characterized in that, include: Support plate; Semiconductor components are disposed and electrically connected to the carrier plate; Electronic components are mounted and electrically connected to the carrier plate; A heat sink is disposed on the semiconductor element; as well as An optical element is attached to and electrically connected to the electronic element.
2. The optical packaging structure as described in claim 1, characterized in that, The carrier board has a semiconductor element and a plurality of electronic elements attached thereon, and the plurality of electronic elements are disposed around the semiconductor element.
3. The optical packaging structure as described in claim 1, characterized in that, The carrier plate is an intermediate plate with multiple conductive perforations formed inside.
4. The optical packaging structure as described in claim 1, characterized in that, The carrier plate has a first side and a second side opposite to each other, on which the semiconductor element and the electronic element are disposed, and on the second side a plurality of conductive elements are implanted.
5. The optical packaging structure as described in claim 1, characterized in that, This semiconductor device is a conversion-type application-specific integrated circuit (ASIC) device.
6. The optical packaging structure as described in claim 1, characterized in that, This electronic component is an electronic integrated circuit component.
7. The optical packaging structure as described in claim 1, characterized in that, The electronic component has multiple vias inside.
8. The optical packaging structure as described in claim 1, characterized in that, The optical packaging structure also includes a covering layer formed on the carrier plate and covering the semiconductor element, the electronic element and the heat sink.
9. The optical packaging structure as described in claim 8, characterized in that, The upper surface of the heat sink and the upper surface of the electronic component are flush with each other and the covering layer is exposed.
10. The optical packaging structure as described in claim 1, characterized in that, This optical element is a photonic integrated circuit element.
11. The optical packaging structure as described in claim 1, characterized in that, The optical packaging structure also includes optical elements attached to the optical element.
12. The optical packaging structure as described in claim 1, characterized in that, The optical packaging structure also includes a circuit board for mounting the carrier plate.
13. The optical packaging structure as described in claim 1, characterized in that, The heat sink protrudes above the semiconductor element and extends around it to cover the electronic element.