An integrated circuit chip stack

CN224916488UActive Publication Date: 2026-10-30WUXI SILIXING ROAD TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202522700876.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-12-19
Publication Date
2026-10-30
Estimated Expiration
2035-12-19

AI Technical Summary

Technical Problem

现有技术中相关堆叠装置存在三大核心缺陷,难以满足高效、灵活且稳定的堆叠需求:

Benefits of technology

通过间距调节机构实现双堆叠单元的相对移动,适配不同长度芯片,提升空间利用率和场景适配性;

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to integrated circuit chip technical field, specifically disclose a kind of integrated circuit chip stacking, including base and two chip stacking units;Spacing adjustment mechanism for driving two chip stacking units relative opposite or back sliding is provided on the base;Each the chip stacking unit includes support, adjusting layer board, guide rod, shear type connecting rod group and linear driver;The support is fixed on spacing adjustment mechanism;The adjusting layer board is arranged in support along longitudinal direction;The device is through double-unit spacing adjustable, multilayer board synchronous adjustment and the integrated design of chip across two sides of placement board lap joint, improves the adjustment efficiency, precision and space utilization, substantially enhance chip bearing stability, protect chip from damage, adapt to the stacking demand of different length, thickness specification chip, structure simplifies, and strong universality is applicable to various integrated circuit chip stacking scene.
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Description

Technical Field

[0001] This utility model relates to the field of integrated circuit chip technology, and specifically discloses an integrated circuit chip stacking. Background Technology

[0002] In the process of integrated circuit chip stacking, specialized stacking devices are required to achieve the orderly placement, fixation, and flexible adjustment of chips of different specifications. Especially for large-sized chips or those requiring stable support, they often need to be supported across multiple carriers to avoid damage caused by uneven local stress. Existing stacking devices suffer from three major drawbacks, making it difficult to meet the requirements of efficient, flexible, and stable stacking: Firstly, the spacing adjustment efficiency of chip carrier plates is low and the synchronization is poor. For example, the utility model patent with authorization announcement number CN218414533U uses a structure of slider and spring to adjust the position of the plate, but it can only achieve clamping and fixing in one direction and cannot achieve synchronous lifting and lowering of multiple plates. When adapting to chips of different thicknesses, it is necessary to adjust them one by one, which is cumbersome and prone to interlayer misalignment. The utility model patent with authorization announcement number CN215069882U drives the placement plate to move through the cooperation of screw and bushing. Although the number of placement plates can be increased or decreased, the plate adjustment relies on thread transmission, which has poor synchronization and complex structure. The adjustment accuracy is easily affected by thread wear. Neither of these can meet the requirements of synchronous and stable stacking of multiple layers of chips.

[0003] Secondly, the overall space adaptability of the stacking device is insufficient. For example, the utility model patents with authorization announcement number CN218414533U and CN208923058U are both single stacking unit designs. They cannot adjust the relative spacing between two independent stacking units according to the number of chips and package size, resulting in low space utilization and easy interference when multiple chips are stacked. Although CN215069882U can be disassembled and stored, it does not involve the dynamic adjustment function of the stacking unit spacing, and cannot adapt to high-density and flexible stacking scenarios.

[0004] Third, none of the existing devices have achieved the function of "stable chip support across two units". The stacking units of the existing technologies are all independently supported designs. The chip can only be placed on a single layer of carrier in a single unit. For large-sized chips or chips that require multi-point stable support, it is impossible to achieve uniform force through cross-unit overlapping. The chip is prone to tilting or falling off due to insufficient carrier support area, or chip damage due to excessive local force, which further limits the device's ability to adapt to chips of different specifications.

[0005] In summary, none of the existing technologies disclose an integrated stacking structure that combines "synchronous lifting and lowering of multi-layer boards", "adjustable spacing between dual stacking units" and "stable chip connection and support across dual units". Therefore, there is an urgent need to propose an integrated circuit chip stacking solution that is structurally simple, precisely adjustable, highly adaptable and stable in terms of load-bearing capacity, in order to overcome the shortcomings of the existing technologies. Utility Model Content

[0006] This invention proposes an integrated circuit chip stacking method. Through the precise alignment and overlapping design of the two side plates at the same height, the integrated circuit chip stacking achieves precise synchronous adjustment of the spacing between the two units and the height of the multi-layer boards. It combines ease of operation, structural stability and scene adaptability, improves the chip load-bearing stability, effectively protects the chip and improves stacking efficiency and space utilization.

[0007] This invention is implemented as follows: an integrated circuit chip stack includes a base and two chip stacking units; the base is provided with a spacing adjustment mechanism for driving the two chip stacking units to slide relative to each other or backwards; each chip stacking unit includes a support, an adjustment plate, a guide rod, a scissor linkage group, and a linear actuator; the support is fixed to the spacing adjustment mechanism; the adjustment plates are arranged longitudinally within the support; the guide rod is fixed to the support and passes through all the adjustment plates; the scissor linkage group is symmetrically arranged on both sides of all the adjustment plates, with each hinge point located on the corresponding adjustment plate, so that all the adjustment plates move synchronously and at equal intervals under the drive of the scissor linkage group; the linear actuator is mounted on the support, and its output end is connected to the uppermost adjustment plate; each adjustment plate has a placement plate extending horizontally towards another chip stacking unit on one side.

[0008] As a preferred embodiment of the present invention for integrated circuit chip stacking, the spacing adjustment mechanism includes a groove formed on the top of the base, a bidirectional lead screw rotatably disposed in the groove, and a drive assembly for driving the bidirectional lead screw to rotate; a slider is screwed onto each of the two reverse threads of the bidirectional lead screw, and the tops of the two sliders are respectively fixedly connected to the bottom of the support of the two chip stacking units.

[0009] As a preferred embodiment of the integrated circuit chip stacking of this utility model, the driving component is a worm gear mechanism; the worm gear mechanism includes a worm wheel fixed coaxially with one end of the bidirectional lead screw, a worm meshing with the worm wheel, and a transmission cavity for mounting the worm wheel and the worm; one end of the worm extends to the outside of the base and is connected to an operating handle.

[0010] As a preferred embodiment of the integrated circuit chip stacking of this utility model, the scissor linkage group is formed by multiple X-shaped linkage units hinged end to end by pins, and the four ends of each X-shaped linkage unit are hinged to the corresponding adjustment layer plate by the pins.

[0011] As a preferred embodiment of the integrated circuit chip stacking of this utility model, the linear driver is one of an electric push rod, a pneumatic cylinder, or a hydraulic cylinder.

[0012] As a preferred embodiment of the integrated circuit chip stacking of this utility model, the upper surface of the placement plate is provided with an anti-static layer or a buffer pad.

[0013] As a preferred embodiment of the integrated circuit chip stacking of this utility model, there are two guide rods, located on the left and right sides of the adjustment layer plate respectively; the adjustment layer plate is provided with linear bearings that cooperate with the guide rods.

[0014] As a preferred embodiment of the integrated circuit chip stacking of this utility model, the adjustment layer plate located at the bottom is fixedly connected to the bottom of the bracket.

[0015] The beneficial effects of this utility model are: The relative movement of the two stacked units is achieved through a spacing adjustment mechanism, which can adapt to chips of different lengths, improve space utilization and scene adaptability; The synchronous and equally spaced movement of all adjustable shelves is achieved through scissor linkages and linear actuators, resulting in high adjustment accuracy, convenient operation, and prevention of misalignment between shelves. The chip is stably supported by the cross-unit overlapping design of the placement board, and the anti-static layer or buffer pad effectively protects the chip from physical and electrostatic damage. With its streamlined and versatile structure, it is suitable for various integrated circuit chip stacking scenarios. Attached Figure Description

[0016] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0017] Figure 1 This is a schematic diagram of the overall structure of this utility model.

[0018] Figure 2 This is a cross-sectional structural diagram of the base, chip stacking unit, and spacing adjustment mechanism of this utility model.

[0019] Figure 3 This is a side view of the chip stacking unit of this utility model.

[0020] The markings in the diagram are: 1. Base; 2. Chip stacking unit; 3. Spacing adjustment mechanism; 4. Support; 5. Adjustable shelf; 6. Guide rod; 7. Scissor linkage assembly; 8. Linear actuator; 9. Shelf; 10. Slide; 11. Two-way lead screw; 12. Drive assembly; 13. Slider; 14. Worm gear; 15. Worm; 16. Transmission chamber; 17. Operating handle; 18. Linear bearing. Detailed Implementation

[0021] The present invention will be further described below with reference to the accompanying drawings and specific embodiments to aid in understanding its content. Unless otherwise specified, the methods used in this invention are conventional methods; the raw materials and apparatus used, unless otherwise specified, are conventional commercially available products.

[0022] Please see Figure 1-3 An integrated circuit chip stack includes a base 1 and two chip stacking units 2. The base 1 is provided with a spacing adjustment mechanism 3 for driving the two chip stacking units 2 to slide relative to each other or backward. Each chip stacking unit 2 includes a support 4, an adjustment plate 5, a guide rod 6, a scissor linkage group 7, and a linear actuator 8. The support 4 is fixed to the spacing adjustment mechanism 3. The adjustment plates 5 are arranged longitudinally within the support 4. The guide rod 6 is fixed to the support 4 and passes through all the adjustment plates 5. The scissor linkage group 7 is symmetrically arranged on both sides of all the adjustment plates 5, and each of its hinge points is respectively located on the corresponding adjustment plate 5, so that all the adjustment plates 5 move synchronously and at equal intervals under the drive of the scissor linkage group 7. The linear actuator 8 is mounted on the support 4, and its output end is connected to the uppermost adjustment plate 5. Each adjustment plate 5 has a placement plate 9 extending horizontally toward another chip stacking unit 2 on one side.

[0023] In this embodiment: the base 1 provides a supporting foundation for the entire device. When the bidirectional lead screw 11 in the spacing adjustment mechanism 3 rotates, its two reverse threads will drive the screwed slider 13 to slide relative to each other or backwards, thereby driving the two chip stacking units 2 fixed on the slider 13 to move synchronously, ensuring that the spacing of the placement plates 9 on both sides of the unit is adapted to the length of the chip to be placed. In each chip stacking unit 2, the bracket 4 is fixed on the slider 13 and provides a mounting carrier for the internal components. The bottom adjustment plate 5 is fixed to the bottom of the bracket 4 to form a support base. The linear actuator 8 is installed on the bracket 4 and its output end is connected to the top adjustment plate 5. After starting, it can drive the top adjustment plate 5 to move up and down along the guide rod 6. At the same time, the scissor linkage group 7 is connected to each adjustment plate 5 through hinge points symmetrically arranged on both sides of the adjustment plate 5. Driven by the topmost adjusting plate 5, the telescopic movement is achieved. Since the scissor linkage group 7 is composed of multiple X-shaped linkage units hinged end to end, its telescopic movement can drive all adjusting plates 5 to move synchronously and at equal intervals along the guide rod 6, ensuring that the adjusting plates 5 (and the placement plates 9) at the same height in the chip stacking units 2 on both sides are precisely aligned. The linear bearings 18 on the adjusting plates 5 cooperate with the two guide rods 6 to further ensure the horizontal consistency of the placement plates 9 on both sides at the same height. The placement plates 9 extend horizontally towards another chip stacking unit 2. When the chip is placed, it can directly overlap the placement plates 9 on both sides at the same height to achieve stable cross-unit load-bearing. The anti-static layer or buffer pad protects the chip from both sides at the same time, ultimately realizing the functions of adjustable spacing between the double stacking units, synchronous equal height alignment of multi-layer boards, and smooth cross-unit stacking of chips.

[0024] As a technical optimization of this utility model, the spacing adjustment mechanism 3 includes a slide groove 10 opened on the top of the base 1, a bidirectional lead screw 11 rotatably disposed in the slide groove 10, and a drive assembly 12 for driving the bidirectional lead screw 11 to rotate; a slider 13 is screwed onto the two reverse threads of the bidirectional lead screw 11 respectively, and the tops of the two sliders 13 are fixedly connected to the bottom of the bracket 4 of the two chip stacking units 2 respectively.

[0025] In this embodiment, the device improves adjustment efficiency, accuracy and space utilization through the integrated design of adjustable dual-unit spacing, synchronous adjustment of multi-layer boards and chip overlapping on both sides of the placement board 9. It greatly enhances the chip load stability, protects the chip from damage, adapts to the stacking requirements of chips of different lengths and thicknesses, has a simple structure and strong versatility, and is suitable for various integrated circuit chip stacking scenarios.

[0026] As a technical optimization of this utility model, the drive assembly 12 is a worm gear mechanism; the worm gear mechanism includes a worm wheel 14 coaxially fixed to one end of the bidirectional lead screw 11, a worm 15 meshing with the worm wheel 14, and a transmission cavity 16 for mounting the worm wheel 14 and the worm 15; one end of the worm 15 extends to the outside of the base 1 and is connected to an operating handle 17.

[0027] In this embodiment: the self-locking and deceleration characteristics of the worm gear 14 and worm 15 are used to achieve stable locking after the spacing adjustment, and the operation difficulty is reduced by operating the handle 17, which enhances the safety and convenience of the spacing adjustment and avoids the unit displacement after adjustment. The worm 15 and the transmission cavity 16 are rotatably connected by bearings.

[0028] As a technical optimization of this utility model, the scissor linkage group 7 is formed by multiple X-shaped linkage units hinged end to end by pins. The four ends of each X-shaped linkage unit are hinged to the corresponding adjustment plate 5 by pins.

[0029] In this embodiment: the X-shaped linkage unit ensures the synchronous extension and retraction of the scissor linkage group 7, so that each adjustment layer plate 5 is subjected to uniform force, improves the stability of the synchronous movement of the multilayer board, avoids interlayer misalignment, and ensures the regularity of chip stacking.

[0030] As a technical optimization of this utility model, the linear actuator 8 is one of an electric push rod, a pneumatic cylinder, or a hydraulic cylinder.

[0031] In this embodiment: the linear actuator 8 provides power for adjusting the lifting and lowering of the shelf 5, adapting to different power demand scenarios, taking into account the flexibility of electric, pneumatic and hydraulic drives, and meeting the adaptation needs of different usage environments. However, electric actuators are preferred.

[0032] As a technical optimization of this utility model, an antistatic layer or a buffer pad is provided on the upper surface of the shelf 9.

[0033] In this embodiment: the antistatic layer or buffer pad protects the chip from electrostatic damage and physical impact, and improves the safety during the chip stacking process, reducing the risk of chip damage.

[0034] As a technical optimization of this utility model, there are two guide rods 6, which are located on the left and right sides of the adjustment plate 5 respectively; the adjustment plate 5 is provided with a linear bearing 18 that cooperates with the guide rods 6.

[0035] In this embodiment: the linear bearing 18 provides precise guidance for adjusting the lifting and lowering of the shelf 5, reduces movement friction, improves the smoothness and accuracy of shelf adjustment, and avoids shelf offset.

[0036] As a technical optimization of this utility model, the adjustment plate 5 located at the bottom is fixedly connected to the bottom of the bracket 4.

[0037] In this embodiment: a stable support base is provided for the scissor linkage group 7 to ensure the consistency of telescopic movement and enhance the stability of the overall structure, avoiding swaying during synchronous adjustment of multi-layer plates.

[0038] Working principle and usage process of this utility model: Initially, the two chip stacking units 2 are at a preset distance, each adjusting plate 5 maintains a fixed distance, and the two side placement plates 9 at the same height are initially aligned, with the placement plates 9 in an empty state. Based on the length of the chip to be stacked (which needs to match the overlap requirements of the two side placement plates 9) and the package size, the worm gear 15 is rotated by the operating handle 17. The worm gear 15 drives the meshing worm wheel 14 to rotate, which in turn drives the bidirectional lead screw 11 to rotate, causing the slider 13 to move the two chip stacking units 2 towards or away from each other. After adjusting the distance between the two side placement plates 9 to match the chip length, the worm wheel and worm gear mechanism self-locks to fix the distance. Based on the chip thickness, the linear driver 8 is activated, and its output pushes or pulls the uppermost adjusting plate 5 along the guide rod 6. The movement is achieved through the telescopic transmission of the scissor linkage group 7, which drives all the adjustment plates 5 to move synchronously and at equal intervals, ensuring that the placement plates 9 at the same height in the chip stacking units 2 on both sides are precisely horizontally aligned. After adjusting the spacing between each adjustment plate 5 (and placement plate 9) to match the chip thickness, the linear driver 8 is turned off. The integrated circuit chips are then stacked one by one on the placement plates 9 at the same height on both sides. The anti-static layer or buffer pads on both sides of the placement plates 9 provide protection from both ends of the chip synchronously, preventing the chip from tilting or experiencing uneven force in certain areas. If the stacking specifications need to be adjusted, the above steps are repeated to readjust the unit spacing and the height of the placement plates 9, ensuring that the new specification chips can still be stably stacked on the placement plates 9 at the same height on both sides, meeting the needs of different scenarios.

[0039] In the description of this utility model, it should be understood that the terms "left", "right", "up", "down", "top", "bottom", "front", "back", "inner", "outer", "back", "middle", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0040] However, the above are merely specific embodiments of this utility model and should not be construed as limiting the scope of implementation of this utility model. Therefore, any substitution of equivalent components or equivalent changes and modifications made in accordance with the scope of protection of this utility model should still fall within the scope of the claims of this utility model.

Claims

1. An integrated circuit chip stack, characterized in that: The device includes a base (1) and two chip stacking units (2); the base (1) is provided with a spacing adjustment mechanism (3) for driving the two chip stacking units (2) to slide relative to each other or backwards; each chip stacking unit (2) includes a bracket (4), an adjustment plate (5), a guide rod (6), a scissor linkage group (7), and a linear actuator (8); the bracket (4) is fixed on the spacing adjustment mechanism (3); the adjustment plate (5) is arranged longitudinally within the bracket (4); the guide rod (6) is fixed on the bracket (4) and passes through... All the adjustment plates (5); the scissor linkage group (7) is symmetrically arranged on both sides of all the adjustment plates (5), and each hinge point is respectively located on the corresponding adjustment plate (5), so that all the adjustment plates (5) move synchronously and at equal intervals under the drive of the scissor linkage group (7); the linear driver (8) is mounted on the bracket (4), and its output end is connected to the adjustment plate (5) located at the top; each adjustment plate (5) has a placement plate (9) extending horizontally toward another chip stacking unit (2) on one side.

2. The integrated circuit chip stack according to claim 1, characterized in that: The spacing adjustment mechanism (3) includes a slide groove (10) opened on the top of the base (1), a bidirectional lead screw (11) rotatably disposed in the slide groove (10), and a drive assembly (12) for driving the bidirectional lead screw (11) to rotate; a slider (13) is screwed onto the two reverse threads of the bidirectional lead screw (11), and the tops of the two sliders (13) are fixedly connected to the bottom of the bracket (4) of the two chip stacking units (2).

3. The integrated circuit chip stack according to claim 2, characterized in that: The drive assembly (12) is a worm gear mechanism; the worm gear mechanism includes a worm wheel (14) coaxially fixed to one end of the bidirectional lead screw (11), a worm (15) meshing with the worm wheel (14), and a transmission cavity (16) for mounting the worm wheel (14) and the worm (15); one end of the worm (15) extends to the outside of the base (1) and is connected to an operating handle (17).

4. An integrated circuit chip stack according to claim 1, characterized in that: The scissor linkage group (7) is composed of multiple X-shaped linkage units that are hinged end to end by pins. The four ends of each X-shaped linkage unit are hinged to the corresponding adjustment plate (5) through the pins.

5. An integrated circuit chip stack according to claim 1, characterized in that: The linear actuator (8) is one of an electric actuator, a pneumatic cylinder, or a hydraulic cylinder.

6. An integrated circuit chip stack according to claim 1, characterized in that: The upper surface of the shelf (9) is provided with an antistatic layer or a cushioning pad.

7. An integrated circuit chip stack according to claim 1, characterized in that: There are two guide rods (6), located on the left and right sides of the adjustment plate (5) respectively; the adjustment plate (5) is provided with linear bearings (18) that cooperate with the guide rods (6).

8. An integrated circuit chip stack according to claim 1, characterized in that: The adjustment plate (5) located at the bottom is fixedly connected to the bottom of the bracket (4).

Citation Information

Patent Citations

  • Adjusting mechanism of integrated circuit chip stacking device

    CN208923058U

  • Integrated circuit chip stack

    CN215069882U

  • Integrated circuit chip stack

    CN218414533U