Glue coating and developing device

Abstract

The utility model provides a kind of gluing developing device, including first process module, interlayer module and second process module.First process module includes N first process layer, N is the positive integer greater than 4, each layer is equipped with first process manipulator and symmetrically distributed even number of first process unit, for executing gluing, developing or optical detection process;Second process module includes N second process layer, each layer is equipped with second process manipulator and symmetrically arranged M second process unit, for executing baking or edge exposure process;Interlayer module is located between the two, is equipped with interlayer manipulator and interlayer refrigeration unit, wafer after being processed by second process module can be cooled to preset temperature.The device realizes double column parallel processing by multilayer symmetrical layout, improves capacity;Interlayer refrigeration unit guarantees the temperature stability before wafer returns first process module, meets the requirement of high-precision photolithography process.The device is used to improve process consistency and equipment throughput.

Description

Technical Field

[0001] This utility model relates to the field of coating and developing equipment, and more particularly to a coating and developing device. Background Technology

[0002] In related technologies, photoresist coating and developing devices typically employ an integrated structure where liquid treatment and heat treatment units are mixed or stacked. Heat generated during the high-temperature baking process is easily conducted to the liquid treatment area, causing temperature fluctuations in the coating environment, leading to changes in photoresist viscosity, uneven film thickness, and affecting process stability. Furthermore, traditional structures have a limited number of process layers, long robotic arm routing paths, and difficulty in meeting high-volume production demands. They also lack an effective temperature control mechanism for returned wafers, as wafers directly enter the liquid treatment area after high-temperature processing, easily causing temperature mismatch issues. Therefore, a photoresist coating and developing device is urgently needed to address these problems. Utility Model Content

[0003] This invention provides a coating and developing apparatus, which is used in semiconductor photolithography to improve process stability and overall machine productivity through modular design and thermal isolation structure.

[0004] According to a first aspect of the present invention, a coating and developing apparatus is provided, comprising: a first process module, an interlayer module, and a second process module; the first process module includes N first process layers, where N is a positive integer greater than 4, and each first process layer includes a first process robot and M first process units, where M is a positive even number; the first process robot is used to feed a wafer into a first process unit and then remove it; the first process unit is used to perform one of a coating process, a developing process, and an optical inspection process on the wafer; the M first process units are symmetrically arranged on both sides of the first process robot; the second process module includes N second process layers, each... The second process layer includes a second process robot and M second process units. The second process robot is used to feed the wafer into the second process unit and then remove it. The second process unit is used to perform one of the following processes on the wafer: baking and edge exposure. The M second process units are symmetrically arranged on both sides of the second process robot. The interlayer module is located between the first process module and the second process module. The interlayer module includes an interlayer robot and an interlayer cooling unit. The interlayer robot is used to feed the wafer that has passed through the second process module into the interlayer cooling unit and then remove it. The interlayer cooling unit is used to cool the wafer to a preset temperature to meet the process requirements of the first process unit.

[0005] In one embodiment, the number of interlayer robots is 2; the 2 interlayer robots, M first process units, M second process units, and are symmetrically distributed in two columns about a symmetry plane; the symmetry plane passes through the line connecting the axis of the first process robot and the axis of the second process robot.

[0006] In one embodiment, both the first and second process manipulators include a translation unit and P actuators, where P is a positive integer greater than 1; the P actuators are used to rotate simultaneously around the axis of their respective manipulators; the translation unit is used to push the axis of the manipulator to translate along a direction perpendicular to the plane of symmetry or along the connecting line; when one actuator is used to pick up a processed wafer, the other actuator is used to release the wafer to be processed.

[0007] In one embodiment, the coating and developing apparatus further includes an interface module located at one end of the second process module away from the interlayer module; the interface module is provided with a back washing unit and an interface robot; the interface robot is used to feed the wafer into the back washing unit and then move it out to the lithography machine; the back washing unit is used to perform a back washing process on the wafer.

[0008] In one embodiment, the interface module includes a forward washing unit; the interface robot is used to feed the wafer into the lithography machine and then move it out to the forward washing unit; the forward washing unit is used to perform a forward washing process on the wafer.

[0009] In one embodiment, the interface module is further provided with an interface temporary storage unit; the interface temporary storage unit is used to store wafers to be fed into the lithography machine, wafers to be back-washed, and back-washed wafers at different workstations; the interface robot is used to feed the wafers into the interface temporary storage unit and then remove them.

[0010] In one embodiment, the interlayer module further includes an interlayer station; the interlayer station is used to store wafers; the interlayer robot is also used to feed or remove wafers into or out of the interlayer station.

[0011] In one implementation, the number of first process robots in each first process layer is a positive integer greater than 1, used for parallel transfer of wafers in the first process layer.

[0012] In one embodiment, the N first process layers include at least two resist coating layers, at least two developing layers, and at least one optical detection layer; each resist coating layer includes a first resist coating unit and a second resist coating unit; the first resist coating unit is used to perform a first resist coating process on the wafer; the second resist coating unit is used to perform a second resist coating process on the wafer; the developing layer includes a developing unit for performing a developing process on the wafer; the optical detection layer includes an optical detection unit for performing an optical detection process on the wafer.

[0013] In one embodiment, the N second process layers include at least two first baking layers, at least two second baking layers, and at least one edge exposure layer; each first baking layer includes a first baking unit and a second baking unit; the first baking unit is used to perform a first baking process on the wafer; the second baking unit is used to perform a second baking process on the wafer; each second baking layer includes a third baking unit and a fourth baking unit; the third baking unit is used to perform a third baking process on the wafer; the fourth baking unit is used to perform a fourth baking process on the wafer; the edge exposure layer includes an edge exposure unit, which is used to perform an edge exposure process on the wafer.

[0014] In one embodiment, the coating and developing apparatus further includes a wafer cassette module; the wafer cassette module is located at one end of the first process module away from the interlayer module; the wafer cassette module includes a loading unit for storing wafers; the wafer cassette module further includes a wafer cassette robot for feeding wafers into the loading unit or removing wafers from the loading unit.

[0015] In one embodiment, the wafer cassette module further includes a marker recognition unit for detecting alignment marks on the wafer edge, the alignment marks including notches or flat edges.

[0016] In one embodiment, the wafer cassette module further includes an adhesion enhancement unit for spraying an adhesion enhancement layer onto the wafer surface to enhance the adhesion between the photoresist and the wafer surface.

[0017] According to a second aspect of the present invention, a control method for a coating and developing apparatus is provided, comprising: providing a coating and developing apparatus, the coating and developing apparatus including a first process module, an interlayer module, and a second process module; wherein the first process module includes N first process layers, each first process layer being provided with a first process robot and M symmetrically distributed first process units; the second process module includes N second process layers, each second process layer being provided with a second process robot and M symmetrically distributed second process units; the interlayer module includes an interlayer robot and an interlayer cooling unit; monitoring the process status of each first process unit in the first process module, and scheduling the first process robot to operate the M first process units within the first process layer. The system performs parallel wafer transfer between layers, executing at least one of the following processes: coating, development, and optical inspection. It monitors the process status of each second process unit within the second process module, and schedules a second process robot to transfer wafers in parallel between M second process units within the second process layer, executing at least one of the following processes: baking and edge exposure. After the wafer completes processing in the second process module, the system controls the interlayer robot to remove it from the second process module and send it to the interlayer cooling unit for cooling, reducing the wafer temperature to a preset temperature that meets the process requirements of the first process module. Based on the process cycle time of each process module, the system dynamically schedules the timing of the interlayer robot's movement or temporary storage of wafers to improve the efficiency of parallel wafer processing between process modules.

[0018] In one embodiment, the provided interlayer module is configured with two interlayer robots, and the two interlayer robots, M first process units, and M second process units are symmetrically distributed in two columns about a symmetry plane; the control method further includes: coordinating the two interlayer robots to work in parallel on both sides of the symmetry plane, processing wafers in different columns respectively, so that the parallel processing cycle of the first process module and the second process module is matched; the symmetry plane passes through the line connecting the axis of the first process robot and the axis of the second process robot.

[0019] In one embodiment, both the first and second process robots include a translation unit and P actuators; the control method further includes: controlling each of the P actuators to rotate independently around the axis of its respective robot, so that multiple wafers can be gripped or released simultaneously; controlling the translation unit to push the robot axis to translate along the direction of the line connecting the planes of symmetry, so that the robot's working range can be expanded and flexible scheduling across columns or across units can be achieved.

[0020] In one embodiment, the coating and developing apparatus further includes an interface module located at one end of the second process module away from the interlayer module; the control method further includes: controlling the interface robot in the interface module to send the wafer that has completed the edge exposure process into the back washing unit for back washing, and after the back washing is completed, moving the wafer out to the lithography machine so that the wafer can enter the lithography process after the back washing is completed.

[0021] In one embodiment, the control method further includes: controlling the interface robot arm to remove the wafer from the lithography machine and send it to the forward washing unit for forward washing process after the wafer is fed into the lithography machine.

[0022] In one embodiment, the interface module is provided with an interface temporary storage unit; the control method further includes: controlling the interface robot to temporarily store the wafer to be fed into the lithography machine, the wafer to be back-washed, or the wafer that has completed back-washing in the interface temporary storage unit; based on the idle state of the lithography machine and the back-washing unit, dynamically scheduling the interface robot to take out the wafer from the interface temporary storage unit so that the transmission of the wafer in the interface module is synchronized with the processing state of the lithography machine.

[0023] In one embodiment, the interlayer module further includes an interlayer station; the control method further includes: when the first process module is currently unable to receive the wafer, controlling the interlayer robot to temporarily store the cooled wafer at the interlayer station; when the first process module is idle, controlling the interlayer robot to take the wafer from the interlayer station and send it into the first process module, so that the wafer can be temporarily stored and subsequently transferred in the interlayer module.

[0024] In one embodiment, each first process layer is configured with multiple first process robots; the control method further includes: controlling the multiple first process robots to work collaboratively within the layer, respectively scheduling the wafer to enter the coating unit, developing unit or optical inspection unit, so that multiple process units within a single layer can operate in parallel.

[0025] In one embodiment, the N first process layers include at least two resist coating layers; each resist coating layer has a first resist coating unit and a second resist coating unit; the N second process layers include at least two first baking layers and at least one edge exposure layer; each first baking layer has a first baking unit and a second baking unit; the interlayer module further includes an interlayer station; the edge exposure layer has a baking unit; the control method further includes: controlling the first process robot, the second process robot and the interlayer robot to transfer the wafer, so that the wafer is sequentially coated with an anti-reflective coating in the first resist coating unit, stored in the first interlayer station, cured with the anti-reflective coating in the first baking unit, cooled in the first interlayer cooling unit, coated with a photoresist layer in the second resist coating unit, stored in the second interlayer station, cured with the photoresist layer in the second baking unit, cooled in the second interlayer cooling unit, and edge exposed in the edge exposure unit.

[0026] In one embodiment, N first process layers include at least two developing layers and one optical detection layer; each developing layer has a developing unit; each optical detection layer has an optical detection unit; N second process layers include at least two second baking layers; each second baking layer has a third baking unit and a fourth baking unit; the control method further includes: controlling a first process robot, a second process robot, and an interlayer robot to transfer the wafer, so that the wafer is sequentially baked in the third baking unit, cooled in the third interlayer cooling unit, developed in the developing unit, stored in the third interlayer station, baked in the fourth baking unit, cooled in the fourth interlayer cooling unit, stored in the fourth interlayer station, and optically detected in the optical detection unit.

[0027] In one embodiment, the coating and developing apparatus further includes a wafer cassette module located at one end of the first process module away from the interlayer module; the control method further includes: controlling the wafer cassette robot to take the wafer out of the loading unit and send it into the first process module for initial processing; or sending the wafer processed in the first process module back to the loading unit, so that the wafer can be bidirectionally transferred between the wafer cassette module and the process module.

[0028] In one embodiment, the control method further includes: before the wafer enters the first process module, controlling the mark recognition unit to detect alignment marks on the edge of the wafer and obtaining detection results; based on the detection results, controlling the wafer cassette robot or the first process robot to rotate and align the wafer so that the wafer enters the subsequent process unit in the target direction.

[0029] In one embodiment, the control method further includes: controlling the adhesion enhancement unit to spray an adhesion enhancer onto the wafer surface; after spraying, controlling the wafer cassette robot or the first process robot to send the wafer into the coating unit for coating process, so that the adhesion enhancement process and the coating process are executed sequentially.

[0030] According to a third aspect of the present invention, a coating and developing apparatus is provided, comprising a control module, a first process module, an interlayer module, and a second process module; the control module is electrically connected to a robotic arm and a process unit in the first process module, the interlayer module, and the second process module, and is used to implement the method as described in any of the second aspects.

[0031] According to a fourth aspect of the present invention, a computer-readable storage medium is provided, wherein a computer program is stored thereon, characterized in that, when the executable computer program in the storage medium is executed by a processor, it is capable of implementing the control method of any one of the second aspects.

[0032] According to a fifth aspect of the present invention, a computer program product is provided, comprising a computer program, characterized in that the computer program, when executed by a processor, implements the method of any one of the second aspects.

[0033] Compared with the prior art, the beneficial effects of this utility model are as follows: By separating the first process module for performing liquid treatment and the second process module for performing heat treatment, and configuring an interlayer module containing an interlayer cooling unit between them, thermal isolation between the liquid treatment area and the heat treatment area is effectively achieved, reducing the thermal interference of high-temperature processes on the liquid treatment environment; at the same time, both the first and second process modules adopt a structure with more than 4 layers, each layer is equipped with an even number of symmetrically distributed process units and a central robot, supporting multi-layer parallel processing and efficient wafer transfer, thereby improving equipment throughput; the interlayer robot can send the heat-treated wafers into the interlayer cooling unit to cool them to the preset temperature that meets the liquid treatment requirements, ensuring the temperature consistency of the wafers before returning to the first process module, thereby improving the stability and repeatability of the coating process. Attached Figure Description

[0034] Figure 1 This is a top view schematic diagram of a coating and developing apparatus according to an exemplary embodiment.

[0035] Figure 2 This is a schematic cross-sectional view of a coating and developing apparatus perpendicular to the Y direction, according to an exemplary embodiment.

[0036] Figure 3 This is illustrated according to an exemplary embodiment. Figure 1 A schematic diagram of the BB cross-section.

[0037] Figure 4 This is illustrated according to an exemplary embodiment. Figure 1 DD cross-sectional schematic diagram.

[0038] Figure 5 This is illustrated according to another exemplary embodiment. Figure 1 A schematic diagram of the AA cross-section.

[0039] Figure 6 This is illustrated according to another exemplary embodiment. Figure 1 A schematic diagram of the CC cross-section.

[0040] Figure 7 This is a schematic flowchart illustrating a control method for a coating and developing apparatus according to another exemplary embodiment.

[0041] Explanation of the reference numerals in the figure: 10. First process module; 20. Interlayer module; 30. Second process module; 40. Interface module; 50. Chip box module; 1. First box robotic arm; 2. Second box robotic arm; 3. Third box robotic arm; 11. First liquid processing robot; 12. Second liquid processing robot; 13. Third liquid processing robot; 14. Fourth liquid processing robot; 15. Fifth liquid processing robot; 16. Sixth liquid processing robot; 17. First coating unit; 18. Second coating unit; 19. Developing unit; 110. Optical inspection unit; 201. First liquid treatment layer; 202. Second liquid treatment layer; 203. Third liquid treatment layer; 204. Fourth liquid treatment layer; 205. Fifth liquid treatment layer; 206. Sixth liquid treatment layer; 207. Workstation tower; 21. First inter-layer robot; 22. Second inter-layer robot; 31. First heat treatment robot arm; 32. Second heat treatment robot arm; 33. Third heat treatment robot arm; 34. Fourth heat treatment robot arm; 35. Fifth heat treatment robot arm; 36. Sixth heat treatment robot arm; 37. First baking unit; 38. Second baking unit; 39. Edge exposure unit; 310. Fourth baking unit; 311. Third baking unit; 401. First heat treatment layer; 402. Second heat treatment layer; 403. Third heat treatment layer; 404. Fourth heat treatment layer; 405. Fifth heat treatment layer; 406. Sixth heat treatment layer; 41. First interface robot arm; 42. Second interface robot arm; 43. Third interface robot arm; 44. Back wash unit; 45. Front wash unit; 46. Buffer unit; 47. Photolithography pre-cooling disc; 48. Photolithography machine; 501. Wafer loading unit; 502. Wafer return loading unit; 51. Marking and identification unit; 52. Adhesion unit; 6. Interface Tower; 61. First Chip Box Temporary Storage Unit; 62. Second Chip Box Temporary Storage Unit; 63. First Inter-Layer Station; 64. Second Inter-Layer Station; 65. Third Inter-Layer Station; 66. Fourth Inter-Layer Station; 67. Fifth Inter-Layer Station; 68. First Interface Temporary Storage Unit; 69. Second Interface Temporary Storage Unit; 610. Third Interface Temporary Storage Unit; 611. Fourth Interface Temporary Storage Unit; 612. Fifth Interface Temporary Storage Unit; 613. Sixth Inter-Layer Station; 614. Seventh Inter-Layer Station; 615. Eighth Inter-Layer Station; 616. Ninth Inter-Layer Station; 617. Third Chip Box Temporary Storage Unit; 71. First interlayer cooling unit; 72. Second interlayer cooling unit; 73. Third interlayer cooling unit; 74. Fourth interlayer cooling unit; 75. Fifth interlayer cooling unit; 76. Sixth interlayer cooling unit; 77. Seventh interlayer cooling unit; 78. Eighth interlayer cooling unit; 79. Ninth interlayer cooling unit. Detailed Implementation

[0042] Unless otherwise defined, the technical or scientific terms used in this specification shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. Specific embodiments of this invention will be described below with reference to the accompanying drawings. It should be noted that, in order to provide a concise description, this specification cannot provide a detailed description of all features of the actual embodiments. Without departing from the spirit and scope of this invention, those skilled in the art can make modifications and substitutions to the embodiments of this invention, and the resulting embodiments are also within the protection scope of this invention.

[0043] like Figure 1As shown, the first embodiment of this utility model provides a coating and developing apparatus, including: a first process module 10, an interlayer module 20, and a second process module 30; the first process module 10 includes N first process layers, where N is a positive integer greater than 4, and each first process layer includes a first process robot and M first process units, where M is a positive even number; the first process robot is used to feed a wafer into a first process unit and then remove it; the first process unit is used to perform one of the following processes on the wafer: coating process, developing process, and optical inspection process; the M first process units are symmetrically arranged on both sides of the first process robot; the second process module 30 includes N second process layers, each of which includes a first process robot and an interlayer module 20. The second process layer includes a second process robot and M second process units. The second process robot is used to feed the wafer into the second process unit and then remove it. The second process unit is used to perform one of the following processes on the wafer: baking and edge exposure. The M second process units are symmetrically arranged on both sides of the second process robot. The interlayer module 20 is located between the first process module 10 and the second process module 30. The interlayer module 20 includes an interlayer robot and an interlayer cooling unit. The interlayer robot is used to feed the wafer that has passed through the second process module 30 into the interlayer cooling unit and then remove it. The interlayer cooling unit is used to cool the wafer to a preset temperature to meet the process requirements of the first process unit.

[0044] In some embodiments, the number of interlayer robots is 2; the 2 interlayer robots, M first process units, M second process units, and are symmetrically distributed in two columns about a symmetry plane; the symmetry plane passes through the line connecting the axis of the first process robot and the axis of the second process robot.

[0045] In some examples, M is 8, and the two interlayer robots, 8 first process units, and 8 second process units are symmetrically distributed about the same symmetry plane, forming two parallel process paths; wherein, the symmetry plane passes through the line connecting the axis of the first process robot and the axis of the second process robot, and the line is perpendicular to the extension direction of the two process paths; each column contains one interlayer robot, 4 first process units, and 4 second process units to achieve parallel processing in two columns.

[0046] like Figure 2 and Figure 3As shown, in another example, the two interlayer robotic arms are a first interlayer robotic arm 21 and a second interlayer robotic arm 22. A workstation tower 207 is provided between the first interlayer robotic arm 21 and the second interlayer robotic arm 22. The workstation tower 207 is fixed with a first interlayer workstation 63, a second interlayer workstation 64, a third interlayer workstation 65, a fourth interlayer workstation 66, a fifth interlayer workstation 67, a sixth interlayer workstation 613, a seventh interlayer workstation 614, an eighth interlayer workstation 615, a ninth interlayer workstation 616, a first interlayer cooling unit 71, a second interlayer cooling unit 72, a third interlayer cooling unit 73, a fourth interlayer cooling unit 74, a fifth interlayer cooling unit 75, a sixth interlayer cooling unit 76, a seventh interlayer cooling unit 77, an eighth interlayer cooling unit 78, and a ninth interlayer cooling unit 79.

[0047] In some other examples, the first interlayer manipulator 21 and the second interlayer manipulator 22 can move synchronously in mirror motion or move independently.

[0048] In some embodiments, both the first process robot and the second process robot include a translation unit and P actuators, where P is a positive integer greater than 1; the P actuators are used to rotate independently about the axis of their respective robot; the translation unit is used to push the axis of the robot to translate along the direction of the connecting line.

[0049] In some specific embodiments, the translation unit includes a linear motor or a lead screw drive mechanism. In some examples, the translation unit is a linear motor, the housing of which is fixedly mounted on the robot support base. The spindle of the linear motor is used to control the lateral displacement of the robot. Through this translation function, the robot can move its axis laterally along the plane of symmetry, thereby expanding the working range and satisfying access to the same row of process units.

[0050] In some examples, each actuator is configured with an independent drive motor and rotary joint, supporting multiple actuators to simultaneously grab or release wafers, enabling parallel wafer transfer across multiple workstations. For instance, the rotation of the actuators can also facilitate access from the first process cell to the second process cell. After one actuator removes a wafer from the first process cell, another actuator can send another wafer into the first process cell, avoiding idleness in the first process cell and improving processing efficiency within a single layer.

[0051] In other examples, P=2 or P=4, and the actuators are arranged symmetrically to ensure the dynamic balance of the robot during rotation and movement, reduce vibration, and improve positioning accuracy.

[0052] In other examples, the control module coordinates the rotation of P actuators and the movement of translation units based on the idle status of each process unit and the wafer flow requirements, realizing a combined rotation and translation motion. This allows the robot to flexibly access M symmetrically distributed process units within this layer, optimize the wafer transfer path, and shorten the process cycle time.

[0053] In some examples, the connections are along the X direction, N first process layers are arranged in a row along the Z direction, and the actuators extend or shorten along the Y direction to remove wafers from or place wafers into the process cells directly opposite them. The X, Y, and Z directions are perpendicular to each other.

[0054] In some embodiments, the coating and developing apparatus further includes an interface module 40, which is located at one end of the second process module 30 away from the interlayer module 20. The interface module 40 is provided with a back washing unit 44 and an interface robot. The interface robot is used to feed the wafer into the back washing unit 44 and then move it out to the lithography machine 48. The back washing unit 44 is used to perform a back washing process on the wafer.

[0055] In some examples, the backwash unit 44 is used to clean the back side of the wafer, removing photoresist residue or contaminants adhering to the back side of the wafer, preventing them from contaminating the wafer stage of the lithography machine 48 during subsequent edge exposure, and ensuring edge exposure accuracy and equipment cleanliness.

[0056] In some examples, a buffer unit 46 is provided between the backwash unit 44 and the lithography machine 48. This buffer unit 46 is used to temporarily store wafers that have completed the backwash process, providing waiting space when the lithography machine 48 is not yet ready, and avoiding wafer transfer blockages due to mismatched cycle times. The buffer unit 46 can hold multiple wafers and supports first-in-first-out or priority scheduling strategies, improving system scheduling flexibility. After the interface robot removes the wafer from the backwash unit 44, it is temporarily stored in the buffer unit 46, and the transfer continues when the lithography machine 48 is idle. This design effectively decouples the real-time synchronization requirements of the coating and developing unit and the lithography machine 48, improves the overall line throughput efficiency, and provides emergency buffering capabilities during short-term shutdowns of the lithography machine 48, reducing the risk of process interruptions.

[0057] In some other examples, a pre-lithography cooling pad 47 is also provided between the backwash unit 44 and the lithography machine 48. The pre-lithography cooling pad 47 is used to cool the wafer before it enters the lithography machine 48 for edge exposure, stabilizing its temperature within the required process range. The pre-lithography cooling pad 47 achieves rapid thermal equalization through built-in cooling elements or cooling channels, eliminating the heat accumulated on the wafer during baking and transport. A temperature-stabilized wafer reduces overlay errors caused by thermal expansion, improving edge exposure accuracy.

[0058] In some embodiments, the interface module 40 is provided with a forward washing unit 45; the interface robot is used to feed the wafer into the lithography machine 48 and then move it out to the forward washing unit 45; the forward washing unit 45 is used to perform a forward washing process on the wafer.

[0059] It is worth noting that the interface robot is configured as follows: after the wafer is fed into the lithography machine 48 to complete the edge exposure process, the wafer is taken out from the output port of the lithography machine 48 and transferred to the forward cleaning unit 45 to perform the forward cleaning process; after cleaning is completed, the interface robot removes the wafer from the forward cleaning unit 45 and sends it back to the second process module 30 or the interlayer module 20.

[0060] In some examples, the forward cleaning process is only applied to the edge ring or center excision area on the front side of the wafer, using a point-spraying method to apply deionized water or special cleaning solution to avoid affecting the pattern integrity of the already exposed edge areas.

[0061] In some embodiments, the interface module 40 is further provided with an interface temporary storage unit; the interface temporary storage unit is used to store wafers to be fed into the lithography machine 48, wafers to be back-washed, and wafers that have been back-washed at different workstations; the interface robot is used to feed the wafers into the interface temporary storage unit and then remove them.

[0062] It is worth noting that the interface robot is configured to dynamically schedule the transmission path of the wafer between the back washing unit 44, the interface temporary storage unit, and the input port of the lithography machine 48 based on the current process flow requirements, the idle status of the back washing unit 44, and the reservation status of the lithography machine 48. Specifically, this includes: temporarily storing the wafer that has completed the processing of the second process module 30 in the interface temporary storage unit, and sending it to the back washing unit 44 for back washing when it becomes idle; temporarily storing the back-washed wafer in the interface temporary storage unit, waiting for the lithography machine 48 to complete the edge exposure of the previous wafer and release the port; and taking out the wafer to be processed from the interface temporary storage unit and sending it to the back washing unit 44 or directly transferring it to the lithography machine 48.

[0063] In some specific embodiments, the number of interface robots is 3, specifically a first interface robot 41, a second interface robot 42, and a third interface robot 43.

[0064] like Figure 1 , Figure 2 and Figure 4As shown, in some examples, the first interface robot 41 is used to sequentially transfer the wafers that have undergone edge exposure from the second process robot to the first interface temporary storage unit 68, the back washing unit 44, and the cache unit 46. The third interface robot 43 is used to sequentially transfer the wafers in the cache unit 46 to the pre-lithography cold plate 47, the lithography machine 48, and the second interface temporary storage unit 69. The second interface robot 42 is used to transfer the wafers in the second interface temporary storage unit 69 to the forward washing unit 45, and to transfer the wafers in the forward washing unit 45 to the third interface temporary storage unit 610, the fourth interface temporary storage unit 611, or the fifth interface temporary storage unit 612.

[0065] In other examples, the first interface robot 41 and the second interface robot 42 can be used interchangeably to meet the needs of mass production and avoid downtime caused by the failure of one of them.

[0066] In some other examples, the cache unit 46, the first interface temporary storage unit 68, the second interface temporary storage unit 69, the third interface temporary storage unit 610, the fourth interface temporary storage unit 611, and the fifth interface temporary storage unit 612 are all integrated on the interface tower 6 and arranged in a row along the z direction.

[0067] In some embodiments, the interlayer module 20 further includes an interlayer station; the interlayer station is used to store wafers; the interlayer robot is also used to feed wafers into or remove them from the interlayer station.

[0068] Specifically, the interface temporary storage unit supports the following multiple storage modes: When the backwash unit 44 is processing other wafers, the interface robot first temporarily stores the wafer from the second process module 30 in the interface temporary storage unit, and then sends it in when the backwash unit 44 is idle; after the wafer completes the backwash process, if the lithography machine 48 is still processing the previous wafer, the interface robot temporarily stores it in the interface temporary storage unit to achieve "edge exposure port waiting" buffer; for special process flows that do not require backwashing (such as test wafers or customized processes), the wafer can be directly temporarily stored in the interface temporary storage unit, waiting for the lithography machine 48 to schedule it, avoiding occupying the resources of the backwash unit 44; when the lithography machine 48 experiences a short-term failure or communication interruption, the interface temporary storage unit can serve as a temporary buffer area to prevent high-temperature wafers from staying in the second process module 30 for a long time and reduce the risk of thermal damage.

[0069] In some examples, the control module dynamically generates the optimal scheduling strategy based on the job queue of the lithography machine 48, the processing cycle of the backwash unit 44, and the current wafer process type, and coordinates the access order of the interface robot to the wafers in the temporary storage unit to improve the overall utilization of each process unit.

[0070] In some embodiments, the number of first process robots in each first process layer is a positive integer greater than 1, used for parallel transfer of wafers in the first process layer.

[0071] In some examples, when there are many first process units or dense process flows in a certain layer, multiple first process robots can operate simultaneously: while one first process robot takes out a wafer from a certain process unit, another first process robot feeds a wafer into another process unit, realizing true multi-station parallel wafer transfer and significantly shortening the cycle time of a single layer.

[0072] In other examples, multiple first-process robots are uniformly scheduled by the same control module. Tasks are dynamically allocated based on the idle status of each process unit, wafer flow priority, and wafer transfer path conflict prediction to avoid motion interference between robots.

[0073] In other examples, multiple first-process robotic arms support a hot backup mode: when one robotic arm fails, the remaining robotic arms can take over the wafer transfer tasks within their service area, improving system reliability and equipment availability.

[0074] In some other examples, the working areas of multiple first-process robots partially overlap, allowing for flexible task switching under high load conditions and enhancing the system's scheduling flexibility and fault tolerance.

[0075] In some embodiments, the N first process layers include at least two resist coating layers, at least two developing layers, and at least one optical detection layer; each resist coating layer includes a first resist coating unit 17 and a second resist coating unit 18; the first resist coating unit 17 is used to perform a first resist coating process on the wafer; the second resist coating unit 18 is used to perform a second resist coating process on the wafer; the developing layer includes a developing unit 19 for performing a developing process on the wafer; the optical detection layer includes an optical detection unit 110 for performing an optical detection process on the wafer.

[0076] In a specific embodiment, N is 6, and the 6 first process layers include 2 resist layers, 3 developing layers, and 1 optical detection layer; the first resist coating unit 17 is used to apply an anti-reflective coating to the wafer surface. The second resist coating unit 18 is used to apply a photoresist layer to the wafer surface. The photoresist layer is located on the anti-reflective coating.

[0077] like Figure 5As shown, in some examples, the two coating layers are a first liquid treatment layer 201 and a second liquid treatment layer 202, the three developing layers are a fourth liquid treatment layer 204, a fifth liquid treatment layer 205 and a sixth liquid treatment layer 206, and the one optical detection layer is a third liquid treatment layer 203. The first liquid treatment layer 201 is equipped with a first liquid treatment robot 11; the second liquid treatment layer 202 is equipped with a second liquid treatment robot 12; the third liquid treatment layer 203 is equipped with a third liquid treatment robot 13; the fourth liquid treatment layer 204 is equipped with a fourth liquid treatment robot 14; the fifth liquid treatment layer 205 is equipped with a fifth liquid treatment robot 15; and the sixth liquid treatment layer 206 is equipped with a sixth liquid treatment robot 16.

[0078] In some embodiments, the N second process layers include at least two first baking layers, at least two second baking layers, and at least one edge exposure layer; each first baking layer includes a first baking unit 37 and a second baking unit 38; the first baking unit 37 is used to perform a first baking process on the wafer; the second baking unit 38 is used to perform a second baking process on the wafer; each second baking layer includes a third baking unit 311 and a fourth baking unit 310; the third baking unit 311 is used to perform a third baking process on the wafer; the fourth baking unit 310 is used to perform a fourth baking process on the wafer; the edge exposure layer includes an edge exposure unit 39, which is used to perform an edge exposure process on the wafer.

[0079] In a specific embodiment, the six second process layers include two first baking layers, three second baking layers, and one edge exposure layer; the first baking unit 37 is used to bake the anti-reflective coating. The second baking unit 38 is used to bake the photoresist layer. The third baking unit 311 is used to bake the wafer after the development process to solidify the photoresist pattern.

[0080] like Figure 6 As shown, in some examples, the two first baking layers are the first heat treatment layer 401 and the second heat treatment layer 402, the three second baking layers are the fourth heat treatment layer 404, the fifth heat treatment layer 405 and the sixth heat treatment layer 406, and the one edge exposure layer is the third heat treatment layer 403. Specifically, the first heat treatment layer 401 is equipped with a first heat treatment robot 31; the second heat treatment layer 402 is equipped with a second heat treatment robot 32; the third heat treatment layer 403 is equipped with a third heat treatment robot 33; the fourth heat treatment layer 404 is equipped with a fourth heat treatment robot 34; the fifth heat treatment layer 405 is equipped with a fifth heat treatment robot 35; and the sixth heat treatment layer 406 is equipped with a sixth heat treatment robot 36.

[0081] In other examples, the second baking layer also includes a fourth baking unit 310 for baking the wafer after the forward washing process.

[0082] In some embodiments, the coating and developing apparatus further includes a wafer cassette module 50; the wafer cassette module 50 is located at one end of the first process module 10 away from the interlayer module 20; the wafer cassette module 50 includes a loading unit for storing wafers; the wafer cassette module 50 also includes a wafer cassette robot for feeding wafers into the loading unit or removing wafers from the loading unit.

[0083] In some examples, the number of loading units is two, configured as an infeed loading unit 501 and a return loading unit 502. The infeed loading unit 501 is used to load wafers to be coated and developed. The return loading unit 502 is used to load wafers that have completed coating and development.

[0084] In some embodiments, the wafer cassette module 50 further includes a marker recognition unit 51 for detecting alignment marks on the wafer edge. In some examples, the alignment marks are notches, and in other examples, they are flat edges.

[0085] In some embodiments, the wafer cassette module 50 further includes an adhesion enhancement unit 52, which is used to spray an adhesion enhancement layer onto the wafer surface to enhance the adhesion between the photoresist and the wafer surface.

[0086] In some examples, the adhesion-enhancing unit 52 is equipped with a nozzle, a heating platform, and an exhaust system to uniformly spray hexamethyldisilazane (HMDS) onto the wafer surface, forming a monomolecular adhesion-enhancing layer. This layer reduces the polarity of the hydroxyl groups on the silicon wafer surface through a chemical reaction, improving the wettability and adhesion stability of the photoresist and preventing defects such as film peeling and edge lifting during subsequent baking or development.

[0087] In some embodiments, the wafer cassette module 50 further includes a first wafer cassette temporary storage unit 61, a second wafer cassette temporary storage unit 62, and a third wafer cassette temporary storage unit 617. The first wafer cassette temporary storage unit 61 and the second wafer cassette temporary storage unit 62 are used to temporarily store wafers transferred from the bonding unit 52 to the first process module 10. The third wafer cassette temporary storage unit 617 is used to temporarily store wafers transferred from the optical inspection unit 110 to the wafer loading unit 501.

[0088] like Figure 7 As shown, the second embodiment of this utility model provides a control method for a coating and developing apparatus. The coating and developing apparatus includes a first process module 10, an interlayer module 20, and a second process module 30. The first process module 10 includes N first process layers, each first process layer having a first process robot and M symmetrically distributed first process units. The second process module 30 includes N second process layers, each second process layer having a second process robot and M symmetrically distributed second process units. The interlayer module 20 includes an interlayer robot and an interlayer cooling unit. The control method includes the following steps S1-S5: S1, monitor the process status of each first process unit in the first process module 10, schedule the first process robot to transfer wafers in parallel between M first process units in the first process layer, and perform at least one of the processes of coating, developing and optical inspection.

[0089] S2, monitor the process status of each second process unit in the second process module 30, schedule the second process robot to transfer wafers in parallel between M second process units in the second process layer, and perform at least one process of baking and edge exposure.

[0090] S3, after the wafer has been processed by the first process module, control the interlayer robot to take it out of the first process module and send it into the workstation in the interlayer module, and transfer the wafer on the workstation to the second process module.

[0091] S4. After the wafer completes the processing of the second process module 30, the interlayer robot is controlled to remove it from the second process module 30 and send it into the interlayer cooling unit for cooling, so that the wafer temperature drops to the preset temperature that meets the process requirements of the first process module 10.

[0092] S5 dynamically schedules the timing of inter-layer robotic arms moving or temporarily storing wafers based on the process cycle time of each process module, in order to improve the efficiency of parallel processing of wafers among process modules.

[0093] In some embodiments, the interlayer module 20 is configured with two interlayer robots, and the two interlayer robots, M first process units and M second process units are symmetrically distributed in two columns about a symmetry plane; the control method further includes: coordinating the two interlayer robots to work in parallel on both sides of the symmetry plane, processing wafers in different columns respectively, so that the parallel processing cycle of the first process module 10 and the second process module 30 is matched; the symmetry plane passes through the line connecting the axis of the first process robot and the axis of the second process robot.

[0094] In some embodiments, both the first process robot and the second process robot include a translation unit and P actuators, where P is a positive integer greater than 1; the control method further includes: controlling the P actuators to rotate simultaneously around the axis of their respective robot; controlling the translation unit to push the robot axis to translate along a direction perpendicular to the plane of symmetry or along the direction of the connecting line; when one actuator picks up the processed wafer, the other actuator releases the wafer to be processed.

[0095] In some examples, the control method includes coordinating two interlayer robots to work on both sides of a symmetry plane, with the option of synchronous or asynchronous operation. In synchronous mode, the two robots simultaneously perform mirror actions, such as simultaneously feeding wafers to the baking unit, to match the equal-rhythm processing requirements of the dual-row process modules and improve overall efficiency. In asynchronous mode, each robot supports parallel processing of different process paths based on the idle status of the process unit in its corresponding row, the wafer flow type (e.g., rework, skipping steps), or independent scheduling according to preset priorities.

[0096] In some embodiments, the coating and developing apparatus further includes an interface module 40 located at one end of the second process module 30 away from the interlayer module 20; the control method further includes: controlling the interface robot in the interface module 40 to send the wafer that has completed the edge exposure process into the back washing unit 44 for back washing, and after the back washing is completed, moving the wafer out to the lithography machine 48 so that the wafer enters the lithography process after the back washing is completed.

[0097] In some examples, the control method further includes: controlling the interface robot to receive the wafer that has completed the edge exposure process from the second process module 30 and transfer it to the back washing unit 44 for back-side cleaning. The back washing process is used to remove particulate contaminants or residual photoresist attached to the back of the wafer, preventing them from contaminating the stage of the lithography machine 48 or affecting the focusing accuracy. After the back washing is completed, the control system determines the current status of the lithography machine 48. If the lithography machine 48 is idle or ready, the control interface robot removes the wafer from the back washing unit 44 and sends it into the input port of the lithography machine 48 to start the next stage of edge exposure or measurement process; if the lithography machine 48 is busy, the wafer can be temporarily stored in the buffer unit 46 in the interface module 40 and transferred when the time is right.

[0098] In some embodiments, the control method further includes: controlling the interface robot to take the wafer out of the lithography machine 48 and send it into the forward washing unit 45 for forward washing process after the wafer is fed into the lithography machine 48.

[0099] In some embodiments, the interface module 40 is provided with an interface temporary storage unit; the control method further includes: controlling the interface robot to temporarily store the wafer to be fed into the lithography machine 48, the wafer to be back-washed, or the wafer that has completed back-washing in the interface temporary storage unit; and dynamically scheduling the interface robot to take out the wafer from the interface temporary storage unit based on the idle state of the lithography machine 48 and the back-washing unit 44, so that the transmission of the wafer in the interface module 40 is synchronized with the processing state of the lithography machine 48.

[0100] In some embodiments, the system controls the real-time acquisition of the operating status of the lithography machine 48 and the occupancy status of the backwash unit 44, and dynamically schedules the wafer transfer operation of the interface robot based on this status information. For example, when the lithography machine 48 is processing the previous wafer, subsequent wafers can be temporarily stored in the interface temporary storage unit to avoid waiting and blocking; when the backwash unit 44 is busy, wafers that have completed edge exposure can be stored in the temporary storage position and processed after the backwash unit becomes available.

[0101] The scheduling strategy supports first-in-first-out, preset priority scheduling, or predictive scheduling to ensure that the flow of wafers in the interface module 40 is synchronized with the processing rhythm of the lithography machine 48.

[0102] In some examples, the preset priority scheduling prioritizes rework wafers; predictive scheduling is based on the lithography machine's exposure cycle to predict idle time.

[0103] It is worth noting that this temporary storage and dynamic scheduling mechanism enables the timing matching between the coating and developing unit and the lithography machine 48, improving the overall throughput efficiency, reducing the waiting time of the robotic arm, and providing buffering capacity during short shutdowns of the lithography machine 48, thus ensuring process continuity and system stability.

[0104] In some embodiments, the interlayer module 20 further includes an interlayer station; the control method further includes: when the first process module 10 is currently unable to receive the wafer, controlling the interlayer robot to temporarily store the cooled wafer at the interlayer station; when the first process module 10 is idle, controlling the interlayer robot to take out the wafer from the interlayer station and send it into the first process module 10, so that the wafer can be temporarily stored and subsequently transferred in the interlayer module 20.

[0105] In some examples, the resource status of the first process module 10 is continuously monitored during the temporary storage period. Once a first process unit or first process robot is detected to be idle, and the current wafer meets the wafer transfer conditions, the system schedules the interlayer robot to retrieve the wafer from the interlayer station and send it to the target process unit to continue performing coating, development, or other liquid processing processes. This mechanism realizes the buffered storage and on-demand scheduling of wafers in the interlayer module 20, avoiding the wafer from being stuck in a high-temperature state for a long time due to mismatch in processing capabilities between modules or instantaneous congestion. This effectively improves the system throughput, enhances process flexibility, and supports the stable operation of complex process paths such as multiple exposures and rework.

[0106] In some embodiments, the ability to receive wafers is determined by real-time monitoring of the resource status of the first process module 10. Specifically, when the interlayer robot prepares to transfer a cooled wafer to the first process module, the occupancy status of each process unit within the module is first checked. If all process units are in operation or maintenance mode, the first process module 10 is determined to be unable to receive wafers at present. Secondly, the system checks whether the process robot within the first process module is idle: if it is performing other wafer loading, unloading, or movement tasks, even if a process unit is idle, it cannot be handed over immediately, and the system also determines that the first process module 10 is currently unable to receive wafers.

[0107] In addition, it is necessary to verify whether the wafer transfer conditions, such as the wafer process recipe and the completion status of the preceding steps, are met. If the current configuration of the first process module 10 does not match the wafer process, or if the module is in a process switching state, it is also determined that the wafer cannot be received. The above status information is synchronized in real time through a communication protocol. The communication protocol includes the Semiconductor Equipment Communications Standard (SECS) or Generic Equipment Model (GEM). When it is determined that the first process module cannot receive the wafer based on the above conditions, the interlayer robot is controlled to temporarily store the wafer at the interlayer station. After detecting that the process unit or robot is idle and the wafer transfer conditions are met, the robot is then scheduled to take out the wafer and send it to the target process unit, thereby realizing intelligent buffering and efficient wafer transfer.

[0108] In some embodiments, each first process layer is configured with multiple first process robots; the control method further includes: controlling the multiple first process robots to work collaboratively within the layer, respectively scheduling the wafer to enter the coating unit, developing unit 19 or optical inspection unit 110, so that multiple process units within a single layer can operate in parallel.

[0109] In some examples, the first process layer is divided into multiple logical work areas, with each first process robot primarily responsible for accessing process cells within a specific area. For instance, one robot is responsible for feeding the wafer into the photoresist coating unit for photoresist coating, while another robot removes the developed wafer from the developing unit 19 and moves it to the optical inspection unit 110 for film thickness or defect detection. Multiple robots can operate simultaneously, avoiding cycle time delays caused by a single robot transporting materials along a long path.

[0110] In some embodiments, the N first process layers include at least two coating layers; each coating layer is provided with a first coating unit 17 and a second coating unit 18; the N second process layers include at least two first baking layers and at least one edge exposure layer; each first baking layer is provided with a first baking unit 37 and a second baking unit 38; the interlayer module 20 further includes an interlayer station; the edge exposure layer is provided with a baking unit; the control method further includes: controlling the first process robot, the second process robot and the interlayer robot to transfer the wafer, so that the wafer is sequentially coated with an anti-reflective coating in the first coating unit 17, stored in the first interlayer station, cured with an anti-reflective coating in the first baking unit 37, cooled in the first interlayer cooling unit, coated with a photoresist layer in the second coating unit 18, stored in the second interlayer station, cured with a photoresist layer in the second baking unit 38, cooled in the second interlayer cooling unit, and edge exposed in the edge exposure unit 39.

[0111] In some specific embodiments, the control method includes controlling a first process robot to pick up a wafer from the wafer cassette robot in the wafer cassette module 50, feed it into the first coating unit 17, and then move it out to an interlayer robot; controlling the interlayer robot to feed the wafer into the first interlayer station and then move it out to a second process robot; controlling the second process robot to feed the wafer into the first baking unit 37 and then move it out to an interlayer robot; controlling the interlayer robot to feed the wafer into the first interlayer cooling unit and then move it out to the first process robot; controlling the first process robot to feed the wafer into the second coating unit 18 and then move it out to an interlayer robot; controlling the interlayer robot to feed the wafer into the second interlayer station and then move it out to a second process robot; controlling the second process robot to feed the wafer into the second baking unit 38 and then move it out to an interlayer robot; controlling the interlayer robot to feed the wafer into the second interlayer cooling unit and then move it out to a second process robot; and controlling the second process robot to feed the wafer into the edge exposure unit 39 and then move it to the interface robot in the interface module 40.

[0112] In some examples, the first interlayer station is the second interlayer station 64 or the fourth interlayer station 66, the second interlayer cooling unit is the fourth interlayer station 66 or the third interlayer station 65, the first interlayer cooling unit is the first interlayer refrigeration unit 71 or the second interlayer refrigeration unit 72, and the second interlayer cooling unit is the third interlayer refrigeration unit 73.

[0113] In some embodiments, the N first process layers include at least two developing layers and one optical detection layer; each developing layer is provided with a developing unit 19; each optical detection layer is provided with an optical detection unit 110; the N second process layers include at least two second baking layers; each second baking layer is provided with a third baking unit 311 and a fourth baking unit 310; the control method further includes: controlling the first process robot, the second process robot and the interlayer robot to transfer the wafer, so that the wafer is sequentially baked in the third baking unit 311, cooled in the third interlayer cooling unit, developed in the developing unit 19, stored in the third interlayer station, baked in the fourth baking unit 310, cooled in the fourth interlayer cooling unit, stored in the fourth interlayer station, and optically detected in the optical detection unit 110.

[0114] In some specific embodiments, the control method includes controlling a second process robot to pick up a wafer from the interface robot of the interface module 40 and send it to the third baking unit 311, then to the interlayer robot; controlling the interlayer robot to send the wafer to the third interlayer cooling unit and then to the first process robot; controlling the first process robot to send the wafer to the developing unit 19 and then to the interlayer robot; controlling the interlayer robot to send the wafer to the third interlayer station and then to the second process robot; controlling the second process robot to send the wafer to the fourth baking unit 310 and then to the interlayer robot; controlling the interlayer robot to send the wafer to the fourth interlayer cooling unit and then to the fourth interlayer station and then to the first process robot; and controlling the first process robot to send the wafer to the optical inspection unit 110 and then to the wafer cassette robot in the wafer cassette module 50.

[0115] In some examples, the third interlayer station is the ninth interlayer station 616, the tenth interlayer station, or the eleventh interlayer station; the fourth interlayer station is the fifth interlayer station 67 or the eighth interlayer station 615; the third interlayer cooling unit is the fourth interlayer refrigeration unit 74, the sixth interlayer refrigeration unit 76, or the eighth interlayer refrigeration unit 78; and the fourth interlayer cooling unit is the fifth interlayer refrigeration unit 75, the seventh interlayer refrigeration unit 77, or the ninth interlayer refrigeration unit 79.

[0116] In some embodiments, the coating and developing apparatus further includes a wafer cassette module 50 located at one end of the first process module 10 away from the interlayer module 20; the control method further includes: controlling the wafer cassette robot to take the wafer out of the loading unit and send it into the first process module 10 for initial processing; or sending the wafer processed in the first process module 10 back to the loading unit, so that the wafer can be bidirectionally transferred between the wafer cassette module 50 and the process module.

[0117] In some examples, the number of wafer cassette robots is three, specifically a first wafer cassette robot 1, a second wafer cassette robot 2, and a third wafer cassette robot 3. The first wafer cassette robot 1 is used to sequentially deliver the wafers from the wafer loading unit 501 to the marking and identification unit 51, the bonding unit 52, and the wafer cassette temporary storage unit; the wafer cassette temporary storage unit includes a first wafer cassette temporary storage unit 61 and a second wafer cassette temporary storage unit 62.

[0118] In other examples, the second wafer cassette robot 2 is used to transfer the optically inspected wafer from the first process robot to the third wafer cassette storage unit 617, and to transfer the wafer in the third wafer cassette storage unit 617 to the third wafer cassette storage unit 617.

[0119] In other examples, the third wafer cassette robot 3 is used to move wafers from the overhead crane to the wafer loading unit 501; and to move wafers from the wafer return loading unit 502 to the overhead crane.

[0120] In some embodiments, the control method further includes: before the wafer enters the first process module 10, controlling the mark recognition unit 51 to detect the alignment marks on the edge of the wafer and obtain the detection result; based on the detection result, controlling the wafer cassette robot or the first process robot to rotate and align the wafer so that the wafer enters the subsequent process unit in the target direction.

[0121] It is worth noting that by detecting the edge alignment marks of the wafer before it enters the first process module 10, and controlling the robot to rotate and align it based on the detection results, the wafer is ensured to enter the subsequent process unit in the target direction. This effectively avoids abnormal coating, pattern offset or overlay error caused by orientation error, improves process accuracy and automation level, and enhances the equipment's compatibility with different wafer specifications, ensuring the stability and yield of the process flow.

[0122] In some embodiments, the control method further includes: controlling the adhesion enhancement unit 52 to spray an adhesion enhancer onto the wafer surface; after spraying, controlling the wafer cassette robot or the first process robot to send the wafer into the coating unit for coating process, so that the adhesion enhancement process and the coating process are executed sequentially.

[0123] It is worth noting that by spraying an adhesion promoter onto the wafer surface before coating, and automatically scheduling a robotic arm to feed the wafer into the coating unit, the adhesion promoter and coating process are continuously and automatically connected. This effectively enhances the adhesion between the photoresist and the wafer surface, improves the uniformity of the photoresist film, reduces process abnormalities caused by defects such as photoresist delamination and edge lifting, and improves pattern quality and process stability. It is especially suitable for high-precision photolithography and advanced processes with strict interface bonding requirements.

[0124] The third embodiment of this utility model provides a coating and developing device, including a control module, a first process module 10, an interlayer module 20, and a second process module 30; the control module is electrically connected to the robotic arm and process unit in the first process module 10, the interlayer module 20, and the second process module 30, and is used to implement the method of any of the above embodiments.

[0125] In some examples, the control module is the central control system of the coating and developing equipment, including an industrial computer, a programmable logic controller or motion control unit, and supporting input / output interface modules and communication buses. This control module is electrically connected to the robotic arms and various process units in the first process module, the interlayer module, and the second process module, receiving real-time status signals from sensors and sending operating instructions to the robotic arms and each process unit.

[0126] The fourth embodiment of this utility model provides a computer-readable storage medium storing a computer program thereon, characterized in that when the executable computer program in the storage medium is executed by a processor, it can implement any of the control methods in the above embodiments.

[0127] The fifth embodiment of this utility model provides a computer program product, including a computer program, characterized in that the computer program, when executed by a processor, implements the method of any one of the above embodiments.

[0128] In this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "multiple" refers to two or more unless otherwise expressly defined.

[0129] The above description of the embodiments is intended to enable those skilled in the art to understand and apply the present invention. It will be apparent to those skilled in the art that various modifications can be easily made to these embodiments, and the general principles described herein can be applied to other embodiments without creative effort. Therefore, the present invention is not limited to the embodiments described herein, and any improvements and modifications made by those skilled in the art based on the disclosure of the present invention without departing from the scope and spirit of the present invention are within the scope of the present invention.

Claims

1. A coating and developing apparatus, characterized in that, include: First process module, interlayer module, and second process module; The first process module includes N first process layers, where N is a positive integer greater than 4. Each first process layer includes a first process robot and M first process units, where M is a positive even number. The first process robot is used to feed the wafer into the first process unit and then remove it. The first process unit is used to perform one of the following processes on the wafer: coating process, developing process, and optical inspection process; M first process units are symmetrically arranged on both sides of the first process robot; The second process module includes N second process layers, each second process layer including a second process robot and M second process units; the second process robot is used to feed the wafer into the second process unit and then remove it; The second process unit is used to perform one of the following processes on the wafer: baking process and edge exposure process; M second process units are symmetrically arranged on both sides of the second process robot; The interlayer module is located between the first process module and the second process module. The interlayer module includes an interlayer robot and an interlayer cooling unit. The interlayer robot is used to feed the wafer that has passed through the second process module into the interlayer cooling unit and then remove it. The interlayer cooling unit is used to cool the wafer to a preset temperature to meet the process requirements of the first process unit.

2. The apparatus according to claim 1, characterized in that, The number of interlayer robots is 2; the 2 interlayer robots, the M first process units, the M second process units, and the two interlayer robots are symmetrically distributed in two columns about a symmetrical plane; the symmetrical plane passes through the line connecting the axis of the first process robot and the axis of the second process robot.

3. The apparatus according to claim 2, characterized in that, Both the first and second process robots include a translation unit and P actuators, where P is a positive integer greater than 1; the P actuators are used to rotate simultaneously around the axis of their respective robots; the translation unit is used to push the robot axis to translate along a direction perpendicular to the plane of symmetry or along the connecting line; when one actuator is used to pick up a processed wafer, the other actuator is used to release the wafer to be processed.

4. The apparatus according to claim 1, characterized in that, The coating and developing apparatus further includes an interface module, which is located at the end of the second process module away from the interlayer module. The interface module is equipped with a back washing unit and an interface robot. The interface robot is used to feed the wafer into the back washing unit and then move it out to the lithography machine. The back washing unit is used to perform a back washing process on the wafer.

5. The apparatus according to claim 4, characterized in that, The interface module includes a forward washing unit; the interface robot is used to feed the wafer into the lithography machine and then move it out to the forward washing unit; the forward washing unit is used to perform a forward washing process on the wafer.

6. The apparatus according to claim 4, characterized in that, The interface module is also equipped with an interface temporary storage unit; the interface temporary storage unit is used to store wafers to be fed into the lithography machine, wafers to be back-washed, and wafers that have been back-washed at different workstations; the interface robot is used to feed the wafers into the interface temporary storage unit and then remove them.

7. The apparatus according to claim 1, characterized in that, The interlayer module also includes an interlayer workstation; the interlayer workstation is used to store wafers; the interlayer robot is also used to feed wafers into or remove them from the interlayer workstation.

8. The apparatus according to claim 1, characterized in that, The number of first process robots in each of the first process layers is a positive integer greater than 1, used for parallel transfer of wafers in the first process layer.

9. The apparatus according to claim 1, characterized in that, The N first process layers include at least two resist coating layers, at least two developing layers, and at least one optical detection layer; each resist coating layer includes a first resist coating unit and a second resist coating unit; the first resist coating unit is used to perform a first resist coating process on the wafer; the second resist coating unit is used to perform a second resist coating process on the wafer; the developing layer includes a developing unit for performing a developing process on the wafer; the optical detection layer includes an optical detection unit for performing an optical detection process on the wafer.

10. The apparatus according to claim 1, characterized in that, The N second process layers include at least two first baking layers, at least two second baking layers, and at least one edge exposure layer; each first baking layer includes a first baking unit and a second baking unit; the first baking unit is used to perform a first baking process on the wafer; the second baking unit is used to perform a second baking process on the wafer; each second baking layer includes a third baking unit and a fourth baking unit; the third baking unit is used to perform a third baking process on the wafer; the fourth baking unit is used to perform a fourth baking process on the wafer; the edge exposure layer includes an edge exposure unit, which is used to perform an edge exposure process on the wafer.

11. The apparatus according to claim 1, characterized in that, The coating and developing apparatus further includes a wafer cassette module; the wafer cassette module is located at the end of the first process module opposite to the interlayer module; The wafer cassette module includes a loading unit for storing wafers; The wafer cassette module also includes a wafer cassette robot for feeding wafers into the loading unit or removing wafers from the loading unit.

12. The apparatus according to claim 11, characterized in that, The wafer cassette module also includes a marker recognition unit, which is used to detect alignment marks on the wafer edge, including notches or flat edges.

13. The apparatus according to claim 11, characterized in that, The wafer cassette module also includes an adhesion enhancement unit, which is used to spray an adhesion enhancement layer onto the wafer surface to enhance the adhesion between the photoresist and the wafer surface.

Images