A low-power supply board control circuit based on key triggering
Patent Information
- Application Number
- CN202522839024.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-31
- Publication Date
- 2026-10-30
- Estimated Expiration
- 2035-12-31
AI Technical Summary
[0002]如图6所示,常规的电源板控制电路待机状态下电源模块仍持续供电,导致电池损耗快,而且单一按键控制易出现误触发或无法彻底断电,缺乏“触发-维持-关断”的闭环低功耗逻辑,设备续航能力受限,同时无低功耗电源控制逻辑,待机功耗高、可靠性差、能耗浪费严重;该电源板控制电路适用于外接电源供电、对续航无高要求的设备,核心作用是完成“信号输入-主控处理-信号输出”的基础功能,但不具备电源智能管控能力
[0015]本实用新型的电源板控制电路通过主控芯片、按键触发电路、低功耗处理单元(三极管 + PMOS 管)和互锁维持电路(主控芯片输出电平维持电源导通)的配合,通过按键触发启动+单片机电平维持+低功耗模式切换的电源板控制电路,实现设备待机功耗趋近于零,同时保证启动响应速度,利用“低电平导通、高电平关断”的硬件电路,配合主控芯片GPIO信号,实现电源模块的精准通断控制,具有极致低功耗、提升续航、控制逻辑可靠、避免误操作、电路成本低、兼容性强、响应速度快和用户体验好的优点。
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Figure CN224922199U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of power electronics technology, and in particular to a low-power power board control circuit based on button triggering. Background Technology
[0002] like Figure 6 As shown, conventional power board control circuits continue to supply power to the power module in standby mode, leading to rapid battery depletion. Furthermore, single-button control is prone to false triggering or failure to completely shut off power. Lacking a closed-loop low-power logic of "trigger-sustain-shutdown," the device's battery life is limited. Additionally, the absence of low-power power control logic results in high standby power consumption, poor reliability, and significant energy waste. This power board control circuit is suitable for externally powered devices that do not require high battery life. Its core function is to perform the basic functions of "signal input-main control processing-signal output," but it lacks intelligent power management capabilities.
[0003] Therefore, further improvements are necessary. Utility Model Content
[0004] The purpose of this invention is to provide a low-power power board control circuit based on button triggering that is simple in structure, low in power consumption, long in battery life, low in cost, highly compatible, fast in response, provides a good user experience, and is highly practical, so as to overcome the shortcomings of the prior art.
[0005] A low-power power board control circuit based on button triggering, designed for this purpose, is characterized by comprising: The main control chip and the key triggering circuit are provided. The main control chip is electrically connected to the key triggering circuit, and the key triggering circuit is provided with a key input terminal Key_ln. A low-power processing unit, which is electrically connected to the main control chip; An interlocking maintenance circuit is electrically connected to a low-power processing unit.
[0006] The button trigger circuit includes a transistor Q1. The base (B) of transistor Q1 is connected to the POWER_CTR port of the main control chip, the collector (C) of transistor Q1 is connected to the POWER_12V port of the main control chip, and the emitter (E) of transistor Q1 is grounded.
[0007] The button trigger circuit also includes diodes D1 and D2. The collector of the transistor is connected to the anode of diode D1, the anode of diode D2 is connected to the K_ONOFF port of the main control chip, and the cathodes of diodes D1 and D2 are connected together to the button input terminal Key_ln.
[0008] The low-power processing unit includes transistor Q2, resistor R14 and resistor R49. One end of resistor R49 is connected to the VBUS port of the main control chip. The other end of resistor R49 is connected together with one end of resistor R14 and then connected to the base (B) of transistor Q2. The other end of resistor R14 is grounded, and the emitter (E) of transistor Q2 is grounded.
[0009] The low-power processing unit also includes a resistor R48, one end of which is connected to the POWER_12V port of the main control chip and the collector of transistor Q2.
[0010] The low-power processing unit also includes a PMOS transistor Q7 and a resistor R54. The other end of the resistor R48 is connected to the gate of the PMOS transistor Q7 and one end of the resistor R54. The source of the PMOS transistor Q7 and the other end of the resistor R54 are connected together and then connected to the VBAT port of the main control chip. The drain of the PMOS transistor Q7 is connected to the VBAT_OUT port.
[0011] The interlocking circuit includes a voltage chip U4, a winding L2, and a resistor R51. Pin 5 of the voltage chip U4 is connected to the VBAT_OUT port, pin 6 of the voltage chip U4 is connected to one end of the winding L2, the other end of the winding L2 is connected to one end of the resistor R51, and pin 2 of the voltage chip U4 is grounded.
[0012] The interlocking circuit also includes capacitors C45 and C46. One end of capacitor C45 is connected to the VBAT_OUT port, pin 4 of voltage chip U4 is connected to one end of capacitor C46, and the other ends of capacitors C45 and C46 are connected together and then grounded.
[0013] The interlocking circuit also includes capacitor C47 and electrolytic capacitor EC2. Pin 3 of voltage chip U4 and the other end of resistor R51 are connected together and then connected to one end of capacitor C47. The other end of capacitor C47 is grounded. The positive terminal of electrolytic capacitor EC2 is connected to the +5V port, and the negative terminal of electrolytic capacitor EC2 is grounded.
[0014] The main control chip is a microcontroller.
[0015] This utility model's power board control circuit, through the cooperation of a main control chip, a button trigger circuit, a low-power processing unit (transistor + PMOS transistor), and an interlocking maintenance circuit (main control chip output level maintains power conduction), achieves near-zero standby power consumption while ensuring fast startup response by using a power board control circuit that combines button-triggered startup, microcontroller level maintenance, and low-power mode switching. Utilizing a hardware circuit that enables "low-level conduction and high-level shutdown," along with the main control chip's GPIO signals, it achieves precise on / off control of the power module. This results in advantages such as extremely low power consumption, improved battery life, reliable control logic, prevention of misoperation, low circuit cost, strong compatibility, fast response speed, and a superior user experience. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the power board control circuit in one embodiment of the present invention.
[0017] Figure 2 This is a circuit diagram of the main control chip in one embodiment of the present invention.
[0018] Figure 3 This is a circuit diagram of the button triggering circuit in one embodiment of the present invention.
[0019] Figure 4 This is a circuit diagram of a low-power processing unit in one embodiment of the present invention.
[0020] Figure 5 This is a circuit diagram of an interlocking maintenance circuit in one embodiment of the present invention.
[0021] Figure 6 This is a circuit diagram of a traditional power supply board control circuit. Detailed Implementation
[0022] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0023] See Figures 1-5 This low-power power board control circuit based on button triggering includes: The main control chip 1 and the button triggering circuit 2 are electrically connected. The button triggering circuit 2 is equipped with a button input terminal Key_ln. Low-power processing unit 3 is electrically connected to main control chip 1; Interlocking circuit 4 is electrically connected to low-power processing unit 3.
[0024] The button trigger circuit 2 includes a transistor Q1. The base of transistor Q1 is connected to the POWER_CTR port of the main control chip 1 (i.e., pin 15 of the main control chip 1), the collector of transistor Q1 is connected to the POWER_12V port of the main control chip 1 (i.e., pin 17 of the main control chip 1), and the emitter of transistor Q1 is grounded.
[0025] The button trigger circuit 2 also includes diodes D1 and D2. The collector of the transistor is connected to the positive terminal of diode D1, and the positive terminal of diode D2 is connected to the K_ONOFF port of the main control chip 1 (i.e., pin 4 of the main control chip 1). The negative terminals of diodes D1 and D2 are connected together and then connected to the button input terminal Key_ln.
[0026] Using a button as the initial trigger signal, the main control chip 1 outputs a high level after power-on to maintain power supply to the power module, forming a closed-loop control of "trigger-maintenance" to solve the problems of "false triggering" or "standby power consumption" in traditional circuits; it integrates the entire process of "button start power supply → main control chip 1 low power mode (Deep Sleep) → microcontroller instruction to shut down power" to achieve standby power consumption close to zero; and it uses a hardware circuit of "low level conduction, high level shutdown" in conjunction with the GPIO signal of the main control chip to achieve precise on / off control of the power module.
[0027] The low-power processing unit 3 includes a transistor Q2, a resistor R14 and a resistor R49. One end of the resistor R49 is connected to the VBUS port of the main control chip 1 (i.e., pin 14 of the main control chip 1). The other end of the resistor R49 is connected together with one end of the resistor R14 and then connected to the base of the transistor Q2. The other end of the resistor R14 is grounded, and the emitter of the transistor Q2 is grounded.
[0028] The low-power processing unit 3 also includes a resistor R48, one end of which is connected to the POWER_12V port of the main control chip 1 and the collector of the transistor Q2.
[0029] The low-power processing unit 3 also includes a PMOS transistor Q7 and a resistor R54. The other end of the resistor R48 is connected to the gate of the PMOS transistor Q7 and one end of the resistor R54. The source of the PMOS transistor Q7 and the other end of the resistor R54 are connected together and then connected to the VBAT port (i.e., pin 19 of the main control chip 1). The drain of the PMOS transistor Q7 is connected to the VBAT_OUT port. The PMOS transistor is a P-channel metal-oxide-semiconductor field-effect transistor.
[0030] The main power supply is controlled by a low-level button (on) and a high-level button (off) to initiate power supply, and by a high-level output from the microcontroller to initiate power supply. The interlocking maintenance circuit 4 includes a voltage chip U4, a winding L2, and a resistor R51. Pin 5 of the voltage chip U4 is connected to the VBAT_OUT port, that is, pin 5 of the voltage chip U4 is connected to the drain of the PMOS transistor Q7. Pin 6 of the voltage chip U4 is connected to one end of the winding L2, and the other end of the winding L2 is connected to one end of the resistor R51. Pin 2 of the voltage chip U4 is grounded.
[0031] The interlocking circuit 4 also includes capacitors C45 and C46. One end of capacitor C45 is connected to the VBAT_OUT port, that is, one end of capacitor C45 is connected to the drain of PMOS transistor Q7. Pin 4 of voltage chip U4 is connected to one end of capacitor C46. The other ends of capacitor C45 and capacitor C46 are connected together and then grounded.
[0032] The interlocking circuit 4 also includes capacitor C47 and electrolytic capacitor EC2. Pin 3 of voltage chip U4 and the other end of resistor R51 are connected together and then connected to one end of capacitor C47. The other end of capacitor C47 is grounded. The positive terminal of electrolytic capacitor EC2 is connected to the +5V power supply port, and the negative terminal of electrolytic capacitor EC2 is grounded.
[0033] The main control chip 1 is a microcontroller.
[0034] Low-power mode protection principle of the power board control circuit: The main control chip 1 enters Deep Sleep mode in standby mode and is only woken up by an external interrupt pin, with standby power consumption ≤3μA.
[0035] Control logic protection principle of power board control circuit: The power module is started by a button, maintained by the main control chip outputting a high level, and shut down by the microcontroller removing the high level.
[0036] The above describes the preferred embodiments of this utility model, illustrating and describing its basic principles, main features, and advantages. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of this utility model. Various changes and modifications can be made without departing from the spirit and scope of this utility model, and all such changes and modifications fall within the scope of the claims. The scope of protection of this utility model is defined by the appended claims and their equivalents.
Claims
1. A low-power power board control circuit based on button triggering, characterized in that: include: The main control chip (1) and the key trigger circuit (2) are provided. The main control chip (1) is electrically connected to the key trigger circuit (2). The key trigger circuit (2) is provided with a key input terminal Key_ln. Low-power processing unit (3), which is electrically connected to the main control chip (1); An interlocking maintenance circuit (4) is electrically connected to a low-power processing unit (3).
2. The low-power power board control circuit based on button triggering according to claim 1, characterized in that: The button trigger circuit (2) includes a transistor Q1. The base of the transistor Q1 is connected to the POWER_CTR port of the main control chip (1), the collector of the transistor is connected to the POWER_12V port of the main control chip (1), and the emitter of the transistor is grounded.
3. The low-power power board control circuit based on button triggering according to claim 2, characterized in that: The button trigger circuit (2) also includes diodes D1 and D2. The collector of the transistor is connected to the positive terminal of diode D1, the positive terminal of diode D2 is connected to the K_ONOFF port of the main control chip (1), and the negative terminals of diodes D1 and D2 are connected together to the button input terminal Key_ln.
4. The low-power power board control circuit based on button triggering according to claim 1, characterized in that: The low-power processing unit (3) includes transistor Q2, resistor R14 and resistor R49. One end of resistor R49 is connected to the VBUS port of the main control chip (1). The other end of resistor R49 is connected to the base of transistor Q2 after being connected together with one end of resistor R14. The other end of resistor R14 is grounded and the emitter of transistor Q2 is grounded.
5. The low-power power board control circuit based on button triggering according to claim 4, characterized in that: The low-power processing unit (3) also includes a resistor R48, one end of which is connected to the POWER_12V port of the main control chip (1) and the collector of the transistor Q2.
6. The low-power power board control circuit based on button triggering according to claim 5, characterized in that: The low-power processing unit (3) also includes a PMOS transistor Q7 and a resistor R54. The other end of the resistor R48 is connected to the gate of the PMOS transistor Q7 and one end of the resistor R54. The source of the PMOS transistor Q7 and the other end of the resistor R54 are connected together and then connected to the VBAT port of the main control chip (1). The drain of the PMOS transistor Q7 is connected to the VBAT_OUT port.
7. The low-power power board control circuit based on button triggering according to claim 1, characterized in that: The interlocking maintenance circuit (4) includes a voltage chip U4, a winding L2 and a resistor R51. Pin 5 of the voltage chip U4 is connected to the VBAT_OUT port, pin 6 of the voltage chip U4 is connected to one end of the winding L2, the other end of the winding L2 is connected to one end of the resistor R51, and pin 2 of the voltage chip U4 is grounded.
8. The low-power power board control circuit based on button triggering according to claim 7, characterized in that: The interlocking circuit (4) also includes capacitors C45 and C46. One end of capacitor C45 is connected to the VBAT_OUT port, and pin 4 of voltage chip U4 is connected to one end of capacitor C46. The other end of capacitor C45 and the other end of capacitor C46 are connected together and then grounded.
9. The low-power power board control circuit based on button triggering according to claim 8, characterized in that: The interlocking circuit (4) also includes capacitor C47 and electrolytic capacitor EC2. The third pin of voltage chip U4 and the other end of resistor R51 are connected together and then connected to one end of capacitor C47. The other end of capacitor C47 is grounded. The positive terminal of electrolytic capacitor EC2 is connected to the +5V port, and the negative terminal of electrolytic capacitor EC2 is grounded.
10. The low-power power board control circuit based on button triggering according to any one of claims 1-9, characterized in that: The main control chip (1) is a microcontroller.
