Integrated bidirectional power supply mutual backup port

Abstract

The utility model discloses a kind of integrated two-way power supply mutual backup port, belong to power distribution technical field, including Ethernet type mutual backup power supply port (1): Ethernet type mutual backup power supply port (1) is connected with first network communication isolation transformer (2) and second network communication isolation transformer (5);First network communication isolation transformer (2) is connected with POE_PSE output circuit module (3) and POE_PD input circuit module (4), POE_PSE output circuit module (3) and POE_PD input circuit module (4) are also connected with second network communication isolation transformer (5);POE_PSE output circuit module (3) and POE_PD input circuit module (4) are electrically connected with power supply.The utility model has realized the intelligent power mutual backup between PDU, significantly improves system availability and redundancy.

Description

Technical Field

[0001] This utility model relates to the field of power distribution technology, specifically to an integrated bidirectional power supply backup port. Background Technology

[0002] Currently, smart PDUs mainly provide standard AC (or DC) power output sockets for powering IT equipment (servers, switches, storage, etc.), which has the following drawbacks.

[0003] First: It usually does not have Power over Ethernet (PoE) power supply or power receiving capabilities.

[0004] Second: The network management port of the PDU (such as RJ45) is only used for data transmission and does not carry power.

[0005] Third: The control circuit of the PDU (microcontroller, network module, etc.) is completely dependent on its single main AC / DC input power supply;

[0006] Fourth: When the main input power supply of the PDU fails (such as circuit breaker tripping, power line disconnection, or abnormal input voltage), the entire PDU will immediately lose power, and its built-in microcontroller and network interface will fail.

[0007] Based on this, the present invention designs an integrated bidirectional power supply backup port to solve the above problems. Utility Model Content

[0008] In view of the above-mentioned shortcomings of the existing technology, the present invention provides an integrated bidirectional power supply backup port.

[0009] To achieve the above objectives, this utility model provides the following technical solution:

[0010] An integrated bidirectional power supply backup port includes an Ethernet-type power supply backup port (1):

[0011] Ethernet-type mutual backup power supply port (1) is connected to a first network communication isolation transformer (2) and a second network communication isolation transformer (5);

[0012] The first network communication isolation transformer (2) is connected to the POE_PSE output circuit module (3) and the POE_PD input circuit module (4), and the POE_PSE output circuit module (3) and the POE_PD input circuit module (4) are also connected to the second network communication isolation transformer (5);

[0013] The POE_PSE output circuit module (3) and the POE_PD input circuit module (4) are electrically connected to a power source.

[0014] Furthermore, the POE_PSE output circuit module (3) includes a U7 chip, resistors R13, R18, R20, R19, R15, L1 common-mode inductor, diodes D8, D17, and D19, fuse F10, capacitors C43 and C44, resistors R24 and R25, and transistor Q4.

[0015] Pin 1 of the U7 chip is grounded, pin 2 of the U7 chip is electrically connected to the positive terminal of capacitor C44, and the negative terminals of capacitors C43 and C44 are grounded.

[0016] The positive terminal of the power supply is connected to the positive terminal of capacitor C43, one end of resistor R13, and pin 4 of chip U7.

[0017] The other end of resistor R13 is electrically connected to one end of resistor R18 and pin 3 of chip U7. Pin 3 of chip U7 is electrically connected to the base of transistor Q4. The collector of transistor Q4 is connected to one end of resistor R24 ​​and one end of resistor R25. The other end of resistor R24 ​​is connected to PSE_EN. The other end of resistor R25 is grounded to the emitter of transistor Q4.

[0018] The other end of resistor R18 is connected to one end of resistor R20 and pin 8 of the U7 chip, and the other end of resistor R20 is grounded.

[0019] Pin 7 of the U7 chip is electrically connected to one end of resistor R19, and the other end of resistor R19 is grounded.

[0020] Pin 5 of the U7 chip is electrically connected to pin 1 of the L1 common mode inductor. Pin 4 of the L1 common mode inductor is grounded. Pin 2 of the L1 common mode inductor is electrically connected to the anode of diode D8 and the cathode of diode D17. Pin 3 of the L1 common mode inductor is electrically connected to the anode of diode D17 and the cathode of diode D19.

[0021] The positive terminal of diode D19 is electrically connected to one end of fuse F10, and the other end of fuse F10 is electrically connected to the negative terminal of diode D22 of the first network communication isolation transformer (2) and the negative terminal of diode D23 of the second network communication isolation transformer (5).

[0022] The negative terminal of diode D8 is electrically connected to the positive terminal of diode D14 of the first network communication isolation transformer (2) and the positive terminal of diode D15 of the second network communication isolation transformer (5).

[0023] The 6 pins of the U7 chip are electrically connected to PSE_FLT and one end of resistor R15, respectively, and the other end of resistor R15 is connected to the negative power supply.

[0024] Furthermore, the POE_PD input circuit module (4) includes a U9 chip, resistors R26, R29, R34, R30, R27, L2 common-mode inductor, diodes D28, D30, and D33, fuse F12, capacitors C48, C49, and C50, resistors R39 and R38, and transistor Q5.

[0025] Pin 5 of the U9 chip and the positive terminal of capacitor C48 are connected to the positive terminal of the power supply, while the negative terminal of capacitor C48 is grounded.

[0026] Pin 6 of the U9 chip is connected to one end of resistor R27 and PD-FLT, while the other end of resistor R27 is grounded.

[0027] Pin 7 of the U9 chip is electrically connected to one end of resistor R30, and the other end of resistor R30 is grounded.

[0028] Pin 1 of the U9 chip is grounded;

[0029] The 4th pin of the U9 chip is electrically connected to the 2nd pin of the L2 common mode inductor, the positive terminal of the C50 capacitor, and one end of the R26 resistor. The negative terminal of the C50 capacitor and the 3rd pin of the L2 common mode inductor are grounded.

[0030] The other end of resistor R26 is electrically connected to one end of resistor R29 and pin 3 of the U9 chip. The other end of resistor R29 is electrically connected to one end of resistor R34 and pin 8 of the U9 chip. The other end of resistor R34 is grounded.

[0031] Pin 3 of the U9 chip is also electrically connected to the base of the Q5 transistor. The collector of the Q5 transistor is connected to one end of resistor R38 and one end of resistor R39. The other end of resistor R38 is connected to PD_EN. The other end of resistor R39 is grounded to the emitter of the Q4 transistor.

[0032] Pin 1 of the L2 common mode inductor is electrically connected to the negative terminals of diodes D28 and D30.

[0033] The 4th pin of the L2 common mode inductor is electrically connected to the positive terminals of diodes D30 and D33, and the negative terminal of diode D33 is electrically connected to one end of the L2 common mode inductor.

[0034] The negative terminal of diode D28 is electrically connected to the negative terminal of diode D13 of the first network communication isolation transformer (2) and the negative terminal of diode D4 of the second network communication isolation transformer (5).

[0035] The other end of the L2 common mode inductor is electrically connected to the positive terminal of the D18 diode of the first network communication isolation transformer (2) and the positive terminal of the D21 diode of the second network communication isolation transformer (5).

[0036] Furthermore, the Ethernet-type mutual backup power supply port (1) is a dual-port port.

[0037] Furthermore, the A1-8 pins of a group of ports of the Ethernet-type mutual backup power supply port (1) are electrically connected to the T1A-P, T1A-N, T1B-P, T1B-N, T1C-P, T1C-N, T1D-P and T1D-N pins of the second network communication isolation transformer (5), respectively.

[0038] Furthermore, the B1-8 pins of another group of ports of the Ethernet-type backup power supply port (1) are electrically connected to the T0A-P, T0A-N, T0B-P, T0B-N, T0C-P, T0C-N, T0D-P and T0D-N pins of the first network communication isolation transformer (2), respectively.

[0039] Beneficial effects

[0040] This utility model uses the POE_PSE output circuit module (3) to supply power to the first network communication isolation transformer (2) and the second network communication isolation transformer (5), and then returns to the power supply through the POE_PD input circuit module (4), realizing cross-power supply between the first network communication isolation transformer (2) and the POE_PSE output circuit module (3). The Ethernet-type backup power supply port (1) in a single integrated bidirectional power supply backup port is stably powered. The second network communication isolation transformer (5) of a set of integrated bidirectional power supply backup ports is electrically connected to the first network communication isolation transformer (2) of the next set, realizing the series connection of multiple sets of integrated bidirectional power supply backup ports. When one set of integrated bidirectional power supply backup ports is de-energized, due to the series relationship, the other integrated bidirectional power supply backup ports can ensure the power-on state of the de-energized integrated bidirectional power supply backup ports, which can ensure that the signal of the de-energized integrated bidirectional power supply backup ports can continue to be transmitted, realizing intelligent power backup between PDUs, and significantly improving system availability and redundancy. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a block diagram of an integrated bidirectional power supply backup port according to the present invention;

[0043] Figure 2 This is a circuit diagram of the first network communication isolation transformer of this utility model;

[0044] Figure 3 This is a circuit diagram of the second network communication isolation transformer of this utility model;

[0045] Figure 4 This is a schematic diagram of the POE_PSE output circuit module of this utility model;

[0046] Figure 5 This is the circuit diagram of the POE_PD input circuit module of this utility model;

[0047] Figure 6 This is a circuit diagram of the Ethernet-type mutual backup power supply port of this utility model.

[0048] The labels in the diagram represent:

[0049] 1. Ethernet-type mutual backup power supply port 2. First network communication isolation transformer 3. POE_PSE output circuit module 4. POE_PD input circuit module 5. Second network communication isolation transformer. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model.

[0051] The present invention will be further described below with reference to the embodiments.

[0052] Example 1

[0053] Please refer to the instruction manual appendix. Figure 1-6 An integrated bidirectional power supply backup port, including an Ethernet-type power supply backup port (1):

[0054] Ethernet-type mutual backup power supply port (1) is connected to a first network communication isolation transformer (2) and a second network communication isolation transformer (5);

[0055] The first network communication isolation transformer (2) is connected to the POE_PSE output circuit module (3) and the POE_PD input circuit module (4), and the POE_PSE output circuit module (3) and the POE_PD input circuit module (4) are also connected to the second network communication isolation transformer (5).

[0056] The first network communication isolation transformer (2) and the second network communication isolation transformer (5) are powered through the POE_PSE output circuit module (3), and then the power is returned through the POE_PD input circuit module (4), realizing cross-power supply of the first network communication isolation transformer (2) and the POE_PSE output circuit module (3). The Ethernet-type backup power supply port (1) in a single integrated bidirectional power supply backup port is stably powered. The second network communication isolation transformer (5) of a set of integrated bidirectional power supply backup ports is electrically connected to the first network communication isolation transformer (2) of the next set, realizing the series connection of multiple sets of integrated bidirectional power supply backup ports. When one set of integrated bidirectional power supply backup ports is de-energized, due to the series relationship, the other integrated bidirectional power supply backup ports can ensure the power-on state of the de-energized integrated bidirectional power supply backup ports, which can ensure that the signal of the de-energized integrated bidirectional power supply backup ports can continue to be transmitted, realizing intelligent power backup between PDUs, significantly improving system availability and redundancy.

[0057] The POE_PSE output circuit module (3) includes a U7 chip, resistors R13, R18, R20, R19, R15, L1 common mode inductor, diodes D8, D17, and D19, fuse F10, capacitors C43 and C44, resistors R24 and R25, and transistor Q4.

[0058] Pin 1 of the U7 chip is grounded, pin 2 of the U7 chip is electrically connected to the positive terminal of capacitor C44, and the negative terminals of capacitors C43 and C44 are grounded.

[0059] The positive terminal of the power supply is connected to the positive terminal of capacitor C43, one end of resistor R13, and pin 4 of chip U7.

[0060] The other end of resistor R13 is electrically connected to one end of resistor R18 and pin 3 of chip U7. Pin 3 of chip U7 is electrically connected to the base of transistor Q4. The collector of transistor Q4 is connected to one end of resistor R24 ​​and one end of resistor R25. The other end of resistor R24 ​​is connected to PSE_EN. The other end of resistor R25 is grounded to the emitter of transistor Q4.

[0061] The other end of resistor R18 is connected to one end of resistor R20 and pin 8 of the U7 chip, and the other end of resistor R20 is grounded.

[0062] Pin 7 of the U7 chip is electrically connected to one end of resistor R19, and the other end of resistor R19 is grounded.

[0063] Pin 5 of the U7 chip is electrically connected to pin 1 of the L1 common mode inductor. Pin 4 of the L1 common mode inductor is grounded. Pin 2 of the L1 common mode inductor is electrically connected to the anode of diode D8 and the cathode of diode D17. Pin 3 of the L1 common mode inductor is electrically connected to the anode of diode D17 and the cathode of diode D19.

[0064] The positive terminal of diode D19 is electrically connected to one end of fuse F10, and the other end of fuse F10 is electrically connected to the negative terminal of diode D22 of the first network communication isolation transformer (2) and the negative terminal of diode D23 of the second network communication isolation transformer (5).

[0065] The negative terminal of diode D8 is electrically connected to the positive terminal of diode D14 of the first network communication isolation transformer (2) and the positive terminal of diode D15 of the second network communication isolation transformer (5).

[0066] The 6 pins of the U7 chip are electrically connected to PSE_FLT and one end of resistor R15, respectively, and the other end of resistor R15 is connected to the negative power supply.

[0067] C43 capacitor removes glitches and pulses from the power supply;

[0068] The combination of resistors R13, R18, and R20 forms a voltage detection circuit. When the voltage is lower than the first set value (7.75VDC), undervoltage protection is provided, or when it is higher than the second set value (14.7VDC), overvoltage protection is provided. The U7 chip protectively shuts off its output, and the output of the U7 chip is within the specified range.

[0069] Resistors R24 and R25 and transistor Q4 form a switch control circuit, which outputs a high level at PSE_EN when the main controller needs to turn off the output.

[0070] The POE_PD input circuit module (4) includes a U9 chip, resistors R26, R29, R34, R30, R27, L2 common mode inductor, diodes D28, D30, and D33, fuse F12, capacitors C48, C49, and C50, resistors R39 and R38, and transistor Q5.

[0071] Pin 5 of the U9 chip and the positive terminal of capacitor C48 are connected to the positive terminal of the power supply, while the negative terminal of capacitor C48 is grounded.

[0072] Pin 6 of the U9 chip is connected to one end of resistor R27 and PD_FLT, while the other end of resistor R27 is grounded.

[0073] Pin 7 of the U9 chip is electrically connected to one end of resistor R30, and the other end of resistor R30 is grounded.

[0074] Pin 1 of the U9 chip is grounded;

[0075] The 4th pin of the U9 chip is electrically connected to the 2nd pin of the L2 common mode inductor, the positive terminal of the C50 capacitor, and one end of the R26 resistor. The negative terminal of the C50 capacitor and the 3rd pin of the L2 common mode inductor are grounded.

[0076] The other end of resistor R26 is electrically connected to one end of resistor R29 and pin 3 of the U9 chip. The other end of resistor R29 is electrically connected to one end of resistor R34 and pin 8 of the U9 chip. The other end of resistor R34 is grounded.

[0077] Pin 3 of the U9 chip is also electrically connected to the base of the Q5 transistor. The collector of the Q5 transistor is connected to one end of resistor R38 and one end of resistor R39. The other end of resistor R38 is connected to PD_EN. The other end of resistor R39 is grounded to the emitter of the Q4 transistor.

[0078] Pin 1 of the L2 common mode inductor is electrically connected to the negative terminals of diodes D28 and D30.

[0079] The 4th pin of the L2 common mode inductor is electrically connected to the positive terminals of diodes D30 and D33, and the negative terminal of diode D33 is electrically connected to one end of the L2 common mode inductor.

[0080] The negative terminal of diode D28 is electrically connected to the negative terminal of diode D13 of the first network communication isolation transformer (2) and the negative terminal of diode D4 of the second network communication isolation transformer (5).

[0081] The other end of the L2 common mode inductor is electrically connected to the positive terminal of the D18 diode of the first network communication isolation transformer (2) and the positive terminal of the D21 diode of the second network communication isolation transformer (5).

[0082] C48 capacitors remove glitches and pulses from the power supply.

[0083] The combination of resistors R26, R29, and R34 forms a voltage detection circuit. When the voltage is lower than the first set value (7.75VDC), undervoltage protection is provided, or when it is higher than the second set value (14.7VDC), overvoltage protection is provided. The U9 chip protectively shuts off its output, and the output of the U9 chip is within the specified range.

[0084] Resistors R38 and R39 and transistor Q5 form a switch control circuit, which outputs a high level at PSE_EN when the main controller needs to turn off the output.

[0085] Ethernet-type mutual backup power supply port (1) is a dual-port type.

[0086] The A1-8 pins of a group of Ethernet-type mutual backup power supply ports (1) are electrically connected to the T1A-P, T1A-N, T1B-P, T1B-N, T1C-P, T1C-N, T1D-P and T1D-N pins of the second network communication isolation transformer (5), respectively.

[0087] The B1-8 pins of the other group of Ethernet-type backup power supply ports (1) are electrically connected to the T0A-P, T0A-N, T0B-P, T0B-N, T0C-P, T0C-N, T0D-P and T0D-N pins of the first network communication isolation transformer (2), respectively.

[0088] The above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. An integrated bidirectional power supply backup port, comprising an Ethernet-type power supply backup port (1), characterized in that: Ethernet-type mutual backup power supply port (1) is connected to a first network communication isolation transformer (2) and a second network communication isolation transformer (5); The first network communication isolation transformer (2) is connected to the POE_PSE output circuit module (3) and the POE_PD input circuit module (4), and the POE_PSE output circuit module (3) and the POE_PD input circuit module (4) are also connected to the second network communication isolation transformer (5).

2. The integrated bidirectional power supply backup port according to claim 1, characterized in that, The POE_PSE output circuit module (3) includes a U7 chip, resistors R13, R18, R20, R19, R15, L1 common mode inductor, diodes D8, D17, and D19, fuse F10, capacitors C43 and C44, resistors R24 and R25, and transistor Q4. Pin 1 of the U7 chip is grounded, pin 2 of the U7 chip is electrically connected to the positive terminal of capacitor C44, and the negative terminals of capacitors C43 and C44 are grounded. The positive terminal of the power supply is connected to the positive terminal of capacitor C43, one end of resistor R13, and pin 4 of chip U7. The other end of resistor R13 is electrically connected to one end of resistor R18 and pin 3 of chip U7. Pin 3 of chip U7 is electrically connected to the base of transistor Q4. The collector of transistor Q4 is connected to one end of resistor R24 ​​and one end of resistor R25. The other end of resistor R24 ​​is connected to PSE_EN. The other end of resistor R25 is grounded to the emitter of transistor Q4. The other end of resistor R18 is connected to one end of resistor R20 and pin 8 of the U7 chip, and the other end of resistor R20 is grounded. Pin 7 of the U7 chip is electrically connected to one end of resistor R19, and the other end of resistor R19 is grounded. Pin 5 of the U7 chip is electrically connected to pin 1 of the L1 common mode inductor. Pin 4 of the L1 common mode inductor is grounded. Pin 2 of the L1 common mode inductor is electrically connected to the anode of diode D8 and the cathode of diode D17. Pin 3 of the L1 common mode inductor is electrically connected to the anode of diode D17 and the cathode of diode D19. The positive terminal of diode D19 is electrically connected to one end of fuse F10, and the other end of fuse F10 is electrically connected to the negative terminal of diode D22 of the first network communication isolation transformer (2) and the negative terminal of diode D23 of the second network communication isolation transformer (5). The negative terminal of diode D8 is electrically connected to the positive terminal of diode D14 of the first network communication isolation transformer (2) and the positive terminal of diode D15 of the second network communication isolation transformer (5). Pin 6 of the U7 chip is electrically connected to PSE_FLT and one end of resistor R15, respectively, and the other end of resistor R15 is connected to the negative power supply.

3. The integrated bidirectional power supply backup port according to claim 2, characterized in that, The POE_PD input circuit module (4) includes a U9 chip, resistors R26, R29, R34, R30, R27, L2 common mode inductor, diodes D28, D30, and D33, fuse F12, capacitors C48, C49, and C50, resistors R39 and R38, and transistor Q5. Pin 5 of the U9 chip and the positive terminal of capacitor C48 are connected to the positive terminal of the power supply, while the negative terminal of capacitor C48 is grounded. Pin 6 of the U9 chip is connected to one end of resistor R27 and PD_FLT, while the other end of resistor R27 is grounded. Pin 7 of the U9 chip is electrically connected to one end of resistor R30, and the other end of resistor R30 is grounded. Pin 1 of the U9 chip is grounded; The 4th pin of the U9 chip is electrically connected to the 2nd pin of the L2 common mode inductor, the positive terminal of the C50 capacitor, and one end of the R26 resistor. The negative terminal of the C50 capacitor and the 3rd pin of the L2 common mode inductor are grounded. The other end of resistor R26 is electrically connected to one end of resistor R29 and pin 3 of the U9 chip. The other end of resistor R29 is electrically connected to one end of resistor R34 and pin 8 of the U9 chip. The other end of resistor R34 is grounded. Pin 3 of the U9 chip is also electrically connected to the base of the Q5 transistor. The collector of the Q5 transistor is connected to one end of resistor R38 and one end of resistor R39. The other end of resistor R38 is connected to PD_EN. The other end of resistor R39 is grounded to the emitter of the Q4 transistor. Pin 1 of the L2 common mode inductor is electrically connected to the negative terminals of diodes D28 and D30. The 4th pin of the L2 common mode inductor is electrically connected to the positive terminals of diodes D30 and D33, and the negative terminal of diode D33 is electrically connected to one end of the L2 common mode inductor. The negative terminal of diode D28 is electrically connected to the negative terminal of diode D13 of the first network communication isolation transformer (2) and the negative terminal of diode D4 of the second network communication isolation transformer (5). The other end of the L2 common mode inductor is electrically connected to the positive terminal of the D18 diode of the first network communication isolation transformer (2) and the positive terminal of the D21 diode of the second network communication isolation transformer (5).

4. The integrated bidirectional power supply backup port according to claim 3, characterized in that, Ethernet-type mutual backup power supply port (1) is a dual-port.

5. The integrated bidirectional power supply backup port according to claim 1, characterized in that, The A1-8 pins of a group of Ethernet-type mutual backup power supply ports (1) are electrically connected to the T1A-P, T1A-N, T1B-P, T1B-N, T1C-P, T1C-N, T1D-P and T1D-N pins of the second network communication isolation transformer (5), respectively.

6. The integrated bidirectional power supply backup port according to claim 5, characterized in that, The B1-8 pins of the other group of Ethernet-type backup power supply ports (1) are electrically connected to the T0A-P, T0A-N, T0B-P, T0B-N, T0C-P, T0C-N, T0D-P and T0D-N pins of the first network communication isolation transformer (2), respectively.

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