A phase demodulation signal generating device

Abstract

The application discloses a phase demodulation signal generation device, comprising a first phase-shifting unit, a second phase-shifting unit, a signal gating unit and a demodulation signal generation unit, wherein an output end of the first phase-shifting unit is connected to a signal input end of the signal gating unit; one output end of the second phase-shifting unit is connected to a control end of the signal gating unit; a first output end of the signal gating unit is connected to a positive half-cycle signal path of the demodulation signal generation unit; a second output end of the signal gating unit is connected to a negative half-cycle signal path of the demodulation signal generation unit; in different intervals of the positive and negative half cycles of the output signal of the second phase-shifting unit, the output signal of the first phase-shifting unit is accurately selected and switched and input to different paths of the demodulation signal generation unit, so that the problems of phase offset and interval disorder caused by the influence of temperature and the like on an analog phase-shifting network are corrected, long-term stable work is realized, and the measurement stability is improved.

Description

Technical Field

[0001] This application belongs to the field of signal demodulation circuit technology, specifically relating to a high-precision phase-sensitive demodulation reference signal generation circuit and a signal demodulation system. Background Technology

[0002] In various alternating current sensor signal acquisition systems, phase-sensitive demodulation is the core method for extracting the amplitude and phase of weak measured AC signals. The phase-sensitive demodulation module must provide a stable reference carrier signal with phase matching, and the demodulation accuracy and measurement stability are highly dependent on the long-term consistency of the reference signal phase.

[0003] Currently, demodulation systems in the industry commonly use RC active / passive phase-shifting networks to generate adjustable-phase reference signals. The phase shift angle is determined by the resistance value R, the capacitance value C, and the carrier signal frequency. The demodulated signal generated by this type of phase-shifting network has the advantages of continuous smoothness and no phase step error, which can meet the signal continuity requirements of high-precision demodulation.

[0004] However, the analog phase-shifting scheme also has unavoidable defects: conventional thin-film resistors, ceramic capacitors, and polyester capacitors generally have significant temperature drift characteristics; when the operating temperature of the equipment changes, the R and C electrical parameters shift synchronously. At the same time, due to the limitations of the manufacturing process of discrete components and the parasitic capacitance of circuit board traces, the phase of the output signal of the RC phase-shifting network will dynamically drift with temperature, directly causing the phase boundary point of the positive and negative half-cycles of the demodulated signal to shift and the demodulation phase interval to become disordered.

[0005] In summary, given the shortcomings of traditional RC phase-shifting schemes, such as large temperature drift, low accuracy, and poor consistency, existing technologies lack a demodulation reference signal generation device that can balance the continuity of analog signals with the high stability of digital signals at low temperature drift. Summary of the Invention

[0006] This application addresses the problem that the phase of the demodulated reference signal drifts with ambient temperature due to temperature drift of the RC components in traditional RC phase-shifting networks. This application provides a phase demodulation signal generation device that uses a digital phase-shifting reference to constrain the circuit structure of the simulated RC phase-shifting output, which greatly improves the device's accuracy, stability, and engineering adaptability.

[0007] To achieve the above technical objectives, this application adopts the following technical solution: A phase demodulation signal generation device, comprising: First reference signal generation unit; A second reference signal generating unit connected to the first reference signal generating unit; A first phase-shifting unit connected to the second reference signal generation unit; A second phase-shifting unit connected to the first reference signal generation unit and the second reference signal generation unit; Signal gating units respectively connected to the first phase shifting unit and the second phase shifting unit; A demodulation signal generation unit connected to the signal gating unit; The first phase-shifting unit is configured to generate a continuously adjustable phase reference signal, which serves as the backbone signal for the system to generate the demodulated signal. The second phase-shifting unit is configured to generate a discrete phase reference signal, which serves as the path switching control reference signal for the signal gating unit.

[0008] The output terminal of the first reference signal generating unit is connected to the input terminal of the second reference signal generating unit and the first input terminal of the second phase shifting unit, and the output terminal of the second reference signal generating unit is connected to the input terminal of the first phase shifting unit and the second input terminal of the second phase shifting unit.

[0009] The second reference signal generation unit includes a frequency divider, which performs a fixed-rate frequency conversion on the first reference signal generated by the first reference signal generation unit to output a second reference signal. The continuously adjustable phase reference signal, after being selected by the signal gating unit, is input to different signal paths of the demodulation signal generation unit to generate demodulated signals.

[0010] The signal gating unit includes a signal input terminal, a control terminal, a first output terminal, and a second output terminal.

[0011] Preferably, the demodulation signal generation unit includes a positive half-cycle signal path and a negative half-cycle signal path, the first output terminal of the signal gating unit is connected to the positive half-cycle signal path, and the second output terminal of the signal gating unit is connected to the negative half-cycle signal path.

[0012] The high-speed controlled selector switch uses a two-to-one high-speed precision selector switch chip with integrated polarity detection function.

[0013] Preferably, the signal gating unit includes a high-speed controlled selection switch, which is configured to selectively connect the first output terminal or the second output terminal of the signal gating unit according to the polarity of the signal applied to the control terminal, and selectively connect the positive half-cycle signal path or the negative half-cycle signal path of the signal input terminal to generate a suitable demodulated signal.

[0014] Preferably, the signal gating unit selectively turns on the input and output according to the periodic position of the discrete phase reference signal generated by the second phase shifting unit.

[0015] Preferably, during the positive half-cycle of the discrete phase reference signal, the signal gating unit selectively activates the positive half-cycle signal path of the demodulation signal generation unit.

[0016] Preferably, during the negative half-cycle of the discrete phase reference signal, the signal gating unit selectively activates the negative half-cycle signal path of the demodulation signal generation unit.

[0017] Preferably, the second reference signal generation unit includes a frequency divider, which performs a fixed-rate frequency conversion on the first reference signal generated by the first reference signal generation unit.

[0018] The frequency divider is a 64-divider, which divides the first reference signal by 64 and outputs the second reference signal.

[0019] Preferably, the first phase shifting unit adopts an RC phase generation network, including a front-end phase reversal unit and a continuous RC phase generation unit, wherein the front-end phase reversal unit is configured to isolate front-end parasitic interference.

[0020] The first phase-shifting unit includes a pre-inverter and a continuous RC analog phase-shifting network. The input terminal of the pre-inverter is connected to the output terminal of the second reference signal generation unit, and the output terminal of the pre-inverter is connected to the input terminal of the continuous RC analog phase-shifting network.

[0021] Preferably, the second phase shifting unit employs a digital shifting circuit with low temperature drift and high consistency, and forms equally spaced discrete phase reference signals through a co-source timing delay.

[0022] Preferably, the first reference signal generation unit uses a crystal oscillator of the same origin and outputs a stable high-frequency clock signal CLK0 as the first reference signal; Preferably, the second reference signal generation unit divides the first reference signal by N, and outputs a second reference signal with a frequency of CLK0 / N through fixed frequency division logic.

[0023] Preferably, the second phase-shifting unit is composed of L cascaded shift register units, where L is a positive integer greater than 1. It synchronously shifts using a first reference signal, and outputs L signal taps with a phase difference of 2π / L. Each shift register unit outputs an independent signal tap, generating a set of L uniformly discretely distributed first phase reference signals. The phase difference between adjacent phase reference signals is 2π / L. When N=L, the phase covers one cycle of the first reference signal.

[0024] Preferably, the homogeneous crystal oscillator generation module uses a single high-precision low-temperature drift crystal oscillator.

[0025] This circuit achieves the following technical effects through the above structural design: 1. This application adopts a crystal oscillator frequency division plus digital shift multi-tap output architecture. The phase delay is realized by synchronous digital shift logic. The phase is calibrated on the analog RC phase shift network to correct the problems of large phase temperature drift, phase boundary drift and poor long-term stability caused by the temperature drift of resistors and capacitors.

[0026] 2. The digital control reference and the analog demodulation signal of this application are from the same source and are synchronized in timing, realizing real-time correction of the analog phase shifting network. The maximum phase error is constant and controllable, which can stably meet the phase-sensitive demodulation accuracy requirements of the sensing signal.

[0027] 3. The circuit of this application has strong anti-interference capability. It adopts an active inverting structure to isolate the interference problem of analog signal. It can accurately divide the positive and negative half-cycle output paths of the demodulation reference signal, and the phase interval is accurately determined without error. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of this application, the application will be described in detail below with reference to the accompanying drawings and detailed embodiments. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Among them: Figure 1 This is a schematic diagram of the overall circuit structure of an embodiment of this application.

[0029] Explanation of reference numerals in the attached figures: 1- Same source crystal oscillator generation module, 2- Clock divider unit, 3- Digital phase shifting path, 4- Analog RC phase shifting path, 5- High-speed precision selection switch, 6- Demodulation signal generation unit, 7- Preamplifier inverter, 8- RC phase shifting network. Detailed Implementation

[0030] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0031] The orientation or positional relationship indicated in the terminology is based on the orientation or positional relationship shown in the accompanying drawings and is only for the convenience of describing this application and simplifying the description, and is not intended to indicate or imply that the equipment or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0032] The term "connection method" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0033] The embodiments of this application will now be described in further detail with reference to the accompanying drawings. Example

[0034] like Figure 1 As shown, a phase reference signal generating device includes a crystal oscillator generating module 1, a clock divider unit 2, a digital phase shifting path 3, an analog RC phase shifting path 4, a high-speed precision selection switch 5, and a demodulation signal generating unit 6. The two phase shifting paths are independent of each other and do not interfere with each other.

[0035] The original crystal oscillator generation module 1 is the only reference signal generation unit in the entire device. It adopts a single low-temperature drift high-precision crystal oscillator design and outputs a 64MHz high-frequency clock signal CLK.

[0036] After the CLK input clock divider unit 2, a 1MHz reference signal CLK0 to be phase-shifted is generated. Through this structure, the two signals have a strict frequency correspondence. Within a single complete phase period of the 1MHz reference signal CLK0, there are exactly 64 complete 64MHz clock signals CLK. This fixed integer multiple frequency relationship provides a stable hardware foundation for the digital phase-shifting path to achieve uniformly divided and precisely quantized discrete phase shift.

[0037] Digital phase-shifting path 3 is the core high-precision working path of this device, consisting of 64-level synchronous multi-stage shift register units. The entire process uses a 64MHz high-frequency clock signal with the same source as the shift driving signal, and the clock signal controls the stage-by-stage delay of the register. The 1MHz signal with the same source is synchronously connected to the signal input terminal of the multi-stage shift register unit as the reference signal to be phase-shifted.

[0038] In the synchronous multi-stage shift register unit, each stage of the shift register has one tap, and 32 taps are led out from the first stage connection. These taps correspond to delays that increase uniformly from 1 to 32 CLK0 clock cycles, forming 32 uniformly distributed, precisely controllable discrete phase points that completely cover half a cycle of the 1MHz reference signal phase range.

[0039] During the precision sensing demodulation process, the system manually selects the signal from the 32 taps that best matches the target phase as the demodulation reference signal based on the actual phase of the measured sensor signal. Since the fixed phase interval between two adjacent phase taps is (2π / 64), the maximum deviation of any target phase occurs at the midpoint between two adjacent phases. The maximum theoretical phase error is only (2π / 128), which is a fixed static error that does not change with temperature, operating conditions, or time.

[0040] The demodulation signal generation unit 6 is divided into two paths: the positive half-cycle signal path and the negative half-cycle signal path.

[0041] The analog RC phase shifting path 4 is the main path for generating the demodulation reference signal of this device. It is composed of a pre-inverter 7 and an RC phase shifting network 8 connected in series. It is independent of the digital phase shifting path 3 and is not affected by the digital path during operation.

[0042] The pre-inverter 7 uses a high-speed digital active logic device, which has the characteristics of high input impedance, low output impedance and strong isolation. The 1MHz reference signal is first connected to the pre-inverter 7 to complete a 180° accurate phase pre-flip, which greatly expands the effective phase coverage of the analog path. At the same time, the impedance isolation characteristics of the active device are used to isolate the interference of front-end parasitic parameters on the RC phase shifting network 8, stabilize the amplitude and waveform of the input signal of the RC network, and ensure the basic stability of the RC phase shifting angle.

[0043] The RC phase-shifting network 8 is a traditional passive RC phase-shifting structure. It relies on the charging and discharging impedance frequency response characteristics of resistors and capacitors to adjust the phase shift of the pre-processed 1MHz reference signal, thereby achieving continuous phase shift of the reference signal.

[0044] The high-speed precision selector switch 5 features fast switching speed, low signal loss, and no signal crosstalk. It uses the manually selected phase tap signal as a reference signal. During the positive half-cycle of the tap signal, it selects the signal output by the RC phase shifting network to the positive half-cycle path; during the negative half-cycle of the tap signal, it selects the signal output by the RC phase shifting network to the negative half-cycle path.

[0045] This application solves the technical pain points of traditional RC phase shift circuits, such as large temperature drift, low accuracy, poor consistency, and weak phase controllability, by adopting a dual-path innovative architecture that combines the same source of precise digital phase shifting with the traditional analog phase shifting design.

[0046] Although this application has been described above with reference to embodiments, various modifications can be made and components can be replaced with equivalents without departing from the scope of this application. In particular, as long as there is no structural conflict, the features in the embodiments disclosed in this application can be combined with each other in any way. The lack of an exhaustive description of these combinations in this specification is merely for the sake of brevity and resource conservation. Therefore, this application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A phase demodulation signal generation device, comprising a first phase shifting unit, characterized in that, Also includes: The second phase-shifting unit includes a set of independent output terminals; The signal gating unit includes a high-speed controlled selection switch; The demodulation signal generation unit includes a positive half-cycle signal path and a negative half-cycle signal path; The output terminal of the first phase shifting unit is connected to the signal input terminal of the signal gating unit. One output terminal of the second phase-shifting unit is connected to the control terminal of the signal gating unit; The first output terminal of the signal gating unit is connected to the positive half-cycle signal path; The second output terminal of the signal gating unit is connected to the negative half-cycle signal path.

2. The phase demodulation signal generating apparatus according to claim 1, characterized in that, The high-speed controlled selection switch is configured to selectively turn on the first output terminal or the second output terminal of the signal gating unit according to the polarity of the signal applied to the control terminal.

3. The phase demodulation signal generating apparatus according to claim 1, characterized in that, It also includes a first reference signal generating unit that outputs a first reference signal and a second reference signal generating unit that outputs a second reference signal. The output terminal of the first reference signal generating unit is connected to the input terminal of the second reference signal generating unit and the first input terminal of the second phase shifting unit. The output terminal of the second reference signal generating unit is connected to the input terminal of the first phase shifting unit and the second input terminal of the second phase shifting unit.

4. The phase demodulation signal generating apparatus according to claim 3, characterized in that, The second reference signal generation unit includes a frequency divider, which performs a fixed-rate frequency conversion on the first reference signal generated by the first reference signal generation unit and outputs a second reference signal.

5. The phase demodulation signal generating apparatus according to claim 3, characterized in that, The first phase shifting unit is an RC analog phase shifting unit, and the second phase shifting unit is a shift register type digital phase shifting unit.

6. The phase demodulation signal generating apparatus according to claim 5, characterized in that, The shift register type digital phase shift unit consists of L-stage shift register units, which perform phase shifting on the signal at the second input terminal of the second phase shift unit. L is a positive integer greater than 1. Each stage of the shift register unit leads out an independent signal tap, which uses the first reference signal connected to the first input terminal of the second phase shift unit as the shift clock signal.

7. The phase demodulation signal generating apparatus according to claim 5, characterized in that, The first phase-shifting unit includes a pre-inverter and a continuous RC analog phase-shifting network. The input terminal of the pre-inverter is connected to the output terminal of the second reference signal generation unit, and the output terminal of the pre-inverter is connected to the input terminal of the continuous RC analog phase-shifting network.

8. The phase demodulation signal generating apparatus according to claim 1, characterized in that, The high-speed controlled selector switch is a two-to-one high-speed precision selector switch chip with integrated polarity detection function.

9. The phase demodulation signal generating apparatus according to claim 6, characterized in that, The first reference signal generation unit uses a crystal oscillator of the same origin and outputs a stable high-frequency clock signal CLK0. After being connected to the shift register type digital phase shift unit, it outputs L signal taps with a phase difference of 2π / L.

10. The phase demodulation signal generating apparatus according to claim 4, characterized in that, The frequency divider is a 64-divider, which divides the first reference signal by 64 and outputs the second reference signal.

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