A five-channel surround sound audio power amplifier circuit

Abstract

A five-channel surround sound audio power amplifier circuit is provided with five power amplifier modules, which are defined as a first power amplifier module, a second power amplifier module, a third power amplifier module, a fourth power amplifier module and a fifth power amplifier module, respectively, and the first power amplifier module is connected with the second power amplifier module, the third power amplifier module, the fourth power amplifier module and the fifth power amplifier module, respectively. The five-channel surround sound audio power amplifier circuit takes five channels as output, and the five-channel output can cover sound transmission in each direction to achieve the effect of surround sound. Moreover, the five channels of the utility model have high consistency in performance, the audio three-dimensional space has perfect stereoscopic effect, has the characteristics of low noise and small distortion, and has good sound quality effect.

Description

Technical Field

[0001] This utility model relates to the field of audio power amplifier circuit technology, and in particular to a five-channel surround sound audio power amplifier circuit. Background Technology

[0002] Currently, audio power amplifier circuits mainly use dual-channel output. Dual-channel output is a working mode that can simultaneously and independently amplify two audio signals, providing a better stereo experience and is the most common audio output system today. For example, Chinese Patent Publication No. CN203896315U discloses a dual-channel high-power audio amplifier circuit. However, because dual-channel can only accommodate two speakers, it cannot achieve sound propagation in multiple directions, thus failing to achieve a surround sound effect. Therefore, dual-channel output can only achieve a simple stereo effect and cannot meet the requirements of surround sound.

[0003] Therefore, it is essential to provide a five-channel surround sound audio power amplifier circuit to address the shortcomings of existing technologies. Utility Model Content

[0004] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a five-channel surround sound audio power amplifier circuit. This five-channel surround sound audio power amplifier circuit uses five channels as outputs, and the five-channel output can cover the sound transmission range in all directions to achieve a surround sound effect.

[0005] The above-mentioned objectives of this utility model are achieved through the following technical measures: A five-channel surround sound audio power amplifier circuit is provided, which includes five power amplifier modules. The five power amplifier modules are defined as a first power amplifier module, a second power amplifier module, a third power amplifier module, a fourth power amplifier module, and a fifth power amplifier module. The first power amplifier module is connected to the second power amplifier module, the third power amplifier module, the fourth power amplifier module, and the fifth power amplifier module.

[0006] The first power amplifier module includes a first signal differential input unit, a first constant current load bias unit, a first signal voltage amplification unit, a first thermal coupling bias unit, a first lead compensation unit, and a first current amplification unit. The second power amplifier module includes a second signal differential input unit, a second constant current load bias unit, a second signal voltage amplification unit, a second thermal coupling bias unit, a second lead compensation unit, and a second current amplification unit. The third power amplifier module includes a third signal differential input unit, a third constant current load bias unit, a third signal voltage amplification unit, a third thermal coupling bias unit, a third lead compensation unit, and a third current amplification unit. The fourth power amplifier module includes a fourth signal differential input unit, a fourth constant current load bias unit, a fourth signal voltage amplification unit, a fourth thermal coupling bias unit, a fourth lead compensation unit, and a fourth current amplification unit. The fifth power amplifier module includes a fifth signal differential input unit, a fifth constant current load bias unit, a fifth signal voltage amplification unit, a fifth thermal coupling bias unit, a fifth lead compensation unit, and a fifth current amplification unit.

[0007] Preferably, the first signal differential input unit is connected to the first constant current load bias unit and the first signal voltage amplification unit respectively, the first signal voltage amplification unit is connected to the first thermal coupling bias unit and the first current amplification unit, and the first thermal coupling bias unit is connected to the first current amplification unit and the first lead compensation unit.

[0008] Preferably, the first signal differential input unit is connected to the second signal differential input unit, the third signal differential input unit, the fourth signal differential input unit, the fifth signal differential input unit, the first signal voltage amplification unit, the second signal voltage amplification unit, the third signal voltage amplification unit, the fourth signal voltage amplification unit, and the fifth signal voltage amplification unit.

[0009] Preferably, the first current amplification unit is connected to the second current amplification unit and the third current amplification unit.

[0010] Preferably, the first constant current load biasing unit is connected to the second constant current load biasing unit, the third constant current load biasing unit, the fourth constant current load biasing unit, the fifth constant current load biasing unit, the first lead compensation unit, the second lead compensation unit, the third lead compensation unit, the fourth lead compensation unit, and the fifth lead compensation unit.

[0011] Preferably, the first current amplification unit is connected to the second current amplification unit and the third current amplification unit.

[0012] Preferably, the fourth current amplification unit and the fifth current amplification unit are connected.

[0013] Preferably, the first signal differential input unit 11 is provided with a resistor R11, a transistor TR11 and a transistor TR12. The base of transistor TR11 is connected to the peripheral circuit as pin 16. The emitters of transistor TR11 and TR12 are respectively connected to the first constant current load bias unit. The base of transistor TR12 is connected to the peripheral circuit as pin 17. The collector of transistor TR11 is connected to one end of resistor R11. The collector of transistor TR11 is also connected to the first signal voltage amplification unit. The other end of resistor R11 is connected to the peripheral circuit as pin 13. The collector of transistor TR12 is connected to pin 13.

[0014] Preferably, the first constant current load biasing unit is provided with a resistor R12, a transistor TR13, a diode D1-1, and a diode D1-2. The collector of transistor TR13 is connected to the emitter of transistor TR12, the base of transistor TR13 is connected to the peripheral circuit as pin 18, the emitter of transistor TR13 is connected to one end of resistor R12, the other end of resistor R12 is connected to the peripheral circuit as pin 24, the base of transistor TR13 is also connected to the anode of diode D1-1, the base of transistor TR13 is also connected to the first lead compensation unit, the cathode of diode D1-1 is connected to the anode of diode D1-2, and the cathode of diode D1-2 is connected to pin 24.

[0015] Preferably, the first signal voltage amplification unit is provided with a capacitor C11 and a transistor TR14. The base of the transistor TR14 is connected in series with the capacitor C11 and the collector. The base of the transistor TR14 is connected to the collector of the transistor TR11. The emitter of the transistor TR14 is connected to pin 13. The collector of the transistor TR14 is connected to the first thermally coupled bias unit and the first current amplification unit.

[0016] Preferably, the first thermally coupled bias unit is provided with resistor R13, resistor R14, and chip TR15. The base of chip TR15 is connected in series with resistor R13 and is connected to the collector of transistor TR14. The base of chip TR15 is connected in series with resistor R14 and is connected to the emitter of chip TR15. The emitter of chip TR15 is also connected to the first current amplification unit and the first lead compensation unit. The collector of chip TR15 is also connected to the collector of transistor TR14 and the first current amplification unit.

[0017] Preferably, the first advance compensation unit is provided with resistor R15, resistor R16 and transistor TR16. The base of transistor TR16 is connected to pin 18 via resistor R15, the emitter of transistor TR16 is connected to pin 24 via resistor R16, and the collector of transistor TR16 is connected to the emitter of chip TR15.

[0018] Preferably, the first current amplification unit is provided with chip TR17, chip TR18 and resistor R17. The collector of chip TR17 is connected to the peripheral circuit as pin 16. The base of chip TR17 is connected to the collector of chip TR15 via series resistor R17. The emitter of chip TR17 is connected to the peripheral circuit as pin 11. The emitter of chip TR18 is connected to pin 11. The collector of chip TR18 is connected to the peripheral circuit as pin 9. The base of chip TR18 is connected to the emitter of chip TR15.

[0019] Preferably, the second signal differential input unit 12 is provided with a resistor R21, a transistor TR21, and a transistor TR22. The base of transistor TR21 is connected to the peripheral circuit as pin 20. The emitters of transistor TR21 and TR22 are respectively connected to the second constant current load bias unit. The collector of transistor TR21 is connected in series with resistor R21 and to pin 13. The collector of transistor TR21 is also connected to the second signal voltage amplification unit. The collector of transistor TR22 is connected to pin 13. The base of transistor TR22 is connected to the peripheral circuit as pin 19.

[0020] Preferably, the second constant current load biasing unit is provided with a resistor R22 and a transistor TR23. The collector of transistor TR23 is connected to the emitter of transistor TR21, the base of transistor TR23 is connected to pin 18, the emitter of transistor TR23 is connected to pin 24 via a series resistor R22, and the base of transistor TR23 is also connected to the second lead compensation unit.

[0021] Preferably, the second signal voltage amplification unit is provided with a capacitor C21 and a transistor TR24. The base of the transistor TR24 is connected in series with the capacitor C21 and the collector. The base of the transistor TR24 is connected to the collector of the transistor TR21. The emitter of the transistor TR24 is connected to pin 13. The collector of the transistor TR24 is connected to the second thermally coupled bias unit and the second current amplification unit.

[0022] Preferably, the second thermally coupled bias unit is provided with resistor R23, resistor R24 ​​and chip TR25. The base of chip TR25 is connected in series with resistor R23 and is connected to the collector of transistor TR24. The base of chip TR25 is connected in series with resistor R24 ​​and is connected to the emitter. The emitter of chip TR25 is also connected to the second current amplification unit and the second lead compensation unit. The collector of chip TR25 is also connected to the collector of transistor TR24 and the collector of chip TR25 is also connected to the second current amplification unit.

[0023] Preferably, the second advance compensation unit is provided with resistor R25, resistor R26 and transistor TR26. The base of transistor TR26 is connected to pin 18 via resistor R25, the emitter of transistor TR26 is connected to pin 24 via resistor R26, and the collector of transistor TR26 is connected to the emitter of chip TR25-1.

[0024] Preferably, the second current amplification unit is provided with chip TR27, chip TR28 and resistor R27. The collector of chip TR27 is connected to pin 10. The base of chip TR27 is connected in series with resistor R27 and connected to the collector of chip TR25. The emitter of chip TR27 is connected to the peripheral circuit as pin 12. The emitter of chip TR28 is connected to pin 12. The collector of chip TR28 is connected to pin 9. The base of chip TR28 is connected to the emitter of chip TR25.

[0025] Preferably, the third signal differential input unit 13 is provided with a resistor R31, a transistor TR31, and a transistor TR32. The base of transistor TR31 is connected to the peripheral circuit as pin 21. The emitters of transistor TR31 and TR32 are respectively connected to the third constant current load bias unit. The collector of transistor TR31 is connected in series with resistor R31 and to pin 13. The collector of transistor TR31 is also connected to the third signal voltage amplification unit. The collector of transistor TR32 is connected to pin 13. The base of transistor TR32 is connected to the peripheral circuit as pin 22.

[0026] Preferably, the third constant current load biasing unit is provided with a resistor R32 and a transistor TR33. The collector of transistor TR33 is connected to the emitter of transistor TR32, the base of transistor TR33 is connected to pin 18, the emitter of transistor TR33 is connected to pin 24 via a series resistor R32, and the base of transistor TR33 is also connected to the third lead compensation unit.

[0027] Preferably, the third signal voltage amplification unit is provided with a capacitor C31 and a transistor TR34. The base of the transistor TR34 is connected in series with a capacitor C21 and connected to the collector. The base of the transistor TR34 is connected to the collector of the transistor TR31. The emitter of the transistor TR34 is connected to pin 13. The collector of the transistor TR34 is connected to the third thermal coupling bias unit and the third current amplification unit.

[0028] Preferably, the third thermally coupled bias unit is provided with resistor R33, resistor R34 and chip TR35. The base of chip TR35 is connected in series with resistor R33 and connected to the collector of transistor TR34. The base of chip TR35 is connected in series with resistor R34 and connected to the emitter. The emitter of chip TR35 is also connected to the third current amplification unit and the third lead compensation unit. The collector of chip TR35 is also connected to the collector of transistor TR34 and connected to the third current amplification unit.

[0029] Preferably, the third advance compensation unit is provided with resistor R35, resistor R36 and transistor TR36. The base of transistor TR36 is connected in series with resistor R35 and pin 18. The emitter of transistor TR36 is connected in series with resistor R36 and pin 24. The collector of transistor TR36 is connected to the emitter of chip TR35.

[0030] Preferably, the third current amplification unit is provided with chip TR37, chip TR38 and resistor R37. The collector of chip TR37 is connected to pin 10, the base of chip TR37 is connected to the collector via series resistor R37, the emitter of chip TR37 is connected to the peripheral circuit as pin 23, the emitter of chip TR38 is connected to pin 23, the collector of chip TR38 is connected to pin 9, the base of chip TR38 is connected to the emitter of chip TR35.

[0031] Preferably, the fourth signal differential input unit 14 is provided with a resistor R41, a transistor TR41, and a transistor TR42. The base of transistor TR41 is connected to the peripheral circuit as pin 3. The emitters of transistor TR41 and TR42 are respectively connected to the fourth constant current load bias unit. The collector of transistor TR41 is connected in series with resistor R41 and is connected to pin 13. The collector of transistor TR41 is also connected to the fourth signal voltage amplification unit. The collector of transistor TR42 is connected to pin 13. The base of transistor TR42 is connected to the peripheral circuit as pin 4.

[0032] Preferably, the fourth constant current load biasing unit is provided with a resistor R42 and a transistor TR43. The collector of transistor TR43 is connected to the emitter of transistor TR42, the base of transistor TR43 is connected to pin 18, the emitter of transistor TR43 is connected to pin 24 via a series resistor R42, and the base of transistor TR43 is also connected to the fourth lead compensation unit.

[0033] Preferably, the fourth signal voltage amplification unit is provided with a capacitor C41 and a transistor TR44. The base of the transistor TR44 is connected in series with the capacitor C41 and the collector. The base of the transistor TR44 is connected to the collector of the transistor TR41. The emitter of the transistor TR44 is connected to pin 13. The collector of the transistor TR44 is connected to the fourth thermally coupled bias unit and the fourth current amplification unit.

[0034] Preferably, the fourth thermal coupling bias unit is provided with resistors R43 and R44 and chip TR45. The base of chip TR45 is connected in series with resistor R43 and connected to the collector of transistor TR44. The base of chip TR45 is connected in series with resistor R44 and connected to the emitter. The emitter of chip TR45 is also connected to the fourth current amplification unit and the fourth lead compensation unit. The collector of chip TR45-1 is also connected to the collector of transistor TR44. The collector of chip TR45 is also connected to the fourth current amplification unit.

[0035] Preferably, the fourth advance compensation unit is provided with resistor R45, resistor R46 and transistor TR46. The base of transistor TR46 is connected to pin 18 via resistor R45, the emitter of transistor TR46 is connected to pin 24 via resistor R46, and the collector of transistor TR46 is connected to the emitter of chip TR45.

[0036] Preferably, the fourth current amplification unit is provided with chip TR47, chip TR48 and resistor R47. The collector of chip TR47 is connected to the peripheral circuit as pin 7, the emitter of chip TR47 is connected to the peripheral circuit as pin 5, the base of chip TR47 is connected to the collector of chip TR45 via series resistor R47, the emitter of transistor TR48 is connected to pin 5, the collector of chip TR48 is connected to the peripheral circuit as pin 8, the base of chip TR48 is connected to the collector of transistor TR46, and the base of chip TR48 is also connected to the emitter of chip TR45.

[0037] Preferably, the fifth signal differential input unit 15 is provided with a resistor R51, a transistor TR51 and a transistor TR52. The base of transistor TR51 is connected to the peripheral circuit as pin 1. The emitters of transistor TR51 and TR52 are respectively connected to the fifth constant current load bias unit. The collector of transistor TR51 is connected in series with resistor R51 and is connected to pin 13. The collector of transistor TR51 is also connected to the fifth signal voltage amplification unit. The collector of transistor TR52 is connected to pin 13. The base of transistor TR52 is connected to the peripheral circuit as pin 2.

[0038] Preferably, the fifth constant current load biasing unit is provided with a resistor R53 and a transistor TR53. The collector of transistor TR53 is connected to the emitter of transistor TR52, the base of transistor TR53 is connected to pin 18, the emitter of transistor TR53 is connected to pin 24 via a series resistor R53, and the base of transistor TR53 is also connected to the fifth lead compensation unit.

[0039] Preferably, the fifth signal voltage amplification unit is provided with a capacitor C51 and a transistor TR54. The base of the transistor TR54 is connected in series with the capacitor C51 and the collector. The base of the transistor TR54 is connected to the collector of the transistor TR51. The emitter of the transistor TR54 is connected to pin 13. The collector of the transistor TR54 is connected to the fifth thermal coupling bias unit and the fifth current amplification unit.

[0040] Preferably, the fifth thermally coupled bias unit is provided with resistor R53, resistor R54 and chip TR55. The base of chip TR55 is connected in series with resistor R53 and connected to the collector of transistor TR54. The base of chip TR55 is connected in series with resistor R54 and connected to the emitter. The emitter of chip TR55 is also connected to the fifth current amplification unit and the fifth lead compensation unit. The collector of chip TR55 is also connected to the collector of transistor TR54 and connected to the fifth current amplification unit.

[0041] Preferably, the fifth advance compensation unit is provided with resistor R55, resistor R56 and transistor TR56. The base of transistor TR56 is connected to pin 18 via series resistor R55, the emitter of transistor TR56 is connected to pin 24 via series resistor R56, and the collector of transistor TR56 is connected to the emitter of chip TR55.

[0042] Preferably, the fifth current amplification unit is provided with chip TR57, chip TR58 and resistor R57. The collector of chip TR57 is connected to pin 7, the emitter of chip TR5 is connected to the peripheral circuit as pin 6, the base of chip TR57 is connected to the collector of chip TR55 via series resistor R57, the emitter of chip TR58 is connected to pin 5, the collector of chip TR58 is connected to pin 8, and the base of chip TR58 is connected to the collector of transistor TR56.

[0043] Chips TR17, TR27, TR37, TR47 and TR57 are all model number ND30B.

[0044] Chips TR18, TR28, TR38, TR48, and TR58 are all model number 355P.

[0045] The transistors TR11, TR12, TR21, TR22, TR13, TR32, TR41, TR42, TR51, and TR52 are all model number FMW3.

[0046] The model numbers of transistors TR23, TR33, TR43, TR53, TR16, TR26, TR36, TR46 and TR56 are all UMX1NTN. or The transistors TR23, TR33, TR43, TR53, TR16, TR26, TR36, TR46, and TR56 all have the model number UMZ1NTL.

[0047] The model numbers for resistors R15, R25, R35, R45, and R55 are all 0603 / 10K / J.

[0048] The model numbers for resistors R16, R26, R36, R46, and R56 are all 0603 / 120 / J.

[0049] The model numbers for resistors R17, R27, R37, R47, and R57 are all 0603 / 200 / J.

[0050] The resistors R13, R14, R23, R24, R33, R34, R43, R44, R53, and R54 are all model number 0603 / 2.2K / J.

[0051] The model numbers for resistors R12, R22, R32, R42, and R52 are all 0603 / 470 / J.

[0052] The model numbers of resistors R11, R21, R31, R41, and R51 are all 0603 / 470 / J.

[0053] The model numbers of capacitors C11, C21, C31, C41, and C51 are all 0805 / 39pF / K / 50V.

[0054] This invention discloses a five-channel surround sound audio power amplifier circuit, comprising five power amplification modules, designated as a first power amplification module, a second power amplification module, a third power amplification module, a fourth power amplification module, and a fifth power amplification module. The first power amplification module is connected to the second, third, fourth, and fifth power amplification modules respectively. This five-channel surround sound audio power amplifier circuit outputs five channels, which can cover sound transmission from all directions to achieve a surround sound effect. Furthermore, the five channels of this invention exhibit highly consistent performance, providing a strong three-dimensional stereo effect in the audio, and are characterized by low noise, low distortion, and excellent sound quality. Attached Figure Description

[0055] The present invention will be further described with reference to the accompanying drawings, but the content of the drawings does not constitute any limitation on the present invention.

[0056] Figure 1 This is a circuit diagram of a five-channel surround sound audio power amplifier circuit for Example 1.

[0057] Figure 2 This is the circuit diagram for the peripheral circuit.

[0058] exist Figures 1 to 2 This includes: First signal differential input unit 11, first constant current load bias unit 21, first signal voltage amplification unit 31, first thermal coupling bias unit 41, first lead compensation unit 51, first current amplification unit 61 Second signal differential input unit 12, second constant current load bias unit 22, second signal voltage amplification unit 32, second thermal coupling bias unit 42, second lead compensation unit 52, second current amplification unit 62. Third signal differential input unit 13, third constant current load bias unit 23, third signal voltage amplification unit 33, third thermal coupling bias unit 43, third lead compensation unit 53, third current amplification unit 63 Fourth signal differential input unit 14, fourth constant current load bias unit 24, fourth signal voltage amplification unit 34, fourth thermal coupling bias unit 44, fourth lead compensation unit 54, fourth current amplification unit 64. Fifth signal differential input unit 15, fifth constant current load bias unit 25, fifth signal voltage amplification unit 35, fifth thermal coupling bias unit 45, fifth lead compensation unit 55, and fifth current amplification unit 65. Detailed Implementation

[0059] The technical solution of this utility model will be further explained with reference to the following embodiments.

[0060] Example 1 A five-channel surround sound audio power amplifier circuit, such as Figure 1 As shown, five power amplification modules are provided, which are defined as the first power amplification module, the second power amplification module, the third power amplification module, the fourth power amplification module, and the fifth power amplification module, respectively. The first power amplification module is connected to the second power amplification module, the third power amplification module, the fourth power amplification module, and the fifth power amplification module.

[0061] The first power amplifier module includes a first signal differential input unit 11, a first constant current load bias unit 21, a first signal voltage amplification unit 31, a first thermal coupling bias unit 41, a first lead compensation unit 51, and a first current amplification unit 61. The second power amplifier module includes a second signal differential input unit 12, a second constant current load bias unit 22, a second signal voltage amplification unit 32, a second thermal coupling bias unit 42, a second lead compensation unit 52, and a second current amplification unit 62. The third power amplifier module includes a third signal differential input unit 13, a third constant current load bias unit 23, a third signal voltage amplification unit 33, a third thermal coupling bias unit 43, a third lead compensation unit 53, and a third current amplification unit 63. The fourth power amplifier module includes a fourth signal differential input unit 14, a fourth constant current load bias unit 24, a fourth signal voltage amplification unit 34, a fourth thermal coupling bias unit 44, a fourth lead compensation unit 54, and a fourth current amplification unit 64. The fifth power amplifier module includes a fifth signal differential input unit 15, a fifth constant current load bias unit 25, a fifth signal voltage amplification unit 35, a fifth thermal coupling bias unit 45, a fifth lead compensation unit 55, and a fifth current amplification unit 65.

[0062] The first signal differential input unit 11 is connected to the first constant current load bias unit 21 and the first signal voltage amplification unit 31, respectively.

[0063] The first signal voltage amplification unit 31 is connected to the first thermal coupling bias unit 41 and the first current amplification unit 61.

[0064] The first thermally coupled bias unit 41 is connected to the first current amplification unit 61 and the first lead compensation unit 51.

[0065] The first signal differential input unit 11 is connected to the second signal differential input unit 12, the third signal differential input unit 13, the fourth signal differential input unit 14, the fifth signal differential input unit 15, the first signal voltage amplification unit 31, the second signal voltage amplification unit 32, the third signal voltage amplification unit 33, the fourth signal voltage amplification unit 34, and the fifth signal voltage amplification unit 35.

[0066] The first current amplification unit 61 is connected to the second current amplification unit 62 and the third current amplification unit 63.

[0067] The first constant current load biasing unit 21 is connected to the second constant current load biasing unit 22, the third constant current load biasing unit 23, the fourth constant current load biasing unit 24, the fifth constant current load biasing unit 25, the first lead compensation unit 51, the second lead compensation unit 52, the third lead compensation unit 53, the fourth lead compensation unit 54, and the fifth lead compensation unit 55.

[0068] The first current amplification unit 61 is connected to the second current amplification unit 62 and the third current amplification unit 63.

[0069] The fourth current amplification unit 64 and the fifth current amplification unit 65 are connected.

[0070] The first signal differential input unit 11 is equipped with a resistor R11, a transistor TR11, and a transistor TR12. The base of transistor TR11 is connected to the peripheral circuit as pin 16. The emitters of transistor TR11 and TR12 are respectively connected to the first constant current load bias unit 21. The base of transistor TR12 is connected to the peripheral circuit as pin 17. The collector of transistor TR11 is connected to one end of resistor R11. The collector of transistor TR11 is also connected to the first signal voltage amplification unit 31. The other end of resistor R11 is connected to the peripheral circuit as pin 13. The collector of transistor TR12 is connected to pin 13.

[0071] The first constant current load biasing unit 21 is equipped with a resistor R12, a transistor TR13, a diode D1-1, and a diode D1-2. The collector of transistor TR13 is connected to the emitter of transistor TR12. The base of transistor TR13 is connected to the peripheral circuit as pin 18. The emitter of transistor TR13 is connected to one end of resistor R12. The other end of resistor R12 is connected to the peripheral circuit as pin 24. The base of transistor TR13 is also connected to the anode of diode D1-1. The base of transistor TR13 is also connected to the first advance compensation unit 51. The cathode of diode D1-1 is connected to the anode of diode D1-2. The cathode of diode D1-2 is connected to pin 24.

[0072] The first signal voltage amplification unit 31 is equipped with a capacitor C11 and a transistor TR14. The base of the transistor TR14 is connected in series with the capacitor C11 and the collector. The base of the transistor TR14 is connected to the collector of the transistor TR11. The emitter of the transistor TR14 is connected to pin 13. The collector of the transistor TR14 is connected to the first thermal coupling bias unit 41 and the first current amplification unit 61.

[0073] The first thermal coupling bias unit 41 is provided with resistor R13, resistor R14, and chip TR15. The base of chip TR15 is connected in series with resistor R13 and is connected to the collector of transistor TR14. The base of chip TR15 is connected in series with resistor R14 and is connected to the emitter of chip TR15. The emitter of chip TR15 is also connected to the first current amplification unit 61 and the first lead compensation unit 51. The collector of chip TR15 is also connected to the collector of transistor TR14 and the collector of chip TR15 is also connected to the first current amplification unit 61. The first advance compensation unit 51 is equipped with resistors R15 and R16 and transistor TR16. The base of transistor TR16 is connected to pin 18 via resistor R15, the emitter of transistor TR16 is connected to pin 24 via resistor R16, and the collector of transistor TR16 is connected to the emitter of chip TR15.

[0074] The first current amplification unit 61 is equipped with chip TR17, chip TR18 and resistor R17. The collector of chip TR17 is connected to the external circuit as pin 16. The base of chip TR17 is connected to the collector of chip TR15 via series resistor R17. The emitter of chip TR17 is connected to the external circuit as pin 11. The emitter of chip TR18 is connected to pin 11. The collector of chip TR18 is connected to the external circuit as pin 9. The base of chip TR18 is connected to the emitter of chip TR15.

[0075] The second signal differential input unit 12 is equipped with a resistor R21, a transistor TR21, and a transistor TR22. The base of transistor TR21 is connected to the peripheral circuit as pin 20. The emitters of transistor TR21 and TR22 are respectively connected to the second constant current load bias unit 22. The collector of transistor TR21 is connected in series with resistor R21 and is connected to pin 13. The collector of transistor TR21 is also connected to the second signal voltage amplification unit 32. The collector of transistor TR22 is connected to pin 13. The base of transistor TR22 is connected to the peripheral circuit as pin 19.

[0076] The second constant current load bias unit 22 is equipped with a resistor R22 and a transistor TR23. The collector of transistor TR23 is connected to the emitter of transistor TR21, the base of transistor TR23 is connected to pin 18, the emitter of transistor TR23 is connected to pin 24 via a series resistor R22, and the base of transistor TR23 is also connected to the second lead compensation unit 52.

[0077] The second signal voltage amplification unit 32 is equipped with a capacitor C21 and a transistor TR24. The base of the transistor TR24 is connected in series with the capacitor C21 and the collector. The base of the transistor TR24 is connected to the collector of the transistor TR21. The emitter of the transistor TR24 is connected to pin 13. The collector of the transistor TR24 is connected to the second thermal coupling bias unit 42 and the second current amplification unit 62.

[0078] The second thermally coupled bias unit 42 is provided with resistors R23 and R24 and chip TR25. The base of chip TR25 is connected in series with resistor R23 and is connected to the collector of transistor TR24. The base of chip TR25 is connected in series with resistor R24 ​​and is connected to the emitter. The emitter of chip TR25 is also connected to the second current amplification unit 62 and the second lead compensation unit 52. The collector of chip TR25 is also connected to the collector of transistor TR24 and the collector of chip TR25 is also connected to the second current amplification unit 62.

[0079] The second advance compensation unit 52 is equipped with resistors R25 and R26 and transistor TR26. The base of transistor TR26 is connected to pin 18 via resistor R25, the emitter of transistor TR26 is connected to pin 24 via resistor R26, and the collector of transistor TR26 is connected to the emitter of chip TR25-1.

[0080] The second current amplification unit 62 is equipped with chip TR27, chip TR28 and resistor R27. The collector of chip TR27 is connected to pin 10. The base of chip TR27 is connected in series with resistor R27 and connected to the collector of chip TR25. The emitter of chip TR27 is connected to the peripheral circuit as pin 12. The emitter of chip TR28 is connected to pin 12. The collector of chip TR28 is connected to pin 9. The base of chip TR28 is connected to the emitter of chip TR25.

[0081] The third signal differential input unit 13 is equipped with a resistor R31, a transistor TR31, and a transistor TR32. The base of transistor TR31 is connected to the peripheral circuit as pin 21. The emitters of transistor TR31 and TR32 are respectively connected to the third constant current load bias unit 23. The collector of transistor TR31 is connected in series with resistor R31 and is connected to pin 13. The collector of transistor TR31 is also connected to the third signal voltage amplification unit 33. The collector of transistor TR32 is connected to pin 13. The base of transistor TR32 is connected to the peripheral circuit as pin 22.

[0082] The third constant current load bias unit 23 is equipped with a resistor R32 and a transistor TR33. The collector of transistor TR33 is connected to the emitter of transistor TR32, the base of transistor TR33 is connected to pin 18, the emitter of transistor TR33 is connected to pin 24 via a series resistor R32, and the base of transistor TR33 is also connected to the third lead compensation unit 53.

[0083] The third signal voltage amplification unit 33 is equipped with a capacitor C31 and a transistor TR34. The base of transistor TR34 is connected to the collector by a capacitor C21. The base of transistor TR34 is connected to the collector of transistor TR31. The emitter of transistor TR34 is connected to pin 13. The collector of transistor TR34 is connected to the third thermal coupling bias unit 43 and the third current amplification unit 63.

[0084] The third thermal coupling bias unit 43 is equipped with resistors R33 and R34 and chip TR35. The base of chip TR35 is connected in series with resistor R33 and is connected to the collector of transistor TR34. The base of chip TR35 is connected in series with resistor R34 and is connected to the emitter. The emitter of chip TR35 is also connected to the third current amplification unit 63 and the third lead compensation unit 53. The collector of chip TR35 is also connected to the collector of transistor TR34 and the collector of chip TR35 is also connected to the third current amplification unit 63.

[0085] The third advance compensation unit 53 is equipped with resistors R35 and R36 and transistor TR36. The base of transistor TR36 is connected to pin 18 via resistor R35, the emitter of transistor TR36 is connected to pin 24 via resistor R36, and the collector of transistor TR36 is connected to the emitter of chip TR35.

[0086] The third current amplification unit 63 is equipped with chip TR37, chip TR38 and resistor R37. The collector of chip TR37 is connected to pin 10. The base of chip TR37 is connected to the collector via series resistor R37. The emitter of chip TR37 is connected to the peripheral circuit as pin 23. The emitter of chip TR38 is connected to pin 23. The collector of chip TR38 is connected to pin 9. The base of chip TR38 is connected to the emitter of chip TR35.

[0087] The fourth signal differential input unit 14 is equipped with a resistor R41, a transistor TR41, and a transistor TR42. The base of transistor TR41 is connected to the peripheral circuit as pin 3. The emitters of transistor TR41 and TR42 are respectively connected to the fourth constant current load bias unit 24. The collector of transistor TR41 is connected in series with resistor R41 and is connected to pin 13. The collector of transistor TR41 is also connected to the fourth signal voltage amplification unit 34. The collector of transistor TR42 is connected to pin 13. The base of transistor TR42 is connected to the peripheral circuit as pin 4.

[0088] The fourth constant current load bias unit 24 is equipped with a resistor R42 and a transistor TR43. The collector of transistor TR43 is connected to the emitter of transistor TR42, the base of transistor TR43 is connected to pin 18, the emitter of transistor TR43 is connected to pin 24 via a series resistor R42, and the base of transistor TR43 is also connected to the fourth lead compensation unit 54.

[0089] The fourth signal voltage amplification unit 34 is equipped with a capacitor C41 and a transistor TR44. The base of the transistor TR44 is connected to the collector of the capacitor C41 in series. The base of the transistor TR44 is connected to the collector of the transistor TR41. The emitter of the transistor TR44 is connected to pin 13. The collector of the transistor TR44 is connected to the fourth thermal coupling bias unit 44 and the fourth current amplification unit 64.

[0090] The fourth thermal coupling bias unit 44 is equipped with a resistor R43 and a resistor R44 chip TR45. The base of the chip TR45 is connected in series with the resistor R43 and is connected to the collector of the transistor TR44. The base of the chip TR45 is connected in series with the resistor R44 and is connected to the emitter. The emitter of the chip TR45 is also connected to the fourth current amplification unit 64 and the fourth lead compensation unit 54. The collector of the chip TR45-1 is also connected to the collector of the transistor TR44. The collector of the chip TR45 is also connected to the fourth current amplification unit 64.

[0091] The fourth advance compensation unit 54 is equipped with resistors R45 and R46 and transistor TR46. The base of transistor TR46 is connected to pin 18 via resistor R45, the emitter of transistor TR46 is connected to pin 24 via resistor R46, and the collector of transistor TR46 is connected to the emitter of chip TR45.

[0092] The fourth current amplification unit 64 is equipped with chip TR47, chip TR48 and resistor R47. The collector of chip TR47 is connected to the external circuit as pin 7, the emitter of chip TR47 is connected to the external circuit as pin 5, the base of chip TR47 is connected to the collector of chip TR45 via series resistor R47, the emitter of transistor TR48 is connected to pin 5, the collector of chip TR48 is connected to the external circuit as pin 8, the base of chip TR48 is connected to the collector of transistor TR46, and the base of chip TR48 is also connected to the emitter of chip TR45.

[0093] The fifth signal differential input unit 15 is equipped with a resistor R51, a transistor TR51, and a transistor TR52. The base of transistor TR51 is connected to the peripheral circuit as pin 1. The emitters of transistor TR51 and TR52 are respectively connected to the fifth constant current load bias unit 25. The collector of transistor TR51 is connected in series with resistor R51 and is connected to pin 13. The collector of transistor TR51 is also connected to the fifth signal voltage amplification unit 35. The collector of transistor TR52 is connected to pin 13. The base of transistor TR52 is connected to the peripheral circuit as pin 2.

[0094] The fifth constant current load bias unit 25 is equipped with a resistor R53 and a transistor TR53. The collector of transistor TR53 is connected to the emitter of transistor TR52, the base of transistor TR53 is connected to pin 18, the emitter of transistor TR53 is connected to pin 24 via a series resistor R53, and the base of transistor TR53 is also connected to the fifth lead compensation unit 55.

[0095] The fifth signal voltage amplification unit 35 is equipped with a capacitor C51 and a transistor TR54. The base of the transistor TR54 is connected in series with the capacitor C51 and the collector. The base of the transistor TR54 is connected to the collector of the transistor TR51. The emitter of the transistor TR54 is connected to pin 13. The collector of the transistor TR54 is connected to the fifth thermal coupling bias unit 45 and the fifth current amplification unit 65.

[0096] The fifth thermal coupling bias unit 45 is equipped with resistors R53 and R54 and chip TR55. The base of chip TR55 is connected in series with resistor R53 and is connected to the collector of transistor TR54. The base of chip TR55 is connected in series with resistor R54 and is connected to the emitter. The emitter of chip TR55 is also connected to the fifth current amplification unit 65 and the fifth lead compensation unit 55. The collector of chip TR55 is also connected to the collector of transistor TR54 and the collector of chip TR55 is also connected to the fifth current amplification unit 65.

[0097] The fifth advance compensation unit 55 is equipped with resistors R55 and R56 and transistor TR56. The base of transistor TR56 is connected to pin 18 via resistor R55, the emitter of transistor TR56 is connected to pin 24 via resistor R56, and the collector of transistor TR56 is connected to the emitter of chip TR55.

[0098] The fifth current amplification unit 65 is equipped with chip TR57, chip TR58 and resistor R57. The collector of chip TR57 is connected to pin 7, the emitter of chip TR57 is connected to the peripheral circuit as pin 6, the base of chip TR57 is connected to the collector of chip TR55 via series resistor R57, the emitter of chip TR58 is connected to pin 5, the collector of chip TR58 is connected to pin 8, and the base of chip TR58 is connected to the collector of transistor TR56.

[0099] The circuit diagram of the peripheral circuit of this utility model is as follows: Figure 2 As shown, the peripheral circuit is designed to ensure the normal operation of the five-channel surround sound audio power amplifier circuit. This peripheral circuit includes modules for power supply, signal filtering, and feedback adjustment, and its function is to ensure the normal operation of the five-channel surround sound audio power amplifier circuit. However, the peripheral circuit is not the focus of this invention and will not be described in detail here.

[0100] The working principle of the five-channel surround sound audio power amplifier circuit of this utility model is as follows: For the first power amplifier module, after the circuit is powered on, a DC voltage signal of 3.5V~5.5V is actively supplied to pin 18, so that the first constant current load bias unit 21 can normally perform constant current function, so that the entire circuit exits the mute standby state; the audio input signal and feedback signal are input from pins 16 and 17 respectively, and after passing through the first signal differential input unit 11, the input signal is amplified by the first signal voltage amplification unit 31, and then the first lead compensation unit 51 is used to prevent oscillation. Finally, the first current amplification unit 61 is used for current amplification, and the power is output to the external speaker. For the first thermal coupling bias unit 41, its main function is to thermally couple the two high-power output transistors TR17 and TR18 in the first current amplification unit 61, which generate a lot of heat, so that the circuit can always maintain a stable bias state and eliminate crossover distortion.

[0101] For the second power amplifier module, after the circuit is powered on, a DC voltage signal of 3.5V~5.5V is actively supplied to pin 18. This ensures that the second constant current load bias unit 22 functions normally, thus allowing the entire circuit to exit the mute standby state. The audio input signal and feedback signal are input from pins 20 and 19 respectively. After passing through the second signal differential input unit 12, the input signal is amplified by the second signal voltage amplification unit 32. Then, the second lead compensation unit 52 prevents oscillation, and finally, the second current amplification unit 62 amplifies the current for power output to the external speaker. The second thermal coupling bias unit 42 is mainly used to thermally couple the two high-power output transistors TR27 and TR28 in the high-heat second current amplification unit 62, ensuring that the circuit remains in a stable bias state and eliminating crossover distortion.

[0102] For the third power amplifier module, after the circuit is powered on, a DC voltage signal of 3.5V~5.5V is actively supplied to pin 18. This ensures that the third constant current load bias unit 23 functions normally, thus allowing the entire circuit to exit the mute standby state. The audio input signal and feedback signal are input from pins 21 and 22 respectively. After passing through the third signal differential input unit 13, the input signal is amplified by the third signal voltage amplification unit 33. Then, the lead compensation unit 53 prevents oscillation, and finally, the current is amplified by the third current amplification unit 63 for power output to the external speaker. The third thermal coupling bias unit 43 mainly functions to thermally couple the two high-power output transistors TR37 and TR38 in the high-heat-generating third current amplification unit 63, ensuring that the circuit remains in a stable bias state and eliminating crossover distortion.

[0103] For the fourth power amplifier module, after the circuit is powered on, a DC voltage signal of 3.5V~5.5V is actively supplied to pin 18. This ensures that the third constant current load bias unit 23 functions normally as a constant current, thus allowing the entire circuit to exit the mute standby state. The audio input signal and feedback signal are input from pins 3 and 4 respectively. After passing through the fourth signal differential input unit 14, the input signal is amplified by the fourth signal voltage amplification unit 34. Then, the fourth lead compensation unit 54 provides lead compensation to prevent oscillation. Finally, the signal is amplified by the fourth current amplification unit 64 for power output to the external speaker. The fourth thermal coupling bias unit 44 is mainly used to thermally couple the two high-power output transistors TR47 and TR48 in the high-heat-generating fourth current amplification unit 64, ensuring that the circuit remains in a stable bias state and eliminating crossover distortion.

[0104] For the fifth power amplifier module, after the circuit is powered on, a DC voltage signal of 3.5V~5.5V is actively supplied to pin 18. This ensures that the fifth constant current load bias unit 25 functions normally, thus allowing the entire circuit to exit the mute standby state. The audio input signal and feedback signal are input from pins 1 and 2 respectively. After passing through the fifth signal differential input unit 15, the input signal is amplified by the fifth signal voltage amplification unit 35. Then, the fifth lead compensation unit 55 provides lead compensation to prevent oscillation. Finally, the fifth current amplification unit 65 amplifies the current and outputs power to the external speaker. The fifth thermal coupling bias unit 45 is mainly used to thermally couple the two high-power output transistors TR57 and TR58 in the fourth current amplification unit 64, which generate a lot of heat. This ensures that the circuit remains in a stable bias state and eliminates crossover distortion.

[0105] This five-channel surround sound audio power amplifier circuit uses five channels as outputs, which can cover sound transmission from all directions to achieve a surround sound effect. Moreover, the five channels of this invention have highly consistent performance, providing a strong three-dimensional stereo effect in the audio, and are characterized by low noise, low distortion, and excellent sound quality.

[0106] Example 2 A five-channel surround sound audio power amplifier circuit, with other features the same as in Embodiment 1, also has the following features: chips TR17, TR27, TR37, TR47, TR57, TR18, TR28, TR38, TR48 and TR58 in this utility model are all sintered with heat sink copper blocks respectively. The sintering of chips with heat sink copper blocks can conduct heat in a timely manner, thereby improving the overall heat dissipation capacity of the circuit and reducing energy consumption.

[0107] Furthermore, chips TR17, TR27, TR37, TR47, and TR57 are all model number ND30B. Chips TR18, TR28, TR38, TR48, and TR58 are all model number 355P. Transistors TR11, TR12, TR21, TR22, TR13, TR32, TR41, TR42, TR51, and TR52 are all model number FMW3. The transistors TR23, TR33, TR43, TR53, TR16, TR26, TR36, TR46, and TR56 are all model number UMX1NTN; or the transistors TR23, TR33, TR43, TR53, TR16, TR26, TR36, TR46, and TR56 are all model number UMZ1NTL. The resistors R15, R25, R35, R45, and R55 are all model number 0603 / 10K / J. The resistors R16, R26, R36, R46, and R56 are all model number 0603 / 120 / J. Resistors R17, R27, R37, R47, and R57 are all model number 0603 / 200 / J. Resistors R13, R14, R23, R24, R33, R34, R43, R44, R53, and R54 are all model number 0603 / 2.2K / J. Resistors R12, R22, R32, R42, and R52 are all model number 0603 / 470 / J. Resistors R11, R21, R31, R41, and R51 are all model number 0603 / 470 / J. Capacitors C11, C21, C31, C41, and C51 are all model number 0805 / 39pF / K / 50V.

[0108] Compared with Embodiment 1, this utility model, by using a heat dissipation copper block, can promptly conduct the heat generated by chips TR17, TR27, TR37, TR47, TR57, TR7, TR8, TR9, TR10, TR17 and TR18, thereby extending the service life of the five-channel surround sound audio power amplifier circuit.

[0109] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model and are not intended to limit the scope of protection of this utility model. Although this utility model has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this utility model without departing from the essence and scope of the technical solutions of this utility model.

Claims

1. A five-channel surround sound audio power amplifier circuit, characterized in that: Five power amplification modules are provided, which are defined as the first power amplification module, the second power amplification module, the third power amplification module, the fourth power amplification module, and the fifth power amplification module, respectively. The first power amplification module is connected to the second power amplification module, the third power amplification module, the fourth power amplification module, and the fifth power amplification module, respectively.

2. The five-channel surround sound audio power amplifier circuit according to claim 1, characterized in that: The first power amplifier module is provided with a first signal differential input unit, a first constant current load bias unit, a first signal voltage amplification unit, a first thermal coupling bias unit, a first lead compensation unit, and a first current amplification unit; The second power amplifier module is provided with a second signal differential input unit, a second constant current load bias unit, a second signal voltage amplification unit, a second thermal coupling bias unit, a second lead compensation unit, and a second current amplification unit; The third power amplifier module is provided with a third signal differential input unit, a third constant current load bias unit, a third signal voltage amplification unit, a third thermal coupling bias unit, a third lead compensation unit, and a third current amplification unit. The fourth power amplifier module is provided with a fourth signal differential input unit, a fourth constant current load bias unit, a fourth signal voltage amplification unit, a fourth thermal coupling bias unit, a fourth lead compensation unit, and a fourth current amplification unit. The fifth power amplifier module is provided with a fifth signal differential input unit, a fifth constant current load bias unit, a fifth signal voltage amplification unit, a fifth thermal coupling bias unit, a fifth lead compensation unit, and a fifth current amplification unit. The first signal differential input unit is connected to the first constant current load bias unit and the first signal voltage amplification unit respectively. The first signal voltage amplification unit is connected to the first thermal coupling bias unit and the first current amplification unit. The first thermal coupling bias unit is connected to the first current amplification unit and the first lead compensation unit. The first signal differential input unit is connected to the second signal differential input unit, the third signal differential input unit, the fourth signal differential input unit, the fifth signal differential input unit, the first signal voltage amplification unit, the second signal voltage amplification unit, the third signal voltage amplification unit, the fourth signal voltage amplification unit, and the fifth signal voltage amplification unit; The first current amplification unit is connected to the second current amplification unit and the third current amplification unit; The first constant current load biasing unit is connected to the second constant current load biasing unit, the third constant current load biasing unit, the fourth constant current load biasing unit, the fifth constant current load biasing unit, the first lead compensation unit, the second lead compensation unit, the third lead compensation unit, the fourth lead compensation unit, and the fifth lead compensation unit; The first current amplification unit is connected to the second current amplification unit and the third current amplification unit; The fourth current amplification unit and the fifth current amplification unit are connected.

3. The five-channel surround sound audio power amplifier circuit according to claim 2, characterized in that: The first signal difference input unit 11 is equipped with a resistor R11, a transistor TR11 and a transistor TR12. The base of transistor TR11 is connected to the peripheral circuit as pin 16. The emitters of transistor TR11 and TR12 are respectively connected to the first constant current load bias unit. The base of transistor TR12 is connected to the peripheral circuit as pin 17. The collector of transistor TR11 is connected to one end of resistor R11. The collector of transistor TR11 is also connected to the first signal voltage amplification unit. The other end of resistor R11 is connected to the peripheral circuit as pin 13. The collector of transistor TR12 is connected to pin 13. The first constant current load biasing unit is equipped with a resistor R12, a transistor TR13, a diode D1-1, and a diode D1-2. The collector of transistor TR13 is connected to the emitter of transistor TR12. The base of transistor TR13 is connected to the peripheral circuit as pin 18. The emitter of transistor TR13 is connected to one end of resistor R12. The other end of resistor R12 is connected to the peripheral circuit as pin 24. The base of transistor TR13 is also connected to the anode of diode D1-1. The base of transistor TR13 is also connected to the first lead compensation unit. The cathode of diode D1-1 is connected to the anode of diode D1-2. The cathode of diode D1-2 is connected to pin 24. The first signal voltage amplification unit is provided with a capacitor C11 and a transistor TR14. The base of the transistor TR14 is connected in series with the capacitor C11 and the collector. The base of the transistor TR14 is connected to the collector of the transistor TR11. The emitter of the transistor TR14 is connected to pin 13. The collector of the transistor TR14 is connected to the first thermally coupled bias unit and the first current amplification unit. The first thermally coupled bias unit is provided with resistor R13, resistor R14, and chip TR15. The base of chip TR15 is connected in series with resistor R13 and is connected to the collector of transistor TR14. The base of chip TR15 is connected in series with resistor R14 and is connected to the emitter of chip TR15. The emitter of chip TR15 is also connected to the first current amplification unit and the first lead compensation unit. The collector of chip TR15 is also connected to the collector of transistor TR14 and the collector of chip TR15 is also connected to the first current amplification unit. The first advance compensation unit is equipped with resistor R15, resistor R16 and transistor TR16. The base of transistor TR16 is connected to pin 18 via resistor R15, the emitter of transistor TR16 is connected to pin 24 via resistor R16, and the collector of transistor TR16 is connected to the emitter of chip TR15. The first current amplification unit includes a chip TR17, a chip TR18, and a resistor R17. The collector of chip TR17 is connected to the external circuit as pin 16. The base of chip TR17 is connected to the collector of chip TR15 via a series resistor R17. The emitter of chip TR17 is connected to the external circuit as pin 11. The emitter of chip TR18 is connected to pin 11. The collector of chip TR18 is connected to the external circuit as pin 9. The base of chip TR18 is connected to the emitter of chip TR15.

4. The five-channel surround sound audio power amplifier circuit according to claim 3, characterized in that: The second signal differential input unit 12 is equipped with a resistor R21, a transistor TR21, and a transistor TR22. The base of transistor TR21 is connected to the peripheral circuit as pin 20. The emitters of transistor TR21 and TR22 are respectively connected to the second constant current load bias unit. The collector of transistor TR21 is connected in series with resistor R21 and is connected to pin 13. The collector of transistor TR21 is also connected to the second signal voltage amplification unit. The collector of transistor TR22 is connected to pin 13. The base of transistor TR22 is connected to the peripheral circuit as pin 19. The second constant current load bias unit is equipped with a resistor R22 and a transistor TR23. The collector of transistor TR23 is connected to the emitter of transistor TR21, the base of transistor TR23 is connected to pin 18, the emitter of transistor TR23 is connected to pin 24 via a series resistor R22, and the base of transistor TR23 is also connected to the second lead compensation unit. The second signal voltage amplification unit is equipped with a capacitor C21 and a transistor TR24. The base of the transistor TR24 is connected in series with the capacitor C21 and the collector. The base of the transistor TR24 is connected to the collector of the transistor TR21. The emitter of the transistor TR24 is connected to pin 13. The collector of the transistor TR24 is connected to the second thermal coupling bias unit and the second current amplification unit. The second thermally coupled bias unit is provided with resistors R23 and R24 and chip TR25. The base of chip TR25 is connected in series with resistor R23 and is connected to the collector of transistor TR24. The base of chip TR25 is connected in series with resistor R24 ​​and is connected to the emitter. The emitter of chip TR25 is also connected to the second current amplification unit and the second lead compensation unit. The collector of chip TR25 is also connected to the collector of transistor TR24. The collector of chip TR25 is also connected to the second current amplification unit. The second advance compensation unit is equipped with resistor R25, resistor R26 and transistor TR26. The base of transistor TR26 is connected to pin 18 via resistor R25, the emitter of transistor TR26 is connected to pin 24 via resistor R26, and the collector of transistor TR26 is connected to the emitter of chip TR25-1. The second current amplification unit includes a chip TR27, a chip TR28, and a resistor R27. The collector of chip TR27 is connected to pin 10. The base of chip TR27 is connected in series with resistor R27 and is connected to the collector of chip TR25. The emitter of chip TR27 is connected to the peripheral circuit as pin 12. The emitter of chip TR28 is connected to pin 12. The collector of chip TR28 is connected to pin 9. The base of chip TR28 is connected to the emitter of chip TR25.

5. The five-channel surround sound audio power amplifier circuit according to claim 4, characterized in that: The third signal differential input unit 13 is equipped with a resistor R31, a transistor TR31, and a transistor TR32. The base of transistor TR31 is connected to the peripheral circuit as pin 21. The emitters of transistor TR31 and TR32 are respectively connected to the third constant current load bias unit. The collector of transistor TR31 is connected in series with resistor R31 and is connected to pin 13. The collector of transistor TR31 is also connected to the third signal voltage amplification unit. The collector of transistor TR32 is connected to pin 13. The base of transistor TR32 is connected to the peripheral circuit as pin 22. The third constant current load biasing unit is equipped with a resistor R32 and a transistor TR33. The collector of transistor TR33 is connected to the emitter of transistor TR32, the base of transistor TR33 is connected to pin 18, the emitter of transistor TR33 is connected to pin 24 via a series resistor R32, and the base of transistor TR33 is also connected to the third lead compensation unit. The third signal voltage amplification unit is equipped with a capacitor C31 and a transistor TR34. The base of the transistor TR34 is connected in series with a capacitor C21 and connected to the collector. The base of the transistor TR34 is connected to the collector of the transistor TR31. The emitter of the transistor TR34 is connected to pin 13. The collector of the transistor TR34 is connected to the third thermal coupling bias unit and the third current amplification unit. The third thermal coupling bias unit is provided with resistors R33 and R34 and chip TR35. The base of chip TR35 is connected in series with resistor R33 and is connected to the collector of transistor TR34. The base of chip TR35 is connected in series with resistor R34 and is connected to the emitter. The emitter of chip TR35 is also connected to the third current amplification unit and the third lead compensation unit. The collector of chip TR35 is also connected to the collector of transistor TR34. The collector of chip TR35 is also connected to the third current amplification unit. The third advance compensation unit is equipped with resistors R35 and R36 and transistor TR36. The base of transistor TR36 is connected to pin 18 via resistor R35, the emitter of transistor TR36 is connected to pin 24 via resistor R36, and the collector of transistor TR36 is connected to the emitter of chip TR35. The third current amplification unit includes a chip TR37, a chip TR38, and a resistor R37. The collector of chip TR37 is connected to pin 10, the base of chip TR37 is connected to the collector via a series resistor R37, the emitter of chip TR37 is connected to the peripheral circuit via pin 23, the emitter of chip TR38 is connected to pin 23, the collector of chip TR38 is connected to pin 9, the base of chip TR38 is connected to the emitter of chip TR35.

6. The five-channel surround sound audio power amplifier circuit according to claim 5, characterized in that: The fourth signal differential input unit 14 is equipped with a resistor R41, a transistor TR41, and a transistor TR42. The base of transistor TR41 is connected to the peripheral circuit as pin 3. The emitters of transistor TR41 and TR42 are respectively connected to the fourth constant current load bias unit. The collector of transistor TR41 is connected in series with resistor R41 and is connected to pin 13. The collector of transistor TR41 is also connected to the fourth signal voltage amplification unit. The collector of transistor TR42 is connected to pin 13. The base of transistor TR42 is connected to the peripheral circuit as pin 4. The fourth constant current load biasing unit is equipped with a resistor R42 and a transistor TR43. The collector of transistor TR43 is connected to the emitter of transistor TR42, the base of transistor TR43 is connected to pin 18, the emitter of transistor TR43 is connected to pin 24 via a series resistor R42, and the base of transistor TR43 is also connected to the fourth lead compensation unit. The fourth signal voltage amplification unit is equipped with a capacitor C41 and a transistor TR44. The base of the transistor TR44 is connected in series with the capacitor C41 and the collector. The base of the transistor TR44 is connected to the collector of the transistor TR41. The emitter of the transistor TR44 is connected to pin 13. The collector of the transistor TR44 is connected to the fourth thermal coupling bias unit and the fourth current amplification unit. The fourth thermal coupling bias unit is equipped with resistors R43 and R44, and chip TR45. The base of chip TR45 is connected in series with resistor R43 and is connected to the collector of transistor TR44. The base of chip TR45 is connected in series with resistor R44 and is connected to the emitter. The emitter of chip TR45 is also connected to the fourth current amplification unit and the fourth lead compensation unit. The collector of chip TR45-1 is also connected to the collector of transistor TR44. The collector of chip TR45 is also connected to the fourth current amplification unit. The fourth advance compensation unit is equipped with resistor R45, resistor R46 and transistor TR46. The base of transistor TR46 is connected to pin 18 via resistor R45, the emitter of transistor TR46 is connected to pin 24 via resistor R46, and the collector of transistor TR46 is connected to the emitter of chip TR45. The fourth current amplification unit includes a chip TR47, a chip TR48, and a resistor R47. The collector of chip TR47 is connected to the external circuit as pin 7, and the emitter of chip TR47 is connected to the external circuit as pin 5. The base of chip TR47 is connected to the collector of chip TR45 via a series resistor R47. The emitter of transistor TR48 is connected to pin 5, and the collector of chip TR48 is connected to the external circuit as pin 8. The base of chip TR48 is connected to the collector of transistor TR46, and the base of chip TR48 is also connected to the emitter of chip TR45.

7. The five-channel surround sound audio power amplifier circuit according to claim 6, characterized in that: The fifth signal differential input unit 15 is equipped with a resistor R51, a transistor TR51, and a transistor TR52. The base of transistor TR51 is connected to the peripheral circuit as pin 1. The emitters of transistor TR51 and TR52 are respectively connected to the fifth constant current load bias unit. The collector of transistor TR51 is connected in series with resistor R51 and is connected to pin 13. The collector of transistor TR51 is also connected to the fifth signal voltage amplification unit. The collector of transistor TR52 is connected to pin 13. The base of transistor TR52 is connected to the peripheral circuit as pin 2. The fifth constant current load biasing unit is equipped with a resistor R53 and a transistor TR53. The collector of transistor TR53 is connected to the emitter of transistor TR52, the base of transistor TR53 is connected to pin 18, the emitter of transistor TR53 is connected to pin 24 via a series resistor R53, and the base of transistor TR53 is also connected to the fifth lead compensation unit. The fifth signal voltage amplification unit is equipped with a capacitor C51 and a transistor TR54. The base of the transistor TR54 is connected in series with the capacitor C51 and the collector. The base of the transistor TR54 is connected to the collector of the transistor TR51. The emitter of the transistor TR54 is connected to pin 13. The collector of the transistor TR54 is connected to the fifth thermal coupling bias unit and the fifth current amplification unit. The fifth thermal coupling bias unit is provided with resistor R53, resistor R54 and chip TR55. The base of chip TR55 is connected in series with resistor R53 and connected to the collector of transistor TR54. The base of chip TR55 is connected in series with resistor R54 and connected to the emitter. The emitter of chip TR55 is also connected to the fifth current amplification unit and the fifth lead compensation unit. The collector of chip TR55 is also connected to the collector of transistor TR54 and connected to the fifth current amplification unit. The fifth advance compensation unit is equipped with resistor R55, resistor R56 and transistor TR56. The base of transistor TR56 is connected to pin 18 via resistor R55, the emitter of transistor TR56 is connected to pin 24 via resistor R56, and the collector of transistor TR56 is connected to the emitter of chip TR55. The fifth current amplification unit is equipped with chip TR57, chip TR58 and resistor R57. The collector of chip TR57 is connected to pin 7, the emitter of chip TR57 is connected to the peripheral circuit as pin 6, the base of chip TR57 is connected to the collector of chip TR55 via series resistor R57, the emitter of chip TR58 is connected to pin 5, the collector of chip TR58 is connected to pin 8, and the base of chip TR58 is connected to the collector of transistor TR56.

8. The five-channel surround sound audio power amplifier circuit according to claim 7, characterized in that: Chips TR17, TR27, TR37, TR47 and TR57 are all model number ND30B; The model numbers of chips TR18, TR28, TR38, TR48 and TR58 are all 355P.

9. The five-channel surround sound audio power amplifier circuit according to claim 8, characterized in that: The transistors TR11, TR12, TR21, TR22, TR13, TR32, TR41, TR42, TR51, and TR52 are all model number FMW3. The model numbers of transistors TR23, TR33, TR43, TR53, TR16, TR26, TR36, TR46 and TR56 are all UMX1NTN. or The transistors TR23, TR33, TR43, TR53, TR16, TR26, TR36, TR46, and TR56 all have the model number UMZ1NTL.

10. The five-channel surround sound audio power amplifier circuit according to claim 9, characterized in that: The model numbers for resistors R15, R25, R35, R45, and R55 are all 0603 / 10K / J. The model numbers for resistors R16, R26, R36, R46, and R56 are all 0603 / 120 / J. The model numbers for resistors R17, R27, R37, R47, and R57 are all 0603 / 200 / J. The resistors R13, R14, R23, R24, R33, R34, R43, R44, R53, and R54 are all model number 0603 / 2.2K / J. The model numbers for resistors R12, R22, R32, R42, and R52 are all 0603 / 470 / J. The model numbers of resistors R11, R21, R31, R41, and R51 are all 0603 / 470 / J. The model numbers of capacitors C11, C21, C31, C41, and C51 are all 0805 / 39pF / K / 50V.

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