A relay isolation device

Abstract

The utility model provides a kind of relay isolation equipment, it is related to network communication technical field, including first network interface, second network interface, third network interface, fourth network interface, power unit, PSE unit, first transformer unit, second transformer unit, third transformer unit, processing unit, first switch, second switch, third switch;Wherein, first network interface, second network interface, third network interface, power unit, PSE unit, first transformer unit, second transformer unit, processing unit, first switch, second switch are used to realize relay function;Fourth network interface, third switch, third network interface, third transformer unit, second network interface are used to realize isolation test function;Compared with prior art, the utility model embodiment can realize data transmission extension, also can be through switch to realize port data transmission and port electric separation control, in test field, the transmission port of test equipment can be isolated protection, protection test equipment.

Description

Technical Field

[0001] This utility model relates to the field of network communication technology, and in particular to a relay isolation device. Background Technology

[0002] In the field of network communication, repeaters are a commonly used connection device. Their important function is to extend the network transmission distance. Due to the influence of transmission line noise, digital or analog signals carrying information can only be transmitted over a limited distance. The function of a repeater is to regenerate and transmit the received signal, thereby increasing the signal transmission distance. It is the simplest network interconnection device, used to connect two or more network segments of the same network. Utility Model Content

[0003] This utility model provides a relay isolation device, the purpose of which is to increase the application scenarios of repeaters.

[0004] To achieve the above objectives, this utility model provides a relay isolation device, including a first network port, a second network port, a third network port, a fourth network port, a power supply unit, a PSE unit, a first transformer unit, a second transformer unit, a third transformer unit, a processing unit, a first switch, a second switch, and a third switch; The first input terminal of the power supply unit and the input terminal of the first transformer unit are both connected to the host computer through the first network port. The second input terminal of the power supply unit is connected to the second network port through the first switch. The output terminal of the power supply unit is connected to the power supply terminal of the processing unit and the input terminal of the PSE unit respectively. The output terminal of the PSE unit is connected to the third network port through the second switch. The output terminal of the first transformer unit is connected to the input terminal of the processing unit. The output terminal of the processing unit is connected to the third network port through the second transformer unit. The fourth network port is connected to the third network port through the third switch. The fourth network port is connected to the second network port through the third transformer unit. The second network port is used to connect to external PoE power supply equipment or external test equipment; The third network port is used to connect the load device; The fourth network port is used to connect the device under test; When the host computer sends data signals and power supply signals, the data signals and power supply signals enter from the first network port. The data signals flow to the load device through the first transformer unit, the processing unit, the second transformer unit, and the third network port. The power supply signals are extended by the power supply unit and transmitted to the processing unit and the PSE unit. The PSE unit sends the power supply signal to the third network port through the second switch to realize the relay function. When the host computer only sends data signals, the data signals are accessed through the first network port, and flow to the load device through the first transformer unit, the processing unit, the second transformer unit, and the third network port. The first switch is turned on, and the external PoE power supply device transmits power supply signals to the power supply unit through the second network port and the first switch. The power supply signals are extended by the power supply unit and transmitted to the processing unit and the PSE unit. The PSE unit sends power supply signals to the third network port through the second switch to realize the relay function. When the device under test is connected to the fourth network port, if the test data needs to be connected to the load, the third switch is turned on, and the load device is connected from the third network port; if the test data does not need to be connected to the load, the third switch is turned off, and the test data of the device under test is input from the fourth network port, and reaches the external test equipment through the third transformer unit and the second network port, realizing the isolation test function.

[0005] Furthermore, it also includes a digital display unit, the input of which is connected to the output of the processing unit.

[0006] Furthermore, the first network port is equipped with a first protection circuit.

[0007] Furthermore, the third network port is equipped with a second protection circuit. The input of the second protection circuit is connected to the output of the PSE unit through a second switch, and the output of the second protection circuit is connected to the lightning protection reference ground.

[0008] Furthermore, the power supply unit includes a rectifier circuit and a step-down circuit; The first input terminal of the rectifier circuit is connected to the first network port, and the second input terminal of the rectifier circuit is connected to the output terminal of the second switch. The output terminal of the rectifier circuit is connected to the input terminal of the buck converter circuit; The output of the step-down circuit is connected to the power supply terminal of the processing unit and the input terminal of the PSE unit.

[0009] Furthermore, the rectifier circuit includes a first rectifier bridge, a second rectifier bridge, a power management chip, a Zener diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, and a light-emitting diode; The third and fourth ends of the first rectifier bridge, the third and fourth ends of the second rectifier bridge are all connected to the output terminals of the first network port and the second switch. The first terminal of the first rectifier bridge is connected to the first terminal of the second rectifier bridge, the first terminal of the first capacitor, the cathode of the Zener diode, the first terminal of the second capacitor, the first terminal of the first resistor, the fifth pin of the power management chip, the seventh pin of the power management chip, the first terminal of the third resistor, the input terminal of the buck circuit, and the input terminal of the PSE unit. The second terminal of the first rectifier bridge is connected to the second terminal of the second rectifier bridge, the second terminal of the first capacitor, the anode of the Zener diode, the second terminal of the second capacitor, the first terminal of the second resistor, the first pin of the power management chip, the second pin of the power management chip, and the eleventh pin of the power management chip. The sixth pin of the power management chip is connected to the second end of the first resistor; The third pin of the power management chip is connected to the second end of the second resistor; The fourth pin of the power management chip is connected to the cathode of the LED, and the anode of the LED is connected to the second end of the third resistor. The eighth pin of the power management chip is connected to the input terminal of the buck circuit and the first terminal of the fourth resistor, while the second terminal of the fourth resistor is grounded.

[0010] Furthermore, the step-down circuit includes a voltage regulator chip, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a twenty-first capacitor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first inductor, a ferrite bead, and a first diode; The sixth pin of the voltage regulator chip is connected to the seventh pin of the voltage regulator chip, the eighth pin of the voltage regulator chip, the first terminal of the fifth capacitor, the first terminal of the fourth capacitor, the positive terminal of the third capacitor, and the first terminal of the third resistor, respectively. The negative terminal of the third capacitor is connected to the second terminal of the fourth capacitor and the second terminal of the fifth capacitor and grounded. The fourth pin of the voltage regulator chip is connected to the eighth pin of the power management chip; The eighteenth pin of the voltage regulator chip is connected to the first end of the fifth resistor; The sixteenth pin of the voltage regulator chip is connected to the second terminal of the fifth resistor and the first terminal of the sixth capacitor, respectively. The third pin of the voltage regulator chip is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the second end of the sixth capacitor and grounded. The fifth pin of the voltage regulator chip is connected to the cathode of the first diode and the first terminal of the seventh capacitor, respectively. The eleventh pin of the voltage regulator chip is connected to the second terminal of the seventh capacitor and the first terminal of the first inductor. The second terminal of the first inductor is connected to the first terminal of the eighth capacitor, the anode of the first diode, the first terminal of the eighth resistor, the first terminal of the seventh resistor, the first terminal of the ninth capacitor, the first terminal of the tenth capacitor, the first terminal of the eleventh capacitor, the first terminal of the twelfth capacitor, the power supply terminal of the processing unit, the first terminal of the ferrite bead, the first terminal of the fourteenth capacitor, and the first terminal of the thirteenth capacitor. The second terminal of the eighth capacitor is connected to the second terminals of the ninth capacitor and the tenth capacitor and grounded. The second terminal of the eleventh capacitor is connected to the second terminals of the twelfth capacitor, the fifteenth capacitor, and the seventeenth capacitor and grounded. The second terminal of the thirteenth capacitor is connected to the second terminal of the fourteenth capacitor and grounded. The second terminal of the ferrite bead is connected to the first terminals of the fifteenth capacitor, the sixteenth capacitor, and the seventeenth capacitor. The second terminal of the sixteenth capacitor is grounded. The seventeenth pin of the voltage regulator chip is connected to the second terminal of the seventh resistor and the first terminal of the eighteenth capacitor, respectively. The second pin of the voltage regulator chip is connected to the second terminal of the eighth resistor and the first terminal of the ninth resistor, respectively. The nineteenth pin of the voltage regulator chip is connected to the first terminal of the twenty-first capacitor, and the second terminal of the twenty-first capacitor is connected to the second terminal of the ninth resistor and grounded. The first pin of the voltage regulator chip is connected to the first end of the tenth resistor and the first end of the twentieth capacitor, respectively. The second end of the tenth resistor is connected to the first end of the nineteenth capacitor, and the second end of the nineteenth capacitor is connected to the second end of the eighteenth capacitor and the second end of the twentieth capacitor and grounded.

[0011] The above-mentioned solution of this utility model has the following beneficial effects: This utility model includes a first network port, a second network port, a third network port, a fourth network port, a power supply unit, a PSE unit, a first transformer unit, a second transformer unit, a third transformer unit, a processing unit, a first switch, a second switch, and a third switch. The first network port, second network port, third network port, power supply unit, PSE unit, first transformer unit, second transformer unit, processing unit, first switch, and second switch are used to implement a relay function. The fourth network port, third switch, third network port, third transformer unit, and second network port are used to implement an isolation testing function. Compared with the prior art, this utility model can extend data transmission and can also achieve separate control of port data transmission and port electrical connection through switches. In the testing field, it can isolate and protect the transmission ports of testing equipment, thus protecting the testing equipment.

[0012] Other beneficial effects of this invention will be described in detail in the following detailed description section. Attached Figure Description

[0013] Figure 1 This is a schematic block diagram of an embodiment of the present utility model; Figure 2 This is a block diagram illustrating the principle of implementing the relay function in an embodiment of this utility model; Figure 3 This is a block diagram illustrating the principle of implementing the isolation testing function in an embodiment of this utility model. Figure 4 This is a circuit diagram of the rectifier circuit in an embodiment of this utility model; Figure 5 This is a circuit diagram of the step-down circuit in an embodiment of this utility model; Figure 6 This is a circuit diagram of the second protection circuit in an embodiment of this utility model. Detailed Implementation

[0014] To make the technical problems, solutions, and advantages of this utility model clearer, a detailed description will be provided below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model.

[0015] In the description of this utility model, it should be noted that the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0016] like Figure 1 As shown, an embodiment of this utility model provides a relay isolation device, including a first network port, a second network port, a third network port, a fourth network port, a power supply unit, a PSE unit, a first transformer unit, a second transformer unit, a third transformer unit, a processing unit, a first switch for controlling the external PoE power supply of the second network port, a second switch for controlling whether the third network port outputs PoE power supply, and a third switch for controlling the connection between the third network port and the fourth network port. The first input terminal of the power supply unit and the input terminal of the first transformer unit are both connected to the host computer through the first network port. The second input terminal of the power supply unit is connected to the second network port through the first switch. The output terminal of the power supply unit is connected to the power supply terminal of the processing unit and the input terminal of the PSE unit respectively. The output terminal of the PSE unit is connected to the third network port through the second switch. The output terminal of the first transformer unit is connected to the input terminal of the processing unit. The output terminal of the processing unit is connected to the third network port through the second transformer unit. The fourth network port is connected to the third network port through the third switch. The fourth network port is connected to the second network port through the third transformer unit. The second network port is used to connect to external PoE power supply equipment or external test equipment; The third network port is used to connect the load device; The fourth network port is used to connect the device under test.

[0017] The working principle of this utility model embodiment is as follows: like Figure 2 As shown, when the host computer sends data signals and power supply signals, the data signals and power supply signals enter from the first network port. The data signals flow to the load device through the first transformer unit, the processing unit, the second transformer unit, and the third network port. The power supply signals are extended by the power supply unit and transmitted to the processing unit and the PSE unit. The PSE unit sends the power supply signal to the third network port through the second switch to realize the relay function. When the host computer only sends data signals, the data signals are accessed through the first network port, and flow to the load device through the first transformer unit, the processing unit, the second transformer unit, and the third network port. The first switch is turned on, and the external PoE power supply device transmits power supply signals to the power supply unit through the second network port and the first switch. The power supply signals are extended by the power supply unit and transmitted to the processing unit and the PSE unit. The PSE unit sends power supply signals to the third network port through the second switch to realize the relay function. like Figure 3 As shown, when the device under test is connected to the fourth network port, if the test data needs to be connected to the load, the third switch is turned on, and the load device is connected from the third network port; if the test data does not need to be connected to the load, the third switch is turned off, and the test data of the device under test is input from the fourth network port, and reaches the external test device through the third transformer unit and the second network port, realizing the isolation test function.

[0018] In this embodiment of the utility model, the first transformer unit, the second transformer unit, and the third transformer unit are all network transformers. The second transformer unit can be used to protect the second network port and also to filter interference signals in data transmission. The first transformer unit is a PoE network transformer. The first network port, the second network port, the third network port, and the fourth network port are all RJ45 network ports. The processing unit is a microprocessor MAC. The PSE unit is used to provide power to the load device.

[0019] It should be noted that the processing unit used in this embodiment of the present invention is the most commonly used microprocessor MAC in the art, without any modification to its internal software. Therefore, the functions it can achieve are all common knowledge. Thus, the process of processing data in this embodiment of the present invention will not be described in detail.

[0020] Preferably, the relay isolation device provided in this embodiment of the present invention further includes a digital display unit, the input end of which is connected to the output end of the processing unit.

[0021] In this embodiment of the utility model, the digital display unit includes a microcontroller processing chip and a display screen. The microcontroller processing chip is an AT80C51 series microcontroller, and the display screen is an LCD6002. Its working principle is that the digital display unit reads the data transmission rate and power of the relay isolation device from the processing unit through the microcontroller processing chip, and displays the working status of the relay isolation device intuitively through the display screen.

[0022] Specifically, the first network port is equipped with a first protection circuit, which is used to prevent the first network port from being damaged by external lightning surges, electrostatic signal interference or high voltage.

[0023] Specifically, the third network port is equipped with a second protection circuit. The input of the second protection circuit is connected to the output of the PSE unit through a second switch, and the output of the second protection circuit is connected to the lightning protection reference ground.

[0024] Specifically, such as Figure 4 As shown, the power supply unit includes a rectifier circuit for the input voltage signal and a step-down circuit for the rectified voltage. The first input terminal of the rectifier circuit is connected to the first network port, and the second input terminal of the rectifier circuit is connected to the output terminal of the second switch. The output terminal of the rectifier circuit is connected to the input terminal of the buck converter circuit; The output of the step-down circuit is connected to the power supply terminal of the processing unit and the input terminal of the PSE unit.

[0025] The preferred embodiment is that the rectifier circuit includes a first rectifier bridge PD1, a second rectifier bridge PD2, a power management chip, a Zener diode TVS1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, and a light-emitting diode LED1. The third and fourth terminals of the first rectifier bridge PD1, the third and fourth terminals of the second rectifier bridge PD2 are all connected to the output terminals of the first network port and the second switch. The first terminal of the first rectifier bridge PD1 is connected to the first terminal of the second rectifier bridge PD2, the first terminal of the first capacitor C1, the cathode of the Zener diode TVS1, the first terminal of the second capacitor C2, the first terminal of the first resistor R1, the fifth pin of the power management chip, the seventh pin of the power management chip, the first terminal of the third resistor R3, the input terminal of the buck circuit, and the input terminal of the PSE unit. The second terminal of the first rectifier bridge PD1 is connected to the second terminal of the second rectifier bridge PD2, the second terminal of the first capacitor C1, the anode of the Zener diode TVS1, the second terminal of the second capacitor C2, the first terminal of the second resistor R2, the first pin of the power management chip, the second pin of the power management chip, and the eleventh pin of the power management chip. The sixth pin of the power management chip is connected to the second end of the first resistor R1; The third pin of the power management chip is connected to the second end of the second resistor R2; The fourth pin of the power management chip is connected to the cathode of LED1, and the anode of LED1 is connected to the second end of the third resistor R3. The eighth pin of the power management chip is connected to the input terminal of the buck circuit and the first terminal of the fourth resistor R4, while the second terminal of the fourth resistor R4 is grounded.

[0026] In this embodiment of the invention, when the host computer is powered on, the first network port connects the external power supply to the rectifier bridge in the rectifier circuit through the four pins POWER1+, POWER1-, POWER2+, and POWER2-. When the host computer is not powered on and only transmits data, the first switch is turned on, and the second network port is connected to the four pins POWER1+, POWER1-, POWER2+, and POWER2- through the first switch to receive external power from the PoE device connected to the second network port. The rectifier circuit provided by this invention includes two rectifier bridges, which are compatible with PoE power supply methods. Whether it is 12+, 36- or 12-, 36+, it can pass smoothly through the rectifier bridges. Then, through the Zener diode TVS1 and the power management chip, a stable 54V Vmain voltage is output as the power supply voltage for the step-down circuit and the PSE unit.

[0027] In this embodiment of the utility model, the power management chip is model MP8003A.

[0028] The optimal choice is, such as Figure 5As shown, the step-down circuit includes a voltage regulator chip, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17, an eighteenth capacitor C18, a nineteenth capacitor C19, a twentieth capacitor C20, a twenty-first capacitor C21, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first inductor L1, a ferrite bead PB1, and a first diode; The sixth pin of the voltage regulator chip is connected to the seventh pin of the voltage regulator chip, the eighth pin of the voltage regulator chip, the first terminal of the fifth capacitor C5, the first terminal of the fourth capacitor C4, the positive terminal of the third capacitor C3, and the first terminal of the third resistor R3. The negative terminal of the third capacitor C3 is connected to the second terminal of the fourth capacitor C4 and the second terminal of the fifth capacitor C5 and grounded. The fourth pin of the voltage regulator chip is connected to the eighth pin of the power management chip; The eighteenth pin of the voltage regulator chip is connected to the first end of the fifth resistor R5; The sixteenth pin of the voltage regulator chip is connected to the second terminal of the fifth resistor R5 and the first terminal of the sixth capacitor C6, respectively. The third pin of the voltage regulator chip is connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is connected to the second end of the sixth capacitor C6 and grounded. The fifth pin of the voltage regulator chip is connected to the cathode of the first diode and the first terminal of the seventh capacitor C7, respectively. The eleventh pin of the voltage regulator chip is connected to the second terminal of the seventh capacitor C7 and the first terminal of the first inductor L1. The second terminal of the first inductor L1 is connected to the first terminal of the eighth capacitor C8, the anode of the first diode, the first terminal of the eighth resistor R8, the first terminal of the seventh resistor R7, the first terminal of the ninth capacitor C9, the first terminal of the tenth capacitor C10, the first terminal of the eleventh capacitor C11, the first terminal of the twelfth capacitor C12, the power supply terminal of the processing unit, the first terminal of the ferrite bead PB1, the first terminal of the fourteenth capacitor C14, and the first terminal of the thirteenth capacitor C13. The eighth capacitor C... The second terminal of capacitor 8 is connected to the second terminal of capacitor C9 (ninth capacitor) and capacitor C10 (tenth capacitor) respectively and grounded. The second terminal of capacitor C11 (eleventh capacitor) is connected to the second terminal of capacitor C12 (twelfth capacitor), capacitor C15 (fifteenth capacitor), and capacitor C17 (seventeenth capacitor) respectively and grounded. The second terminal of capacitor C13 (thirteenth capacitor) is connected to the second terminal of capacitor C14 (fourteenth capacitor) and grounded. The second terminal of ferrite bead PB1 is connected to the first terminal of capacitor C15 (fifteenth capacitor), capacitor C16 (sixteenth capacitor), and capacitor C17 (seventeenth capacitor) respectively. The second terminal of capacitor C16 (sixteenth capacitor) is grounded. The seventeenth pin of the voltage regulator chip is connected to the second terminal of the seventh resistor R7 and the first terminal of the eighteenth capacitor C18, respectively. The second pin of the voltage regulator chip is connected to the second terminal of the eighth resistor R8 and the first terminal of the ninth resistor R9, respectively. The nineteenth pin of the voltage regulator chip is connected to the first end of the twenty-first capacitor C21, and the second end of the twenty-first capacitor C21 is connected to the second end of the ninth resistor R9 and grounded. The first pin of the voltage regulator chip is connected to the first end of the tenth resistor R10 and the first end of the twentieth capacitor C20, respectively. The second end of the tenth resistor R10 is connected to the first end of the nineteenth capacitor C19. The second end of the nineteenth capacitor C19 is connected to the second end of the eighteenth capacitor C18 and the second end of the twentieth capacitor C20, respectively, and grounded.

[0029] In this embodiment of the present invention, the step-down circuit is connected to the first end of the third resistor R3 in the rectifier circuit with a voltage of 54V. Then, after the voltage regulator chip and a series of peripheral circuits perform step-down processing, the voltage is output from the first end of the eleventh capacitor C11 to supply power to the processing unit.

[0030] In this embodiment of the invention, the voltage regulator chip is model MP9457.

[0031] The optimal choice is, such as Figure 6 As shown, the second protection circuit consists of a fuse, a 22nd capacitor C22, a 23rd capacitor C23, a second diode D2, a third diode D3, a first transient suppression diode ED1, a second transient suppression diode ED2, a third transient suppression diode ED3, a bidirectional Zener diode TVSTVS1, a first surge suppression thyristor TSS1, a second surge suppression thyristor TSS2, a third surge suppression thyristor TSS3, a 10th resistor R10, and an 11th resistor R11. The first terminal of the fuse is connected to the control terminal of the PSE unit. The second terminal of the fuse is connected to the first terminal of the 22nd capacitor C22, the cathode of the second transient suppression diode ED2, and the first terminal of the 10th resistor R10. The anode of the second transient suppression diode ED2 is connected to the anode of the first transient suppression diode ED1, the second terminal of the 10th resistor R10, the cathode of the third transient suppression diode ED3, and the output terminal of the PSE unit. The cathode of the first transient suppression diode ED1 is connected to the second terminal of the first surge suppression thyristor TSS1. The first terminal of the first surge suppression thyristor TSS1 is connected to the first terminal of the second surge suppression thyristor TSS2 and connected to the external chassis ground. The second terminal of the second surge suppression thyristor TSS2 is connected to the anode of the second diode D2 and the anode of the third diode D3. The cathode of the second diode D2 is connected to the cathode of the third diode D3 and the anode of the third transient suppression diode ED3 and connected to the lightning protection reference ground. The 54Vmain voltage signal output by the PSE unit is input to the second terminal of the bidirectional Zener diode TVSTVS1 and the first terminal of the eleventh resistor R11. The first terminal of the bidirectional Zener diode TVSTVS1 is connected to the first terminal of the third surge suppression thyristor TSS3. The second terminal of the third surge suppression thyristor TSS3 is connected to the second terminal of the twenty-third capacitor C23 and connected to the external chassis ground. The first terminal of the twenty-third capacitor C23 is connected to the second terminal of the eleventh resistor R11.

[0032] In the utility model embodiment, when the third network port of the relay isolation device is subjected to external lightning surges, electrostatic interference, or other high-voltage damage, the second protection circuit can be used for effective protection. A dedicated lightning protection reference ground GND_SURGE0 is reserved in the third network port. When the third network port is subjected to destructive positive high voltage (with the chassis ground as the reference point, the voltage is much higher than the reference point), the high voltage is released instantaneously through the combination of bidirectional Zener diode TVS and third surge suppression thyristor TSS3. The bidirectional Zener diode TVS can also clamp 54Vmain within a certain range. After the first transient suppression diode ED1 and the first surge suppression thyristor TSS1, it is directly released to the external chassis ground. When an external negative high voltage (with the chassis ground as the reference point, the voltage is much higher than the reference point) arrives, the signal enters from the external chassis ground, passes through the second surge suppression thyristor TSS2 and the second diode D2, and reaches the lightning protection reference ground GND_SURGE0. After passing through the third transient suppression diode ED3, it reaches the output terminal of the PSE unit and is released. The signal does not pass through the system reference ground, which can effectively avoid interference with the 54V voltage difference of the Vmain reference, thereby preventing interference with the load and system power supply. In addition to lightning protection, there is also an RC filter circuit composed of the eleventh resistor and the twenty-third capacitor, which effectively filters out high-frequency interference signals.

[0033] This utility model embodiment includes a first network port, a second network port, a third network port, a fourth network port, a power supply unit, a PSE unit, a first transformer unit, a second transformer unit, a third transformer unit, a processing unit, a first switch, a second switch, and a third switch. The first network port, second network port, third network port, power supply unit, PSE unit, first transformer unit, second transformer unit, processing unit, first switch, and second switch are used to implement a relay function. The fourth network port, third switch, third network port, third transformer unit, and second network port are used to implement an isolation testing function. Compared with the prior art, this utility model embodiment can extend data transmission and can also achieve separate control of port data transmission and port electrical connections through switches. In the testing field, it can isolate and protect the transmission ports of testing equipment, thus protecting the testing equipment.

[0034] The above description is the preferred embodiment of this utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications should also be considered within the protection scope of this utility model.

Claims

1. A relay isolation device, characterized in that, It includes a first network port, a second network port, a third network port, a fourth network port, a power supply unit, a PSE unit, a first transformer unit, a second transformer unit, a third transformer unit, a processing unit, a first switch, a second switch, and a third switch; The first input terminal of the power supply unit and the input terminal of the first transformer unit are both connected to the host computer through the first network port. The second input terminal of the power supply unit is connected to the second network port through the first switch. The output terminal of the power supply unit is connected to the power supply terminal of the processing unit and the input terminal of the PSE unit, respectively. The output terminal of the PSE unit is connected to the third network port through the second switch. The output terminal of the first transformer unit is connected to the input terminal of the processing unit. The output terminal of the processing unit is connected to the third network port through the second transformer unit. The fourth network port is connected to the third network port through the third switch. The fourth network port is connected to the second network port through the third transformer unit. The second network port is used to connect to external PoE power supply equipment or external testing equipment; The third network port is used to connect the load device; The fourth network port is used to connect the device under test; When the host computer sends data signals and power supply signals, the data signals and power supply signals enter from the first network port. The data signals flow to the load device through the first transformer unit, the processing unit, the second transformer unit, and the third network port. The power supply signals are extended by the power supply unit and transmitted to the processing unit and the PSE unit. The PSE unit sends a power supply signal to the third network port through the second switch to realize the relay function. When the host computer only sends data signals, the data signals are received from the first network port, flow to the load device through the first transformer unit, the processing unit, the second transformer unit, and the third network port. The first switch is turned on, and the external PoE power supply device transmits power supply signals to the power supply unit through the second network port and the first switch. The power supply signals are extended by the power supply unit and transmitted to the processing unit and the PSE unit. The PSE unit sends power supply signals to the third network port through the second switch to realize the relay function. When the device under test is connected to the fourth network port, if the test data needs to be connected to a load, the third switch is turned on, and the load device is connected from the third network port; if the test data does not need to be connected to a load, the third switch is turned off, and the test data of the device under test is input from the fourth network port, and reaches the external test device through the third transformer unit and the second network port, thereby realizing the isolation test function.

2. The relay isolation device according to claim 1, characterized in that, It also includes a digital display unit, the input of which is connected to the output of the processing unit.

3. The relay isolation device according to claim 1, characterized in that, The first network port is equipped with a first protection circuit.

4. The relay isolation device according to claim 1, characterized in that, The third network port is equipped with a second protection circuit. The input terminal of the second protection circuit is connected to the output terminal of the PSE unit through the second switch, and the output terminal of the second protection circuit is connected to the lightning protection reference ground.

5. The relay isolation device according to claim 1, characterized in that, The power supply unit includes a rectifier circuit and a step-down circuit; The first input terminal of the rectifier circuit is connected to the first network port, and the second input terminal of the rectifier circuit is connected to the output terminal of the second switch; The output terminal of the rectifier circuit is connected to the input terminal of the buck circuit; The output terminal of the step-down circuit is connected to the power supply terminal of the processing unit and the input terminal of the PSE unit.

6. The relay isolation device according to claim 5, characterized in that, The rectifier circuit includes a first rectifier bridge, a second rectifier bridge, a power management chip, a Zener diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, and a light-emitting diode; The third end of the first rectifier bridge, the fourth end of the first rectifier bridge, the third end of the second rectifier bridge, and the fourth end of the second rectifier bridge are all connected to the output terminals of the first network port and the second switch. The first end of the first rectifier bridge is connected to the first end of the second rectifier bridge, the first end of the first capacitor, the cathode of the Zener diode, the first end of the second capacitor, the first end of the first resistor, the fifth pin of the power management chip, the seventh pin of the power management chip, the first end of the third resistor, the input end of the buck circuit, and the input end of the PSE unit. The second end of the first rectifier bridge is connected to the second end of the second rectifier bridge, the second end of the first capacitor, the anode of the Zener diode, the second end of the second capacitor, the first end of the second resistor, the first pin of the power management chip, the second pin of the power management chip, and the eleventh pin of the power management chip. The sixth pin of the power management chip is connected to the second end of the first resistor; The third pin of the power management chip is connected to the second end of the second resistor; The fourth pin of the power management chip is connected to the cathode of the light-emitting diode, and the anode of the light-emitting diode is connected to the second end of the third resistor; The eighth pin of the power management chip is connected to the input terminal of the buck circuit and the first terminal of the fourth resistor, respectively, and the second terminal of the fourth resistor is grounded.

7. The relay isolation device according to claim 6, characterized in that, The step-down circuit includes a voltage regulator chip, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a twenty-first capacitor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a first inductor, a ferrite bead, and a first diode; The sixth pin of the voltage regulator chip is connected to the seventh pin of the voltage regulator chip, the eighth pin of the voltage regulator chip, the first terminal of the fifth capacitor, the first terminal of the fourth capacitor, the positive terminal of the third capacitor, and the first terminal of the third resistor, respectively. The negative terminal of the third capacitor is connected to the second terminal of the fourth capacitor and the second terminal of the fifth capacitor and grounded. The fourth pin of the voltage regulator chip is connected to the eighth pin of the power management chip. The eighteenth pin of the voltage regulator chip is connected to the first end of the fifth resistor; The sixteenth pin of the voltage regulator chip is connected to the second terminal of the fifth resistor and the first terminal of the sixth capacitor, respectively. The third pin of the voltage regulator chip is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the second end of the sixth capacitor and grounded. The fifth pin of the voltage regulator chip is connected to the cathode of the first diode and the first terminal of the seventh capacitor, respectively. The eleventh pin of the voltage regulator chip is connected to the second terminal of the seventh capacitor and the first terminal of the first inductor. The second terminal of the first inductor is connected to the first terminal of the eighth capacitor, the anode of the first diode, the first terminal of the eighth resistor, the first terminal of the seventh resistor, the first terminal of the ninth capacitor, the first terminal of the tenth capacitor, the first terminal of the eleventh capacitor, the first terminal of the twelfth capacitor, the power supply terminal of the processing unit, the first terminal of the ferrite bead, the first terminal of the fourteenth capacitor, and the first terminal of the thirteenth capacitor. The second terminal of the eighth capacitor is connected to the second terminals of the ninth capacitor and the tenth capacitor and grounded. The second terminal of the eleventh capacitor is connected to the second terminals of the twelfth capacitor, the fifteenth capacitor, and the seventeenth capacitor and grounded. The second terminal of the thirteenth capacitor is connected to the second terminal of the fourteenth capacitor and grounded. The second terminal of the ferrite bead is connected to the first terminals of the fifteenth capacitor, the sixteenth capacitor, and the seventeenth capacitor. The second terminal of the sixteenth capacitor is grounded. The seventeenth pin of the voltage regulator chip is connected to the second terminal of the seventh resistor and the first terminal of the eighteenth capacitor, respectively. The second pin of the voltage regulator chip is connected to the second terminal of the eighth resistor and the first terminal of the ninth resistor, respectively. The nineteenth pin of the voltage regulator chip is connected to the first end of the twenty-first capacitor, and the second end of the twenty-first capacitor is connected to the second end of the ninth resistor and grounded. The first pin of the voltage regulator chip is connected to the first end of the tenth resistor and the first end of the twentieth capacitor, respectively. The second end of the tenth resistor is connected to the first end of the nineteenth capacitor. The second end of the nineteenth capacitor is connected to the second end of the eighteenth capacitor and the second end of the twentieth capacitor and grounded.

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