A red light chip and a red light epitaxial structure

Abstract

The utility model discloses a red light chip and red light epitaxial structure, include: substrate, first electrode layer, epitaxial structure and transparent electrode layer who are arranged in substrate one side sequentially laminated, wherein, first electrode layer is adjacent substrate, epitaxial structure includes first conductive layer, light emitting layer, second conductive layer, tunneling layer and third conductive layer who are arranged in sequence laminated, first conductive layer is adjacent substrate, first conductive layer and third conductive layer are first conductive type, second conductive layer is second conductive type, first conductive type and second conductive type are different, realize the promotion red light chip's effective light extraction efficiency of light area.

Description

Technical Field

[0001] This utility model relates to the field of light-emitting chip technology, and in particular to a red light chip and a red light epitaxial structure. Background Technology

[0002] In the front-emitting architecture of LED displays, the GaAs substrate located in the light emission path exhibits significant absorption of red light due to its narrow bandgap, severely limiting light output efficiency. To alleviate this problem, after completing the N-side ohmic contact, selective wet or dry etching is typically used to remove the GaAs layer around and even part below the light-emitting area to reduce the light absorption path.

[0003] However, the ohmic contact area inevitably retains GaAs material and the opaque metal electrode covering it, which limits the overall light extraction efficiency and brightness performance of the device. Utility Model Content

[0004] This invention provides a red light chip and a red light epitaxial structure, thereby improving the effective light-emitting area and light extraction efficiency of the red light chip.

[0005] In a first aspect, this utility model embodiment provides a red light chip, comprising:

[0006] Substrate;

[0007] A first electrode layer, an epitaxial structure, and a transparent electrode layer are sequentially stacked on one side of a substrate, wherein the first electrode layer is adjacent to the substrate.

[0008] The epitaxial structure includes a first conductive layer, a light-emitting layer, a second conductive layer, a tunneling layer, and a third conductive layer stacked sequentially; the first conductive layer is adjacent to the substrate.

[0009] The first conductive layer and the third conductive layer are of a first conductivity type, and the second conductive layer is of a second conductivity type. The first conductivity type and the second conductivity type are different.

[0010] Optionally, the first conductivity type is P-type and the second conductivity layer is N-type; or, the first conductivity type is N-type and the second conductivity layer is P-type.

[0011] Optionally, the red light chip further includes an insulating layer covering the surface of the transparent electrode layer, and two opposing first side surfaces and second side surfaces of the epitaxial structure in a first direction; the first direction is perpendicular to the stacking direction of the epitaxial structure.

[0012] The insulating layer includes a first through-hole, the orthographic projection of the first through-hole onto the substrate at least partially overlapping the orthographic projection of the transparent electrode layer onto the substrate;

[0013] The red light chip further includes a first electrode and a second electrode, wherein the first electrode at least covers a portion of the sidewall of the first electrode layer and is electrically connected to the first electrode layer;

[0014] The second electrode is electrically connected to the transparent electrode layer through the first through hole.

[0015] Optionally, the first electrode layer includes a first platform extending along the first direction and beyond the first side surface; the first electrode covers the surface of the first platform and forms an electrical connection with the first electrode layer.

[0016] Optionally, the first electrode layer includes a second platform extending along the first direction and beyond the second side surface;

[0017] The insulating layer covers the surface of the second platform;

[0018] The red light chip further includes a fourth conductive layer, which covers the inner wall of the first through hole, the second side surface, and the surface of the second platform; the fourth conductive layer is electrically connected to the transparent electrode layer.

[0019] The second electrode is disposed on the surface of the fourth conductive layer on the second platform and is electrically connected to the transparent electrode layer through the fourth conductive layer.

[0020] Optionally, the first through hole is disposed adjacent to the second side surface.

[0021] Optionally, the first electrode layer, the transparent electrode layer, and the fourth conductive layer comprise indium tin oxide.

[0022] Optionally, the red light chip further includes a reflective layer located between the substrate and the first electrode layer.

[0023] Optionally, the doping concentration of the first conductive layer may be the same as or different from the doping concentration of the third conductive layer.

[0024] Secondly, this utility model provides a red light epitaxial structure, including a first conductive layer, a light-emitting layer, a second conductive layer, a tunneling layer and a third conductive layer stacked sequentially; the first conductive layer and the third conductive layer are of a first conductivity type, the second conductive layer is of a second conductivity type, and the first conductivity type and the second conductivity type are different.

[0025] The red light chip provided in this embodiment of the present invention includes: a substrate, and a first electrode layer, an epitaxial structure, and a transparent electrode layer sequentially stacked on one side of the substrate. The epitaxial structure includes a first conductive layer, a light-emitting layer, a second conductive layer, a tunneling layer, and a third conductive layer sequentially stacked. By setting a tunneling layer and a third conductive layer in the epitaxial structure, an ohmic contact is formed between the third conductive layer and the transparent electrode layer, thereby eliminating the need for metal electrodes on the light-emitting surface of the chip and significantly improving the effective light-emitting area and light extraction efficiency. Attached Figure Description

[0026] Figure 1 This invention provides a schematic diagram of the structure of a red light chip according to an embodiment of the present invention;

[0027] Figure 2 A schematic diagram of the structure of another red light chip is provided for this embodiment of the utility model;

[0028] Figure 3 A schematic diagram of the fabrication process of a red light chip is provided for an embodiment of this utility model;

[0029] Figures 4-7 A schematic diagram of the intermediate structure for fabricating a red light chip. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0031] In the fabrication of AlGaInP-based red LED devices, epitaxial structures are typically grown on GaAs substrates. Due to the advantages of material lattice matching and growth maturity, GaAs substrates have become the mainstream choice for realizing high-quality AlGaInP multi-quantum-well light-emitting layers. In traditional device structures, N-type contact layers generally use highly doped GaAs, forming low-resistance ohmic contacts through the deposition of metal systems such as AuGe / Au and alloy annealing processes; while P-type contact layers often introduce wide-bandgap GaP window layers to improve hole injection efficiency, and can form good ohmic contacts with transparent conductive oxides such as indium tin oxide (ITO) through heat treatment, thus balancing electrical performance and light extraction efficiency.

[0032] However, in front-emitting architectures for Micro-LED display applications, if an N-side emitting scheme is adopted, the GaAs contact layer located on the light emission path exhibits significant absorption of the red light band due to its narrow bandgap, severely limiting light output efficiency. To alleviate this problem, the industry often removes the GaAs layer around and even part below the light-emitting area through selective wet or dry etching after completing the N-side metal ohmic contact, thereby reducing the light absorption path. Even so, the ohmic contact area inevitably retains GaAs material and the opaque metal electrodes covering it. These residual structures not only obstruct the emitted light path but also introduce additional light scattering and loss due to surface roughness and reflectivity mismatch, limiting the overall light extraction efficiency and brightness performance of the device.

[0033] In view of this, Figure 1 A schematic diagram of the structure of a red light chip provided in an embodiment of this utility model is shown below. Figure 1 The substrate 110 includes a first electrode layer 120, an epitaxial structure 210 and a transparent electrode layer 130 sequentially stacked on one side of the substrate 110, wherein the first electrode layer 120 is adjacent to the substrate 110.

[0034] The epitaxial structure 210 includes a first conductive layer 211, a light-emitting layer 212, a second conductive layer 213, a tunneling layer 214, and a third conductive layer 215 stacked sequentially; the first conductive layer 211 is adjacent to the substrate 110;

[0035] The first conductive layer 211 and the third conductive layer 215 are of the first conductivity type, and the second conductive layer 213 is of the second conductivity type. The first conductivity type and the second conductivity type are different.

[0036] Specifically, in this embodiment of the invention, the first conductivity type can be N-type, and the second conductivity type can be P-type; or, the first conductivity type can be P-type, and the second conductivity type can be N-type. Both conductivity type configurations can achieve effective carrier injection and light emission functions. For ease of explanation, the following description uses P-type as the first conductivity type and N-type as the second conductivity type as an example.

[0037] In the chip structure, the substrate 110 can be a silicon-based substrate 110 or other semiconductor substrate 110, used to support the epitaxial structure 210 and avoid chip breakage during processing. The epitaxial structure 210, from bottom to top on the side of the first electrode layer 120, includes: a first conductive layer 211, a light-emitting layer 212, a second conductive layer 213, a tunneling layer 214, and a third conductive layer 215. The first conductive layer 211, as a P-type semiconductor layer, forms a low-resistance ohmic contact with the first electrode layer 120, providing an efficient hole injection channel for the device. The first electrode layer 120 is typically adjacent to the substrate 110 and does not serve as the main light-emitting surface; the first electrode layer 120 can be a reflective metal layer or a transparent conductive layer.

[0038] The light-emitting layer 212 is composed of AlGaInP multiple quantum wells (MQWs) and can serve as the active region for light emission. Under forward bias, electrons and holes are injected into the quantum wells from the N-type and P-type regions, respectively, and recombine to emit red photons. The emission wavelength of the chip can be adjusted by changing the composition of the light-emitting layer 212.

[0039] The second conductive layer 213 is an N-type semiconductor layer used for efficiently injecting electrons into the light-emitting layer 212. The tunneling layer 214 is composed of a heavily doped tunneling structure, which enables quantum tunneling transport of charge carriers at a lower voltage. A low-resistance path can be formed between the N-type second conductive layer 213, which is originally blocked by the PN junction barrier, and the P-type third conductive layer 215 through the tunneling layer 214, allowing current to pass from the second conductive layer 213 to the third conductive layer 215. This, together with the bottom P-type first conductive layer 211, forms a complete current loop, driving the light-emitting layer 212 to emit light.

[0040] The third conductive layer 215 forms an ohmic contact with the transparent electrode layer 130, which can be, for example, indium tin oxide (ITO). The transparent electrode layer 130 enables uniform top-surface current injection while avoiding the obstruction of the light-emitting area by traditional opaque metal electrodes. No metal electrodes are needed on the light-emitting surface of the chip, significantly improving the effective light-emitting area and light extraction efficiency. It should be noted that the doping concentration of the first conductive layer 211 and the third conductive layer 215 can be the same or different. The third conductive layer 215 can directly contact the transparent electrode layer 130, forming an ohmic contact.

[0041] The red light chip provided in this embodiment of the present invention includes: a substrate 110, and a first electrode layer 120, an epitaxial structure 210, and a transparent electrode layer 130 sequentially stacked on one side of the substrate 110. The epitaxial structure 210 includes a first conductive layer 211, a light-emitting layer 212, a second conductive layer 213, a tunneling layer 214, and a third conductive layer 215 sequentially stacked. By setting the tunneling layer 214 and the third conductive layer 215 in the epitaxial structure 210, an ohmic contact is formed between the third conductive layer 215 and the transparent electrode layer 130, thereby eliminating the need for metal electrodes on the light-emitting surface of the chip and significantly improving the effective light-emitting area and light extraction efficiency.

[0042] Figure 2 A schematic diagram of another red light chip is provided for embodiments of this utility model. See also... Figure 2The red light chip also includes an insulating layer 140, which covers the surface of the transparent electrode layer 130, and two opposing first side surfaces and second side surfaces of the epitaxial structure 210 in a first direction X; the first direction X is perpendicular to the stacking direction Y of the epitaxial structure 210; the insulating layer 140 includes a first via 141, the orthographic projection of the first via 141 on the substrate 110 at least partially overlapping the orthographic projection of the transparent electrode layer 130 on the substrate 110;

[0043] The red light chip also includes a first electrode 150 and a second electrode 160, wherein the first electrode 150 is electrically connected to the first electrode layer 120;

[0044] The second electrode 160 is electrically connected to the transparent electrode layer 130 through the first through hole 141.

[0045] Specifically, in this embodiment of the invention, the first direction X is horizontal, and the stacking direction Y is vertical. The first and second side surfaces of the extension structure 210 are two sidewall surfaces that are opposite each other in the horizontal direction.

[0046] The insulating layer 140 covers the surface, first side surface and second side surface of the transparent electrode layer 130. The insulating layer 140 can be made of a dielectric material with high light transmittance and excellent electrical insulation properties, such as silicon dioxide. The insulating layer 140 can effectively achieve electrical isolation between the transparent electrode layer 130 and the sidewall of the epitaxial structure 210, prevent short circuits from occurring inside the device or between electrodes, and has good light transmittance so as not to block or absorb emitted light, thereby ensuring the light extraction efficiency of the light-emitting area on the front of the chip.

[0047] An insulating layer 140 is further provided with a first through-hole 141, which penetrates the insulating layer 140 and partially exposes the underlying transparent electrode layer 130. The first through-hole 141 defines the connection area of ​​the second electrode 160, enabling electrical connection between the second electrode 160 and the transparent electrode layer 130. The first electrode 150 and the first electrode layer 120 can be connected via sidewalls, with the first electrode 150 covering at least a portion of the sidewall of the first electrode layer 120 to achieve electrical connection. Since the first electrode 150 is located in a non-light-emitting area, its impact on the effective light-emitting area can be reduced.

[0048] See also Figure 1 Optionally, the first electrode layer 120 includes a first platform 310 extending along a first direction X and beyond a first side surface; the first electrode 150 covers the surface of the first platform 310 and forms an electrical connection with the first electrode layer 120.

[0049] Specifically, by etching the transparent electrode layer 130 and the epitaxial structure 210, and using the first electrode layer 120 as the etching stop layer, a first platform 310 extending horizontally beyond the first side surface of the epitaxial structure 210 can be formed. An insulating layer 140 covers the first side surface and a portion of the first platform 310, wherein the first platform 310 has a specific area opening to prevent it from being covered by the insulating layer 140. A first electrode 150 is disposed on the uncovered first platform 310, allowing it to directly contact the exposed first electrode layer 120, thereby achieving a reliable electrical connection. The first platform 310 not only provides a flat and stable attachment plane for the first electrode 150 but also helps enhance the mechanical stability of the electrode, effectively preventing detachment or peeling during subsequent processes or use. Furthermore, since the first electrode 150 is located in a non-light-emitting area at the edge of the chip, it will not obstruct the light emission path.

[0050] Optionally, the first electrode layer 120 includes a second platform 320 extending along the first direction X and beyond the second side surface;

[0051] Insulating layer 140 covers the surface of the second platform 320;

[0052] The red light chip also includes a fourth conductive layer 170, which covers the inner wall of the first through hole 141, the second side surface, and the surface of the second platform 320; the fourth conductive layer 170 is electrically connected to the transparent electrode layer 130.

[0053] The second electrode 160 is disposed on the surface of the fourth conductive layer 170 on the second platform 320, and is electrically connected to the transparent electrode layer 130 through the fourth conductive layer 170.

[0054] Specifically, by etching the transparent electrode layer 130 and the epitaxial structure 210, and using the first electrode layer 120 as an etching stop layer, a second platform 320 extending horizontally beyond the second side surface of the epitaxial structure 210 can be formed. An insulating layer 140 covers the second side surface and the surface of the second platform 320. A first via 141 is formed in the insulating layer 140, penetrating the insulating layer 140 and partially exposing the underlying transparent electrode layer 130. A fourth conductive layer 170 covers the area of ​​the transparent electrode layer 130 exposed by the first via 141, the second side surface, and the upper surface of the second platform 320, thereby establishing a reliable electrical connection with the transparent electrode layer 130. The fourth conductive layer 170 can serve as a redistribution layer, leading the electrode connection points originally located above the light-emitting area to the non-light-emitting area at the edge of the chip. For example, the fourth conductive layer 170 can be made of the same material as the transparent electrode layer 130, such as indium tin oxide (ITO), to maintain high light transmittance and minimize obstruction of the light-emitting surface. With this design, the second electrode 160 can be disposed on the surface of the fourth conductive layer 170 above the second platform 320, and electrically connected to the transparent electrode layer 130 via the fourth conductive layer 170. Since the second electrode 160 is located entirely in the non-light-emitting area, the obstruction of the light-emitting path by the metal electrode can be effectively avoided, thereby improving the effective light-emitting area and overall light extraction efficiency on the front side of the chip.

[0055] Furthermore, the first electrode 150 and the second electrode 160 are placed at the edge of the non-light-emitting area of ​​the chip. In the stacking direction Y, the electrode heights of the first electrode 150 and the second electrode 160 are not much different and are approximately on the same horizontal plane, which is beneficial for metal welding in subsequent packaging processes.

[0056] Optionally, the first through-hole 141 is disposed adjacent to the second side surface. That is, the first through-hole 141 can be as close as possible to the second side surface to reduce the impact on the light-emitting surface. In this embodiment of the present invention, the first through-hole 141 can be disposed adjacent to the second side surface, thereby placing the electrode connection area in the non-light-emitting area at the edge of the chip, which further improves the front light-emitting area and light extraction efficiency while ensuring reliable electrical connection.

[0057] Combination Figure 1 and Figure 2 The red light chip also includes a reflective layer 180, which is located between the substrate 110 and the first electrode layer 120.

[0058] Specifically, the reflective layer 180 can adopt a multi-layer metal alternating stacked structure design to form a metal Bragg mirror with high reflectivity for the red light band. This reflective layer 180 can efficiently reflect light originally emitted towards the substrate 110 back to the light-emitting side, significantly improving the light extraction efficiency of the device.

[0059] The reflective layer 180 can also serve as a bonding interface layer to enhance the bonding strength between the epitaxial structure 210 and the substrate 110, thereby improving the mechanical and thermal stability of the device during subsequent processes and use.

[0060] To further reduce obstruction of the light emission path, the first electrode layer 120 can be made of a transparent conductive material, such as indium tin oxide (ITO). In this way, while achieving good electrical connection, the absorption or obstruction of light emission from the bottom by the opaque metal electrode is effectively avoided.

[0061] by Figure 1 Taking the mid-red light chip as an example, Figure 3 This invention provides a schematic diagram of the fabrication process of a red light chip according to an embodiment of the present invention. Figures 4-7 For a schematic diagram of the intermediate structure for fabricating the red light chip, see [link / reference]. Figures 3-7 ,include:

[0062] S110, a third conductive layer 215 and a tunneling layer 214 are grown on a substrate 110; wherein, the substrate 110 can be a GaAs substrate.

[0063] S120. A second conductive layer 213, a light-emitting layer 212, and a first conductive layer 211 are grown on the side of the tunneling layer 214 away from the substrate 110. The tunneling layer 214 is composed of a heavily doped tunneling structure, which can realize quantum tunneling transport of charge carriers at a lower voltage. A low-resistance path can be formed between the N-type second conductive layer 213 and the P-type third conductive layer 215, which were originally blocked by the PN junction barrier through the tunneling layer 214, allowing current to pass from the second conductive layer 213 to the third conductive layer 215. This, together with the bottom P-type first conductive layer 211, forms a complete current loop, driving the light-emitting layer 212 to emit light. Its structure is as follows. Figure 4 As shown.

[0064] S130, a first electrode layer 120 and a reflective layer 180 are formed on the side of the epitaxial structure 210 away from the substrate 110. Its structure is as follows: Figure 5 As shown.

[0065] S140, perform substrate 110 conversion. At this time, substrate 110 can be a silicon substrate 110, the third conductive layer 215 is located on the top layer, and a transparent electrode layer 130 is deposited to form an ohmic contact with the third conductive layer 215.

[0066] S150, etching the transparent electrode layer 130 and the epitaxial structure 210, with etching stopping at the first electrode layer 120 or the reflective layer 180. In this embodiment of the invention, the first electrode layer 120 is used as the etching stop layer. Its structure is as follows: Figure 6 As shown.

[0067] S160. An insulating layer 140 is formed on the entire surface for isolation. The surface of the insulating layer 140 is etched to form a first through hole 141.

[0068] S170, a fourth conductive layer 170 is formed on the second side to lead the electrodes on the surface of the light-emitting area to the non-light-emitting area, increasing the surface light-emitting area. Its structure is as follows: Figure 7 As shown.

[0069] S180, forming the first electrode 150 and the second electrode 160.

[0070] This utility model embodiment also provides a red light epitaxial structure 210, including a first conductive layer 211, a light-emitting layer 212, a second conductive layer 213, a tunneling layer 214 and a third conductive layer 215 stacked sequentially; the first conductive layer 211 and the third conductive layer 215 are of a first conductivity type, and the second conductive layer 213 is of a second conductivity type, and the first conductivity type and the second conductivity type are different.

[0071] Specifically, taking a first conductivity type of P-type and a second conductivity type of N-type as an example, the first conductive layer 211 is a P-type semiconductor layer, and the first electrode layer 120 can be a reflective metal layer or a transparent conductive layer. The light-emitting layer 212 is composed of AlGaInP-based multiple quantum wells (MQWs) and can serve as the light-emitting active region. Under forward bias, electrons and holes are injected into the quantum wells from the N-type and P-type regions, respectively, and recombine to emit red light. The emission wavelength of the chip can be adjusted by adjusting the composition of the light-emitting layer 212. The second conductive layer 213 is used to efficiently inject electrons into the light-emitting layer 212. The tunneling layer 214 is composed of heavily doped tunneling structures, which can realize quantum tunneling transport of charge carriers at lower voltages. A low-resistance path can be formed between the N-type second conductive layer 213 and the P-type third conductive layer 215, which were originally blocked by the PN junction barrier through the tunneling layer 214. This allows current to pass from the second conductive layer 213 to the third conductive layer 215, thus forming a complete current loop together with the bottom P-type first conductive layer 211, driving the light-emitting layer 212 to emit light. The third conductive layer 215 can form an ohmic contact with the transparent electrode layer 130. Therefore, no metal electrodes are needed on the light-emitting surface of the chip, significantly improving the effective light-emitting area and light extraction efficiency.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A red light chip, characterized in that, include: Substrate; A first electrode layer, an epitaxial structure, and a transparent electrode layer are sequentially stacked on one side of a substrate, wherein the first electrode layer is adjacent to the substrate. The epitaxial structure includes a first conductive layer, a light-emitting layer, a second conductive layer, a tunneling layer, and a third conductive layer stacked sequentially; the first conductive layer is adjacent to the substrate. The first conductive layer and the third conductive layer are of a first conductivity type, and the second conductive layer is of a second conductivity type. The first conductivity type and the second conductivity type are different.

2. The red light chip according to claim 1, characterized in that, The first conductivity type is P-type, and the second conductivity layer is N-type; or, the first conductivity type is N-type, and the second conductivity layer is P-type.

3. The red light chip according to claim 1, characterized in that, The red light chip further includes an insulating layer covering the surface of the transparent electrode layer, and two opposing first and second side surfaces of the epitaxial structure in a first direction; the first direction is perpendicular to the stacking direction of the epitaxial structure. The insulating layer includes a first through-hole, the orthographic projection of the first through-hole onto the substrate at least partially overlapping the orthographic projection of the transparent electrode layer onto the substrate; The red light chip further includes a first electrode and a second electrode, wherein the first electrode at least covers a portion of the sidewall of the first electrode layer and is electrically connected to the first electrode layer; The second electrode is electrically connected to the transparent electrode layer through the first through hole.

4. The red light chip according to claim 3, characterized in that, The first electrode layer includes a first platform extending along the first direction and beyond the first side surface; the first electrode covers the surface of the first platform and forms an electrical connection with the first electrode layer.

5. The red light chip according to claim 4, characterized in that, The first electrode layer includes a second platform extending along the first direction and beyond the second side surface; The insulating layer covers the surface of the second platform; The red light chip further includes a fourth conductive layer, which covers the inner wall of the first through hole, the second side surface, and the surface of the second platform; the fourth conductive layer is electrically connected to the transparent electrode layer. The second electrode is disposed on the surface of the fourth conductive layer on the second platform and is electrically connected to the transparent electrode layer through the fourth conductive layer.

6. The red light chip according to claim 4, characterized in that, The first through hole is disposed adjacent to the second side surface.

7. The red light chip according to claim 5, characterized in that, The first electrode layer, the transparent electrode layer, and the fourth conductive layer comprise indium tin oxide.

8. The red light chip according to any one of claims 1-7, characterized in that, It also includes a reflective layer located between the substrate and the first electrode layer.

9. The red light chip according to any one of claims 1-7, characterized in that, The doping concentration of the first conductive layer may be the same as or different from that of the third conductive layer.

10. A red-light epitaxial structure, characterized in that, It includes a first conductive layer, a light-emitting layer, a second conductive layer, a tunneling layer, and a third conductive layer stacked in sequence; the first conductive layer and the third conductive layer are of a first conductivity type, the second conductive layer is of a second conductivity type, and the first conductivity type and the second conductivity type are different.

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