A vertical transmission interconnect structure and multi-chip module

Abstract

The application provides a vertical transmission interconnection structure and a multi-chip assembly. The vertical transmission interconnection structure comprises a laminated body, and the laminated body is provided with a ground shielding part. The laminated body comprises a plurality of ceramic dielectric layers which are stacked. In the stacking direction of the ceramic dielectric layers, the top of the laminated body is provided with a base microstrip line, and part of the structure of the base microstrip line is exposed outside the laminated body to form a first transmission end. The bottom surface of the laminated body is provided with a strip-shaped pad to form a second transmission end. The side surface of the laminated body is provided with a first wall hanging hole and a second wall hanging hole. The base microstrip line is electrically connected to the strip-shaped pad through the first wall hanging hole away from one end of the first transmission end, so as to form a microwave signal transmission link between the first transmission end and the second transmission end. One of the first transmission end and the second transmission end in the laminated body is electrically connected to the base microstrip line through the strip-shaped pad, and the ground shielding part is electrically connected to the circuit board through the second wall hanging hole. The vertical transmission interconnection structure realizes the matching of a characteristic impedance of 50Ω.

Description

Technical Field

[0001] This application relates to the field of multi-chip component technology, and in particular to a vertical transmission interconnect structure and a multi-chip component. Background Technology

[0002] With the rapid development and widespread application of modern communication and navigation systems, radar, satellites, and other technologies, the market has placed new demands on electronic devices, driving microwave circuits and systems towards smaller size, lighter weight, higher reliability, lower power consumption, and higher integration. Multi-chip modules (MCMs) assemble multiple integrated circuit chips and other chip components onto a high-density multilayer interconnect substrate, and are the mainstream implementation solution for microwave / millimeter-wave components.

[0003] With the continuous maturation of High Temperature Cofired Ceramics (HTCC) technology, the demand for high-frequency, high-density interconnects in electronic devices based on HTCC packaging products is increasing. When designing multi-chip, multi-layer, high-density circuits, the transfer of high-frequency signals from top to bottom pads requires multiple vertical and horizontal structural transitions on the multi-layer substrate. This results in a large structural footprint, hindering the miniaturization of multi-chip components. In other words, multi-chip components in related technologies cannot simultaneously achieve good high-frequency signal transmission performance and miniaturization. Summary of the Invention

[0004] This application provides a vertical transmission interconnect structure and a multi-chip component to solve the problem that multi-chip components in related technologies cannot simultaneously achieve good high-frequency signal transmission performance and miniaturization.

[0005] To achieve the above objectives, the technical solution adopted in this application is as follows: In a first aspect, embodiments of this application provide a vertical transmission interconnect structure for a multi-chip assembly. The vertical transmission interconnect structure includes a stacked body with a ground shield. The stacked body includes multiple stacked ceramic dielectric layers. Along the stacking direction of the ceramic dielectric layers, a substrate microstrip line is provided at the top of the stacked body, with a portion of the substrate microstrip line exposed outside the stacked body to form a first transmission terminal. A strip-shaped pad is provided on the bottom surface of the stacked body to form a second transmission terminal. A first wall-mounting hole and a second wall-mounting hole are provided on the side of the stacked body. The first wall-mounting hole... The ceramic dielectric layer is stacked in a direction that extends through a portion of the stack. The end of the substrate microstrip line away from the first transmission end is electrically connected to the strip pad through the first mounting hole, thereby forming a microwave signal transmission link between the first transmission end and the second transmission end. The multi-chip assembly includes a circuit board on which substrate microstrip lines and substrate pads are provided. One of the first transmission end and the second transmission end in the stack is electrically connected to the substrate microstrip line through the strip pad. The grounding shield is electrically connected to the circuit board through the second mounting hole.

[0006] In some implementations, the substrate microstrip line includes a first microstrip segment, a second microstrip segment, and a third microstrip segment connected in sequence. The third microstrip segment is electrically connected to the first wall-mounting hole. The orthographic projection of the third microstrip segment onto the ceramic dielectric layer is located within the orthographic projection of the strip pad onto the ceramic dielectric layer. The first microstrip segment is the first transmission end. The second and third microstrip segments are embedded within the stack. The linewidth of the first microstrip segment is greater than the linewidth of the second microstrip segment, and the linewidth of the second microstrip segment is greater than the linewidth of the third microstrip segment.

[0007] In some implementations, the linewidth of the first microstrip segment is 0.2±0.05mm, the linewidth of the second microstrip segment is 0.13±0.05mm, and the linewidth of the third microstrip segment is 0.1±0.05mm; and / or, the first microstrip segment is parallel to the third microstrip segment.

[0008] In some implementations, the first wall-mounting hole is a solid semi-cylindrical hole structure, the second wall-mounting hole is a hollow semi-cylindrical hole structure, and the diameter of the first wall-mounting hole is smaller than the diameter of the second wall-mounting hole.

[0009] In some possible implementations, the diameter of the first wall-mounting hole is 0.2±0.05mm, the diameter of the second wall-mounting hole is 0.35±0.05mm, the height of the first wall-mounting hole is 0.8±0.05mm, and the height of the second wall-mounting hole is 0.3±0.05mm.

[0010] In some implementations, the grounding shield includes multiple grounding electrodes disposed inside the laminate, along a direction from the bottom surface to the top surface of the laminate, and a first grounding pad disposed on the bottom surface of the laminate; a portion of the grounding electrodes near the first grounding pad are provided with clearance grooves, and a portion of the grounding electrodes are electrically connected to the first grounding pad through a second wall-mounting hole; the orthographic projection of the first grounding pad on the ceramic dielectric layer is located within the orthographic projection of the grounding electrode on the ceramic dielectric layer.

[0011] In some implementations, the clearance groove is square, with a length of 1±0.05mm and a width of 1±0.05mm; along the stacking direction, the height between the reference ground of the grounding shield and the first grounding pad is 0.5±0.05mm; and / or, the height of the second wall mounting hole is 0.3±0.05mm.

[0012] In some implementations, there are multiple second wall-mounting holes, and at least one second wall-mounting hole is provided on each side of the first wall-mounting hole along the first direction; wherein, the first direction is perpendicular to the stacking direction.

[0013] In some implementations, the stack has a cubic structure with a length of 3.45 mm, a width of 1.6 mm, and a thickness of 1 mm.

[0014] Secondly, embodiments of this application also provide a multi-chip component, including a vertical transmission interconnect structure and a circuit board as described in the first aspect above, wherein the vertical transmission interconnect structure is disposed on the circuit board.

[0015] In some implementations, the circuit board has substrate pads and substrate microstrip lines, the substrate pads and substrate microstrip lines are located on one side surface of the circuit board and connected, the substrate microstrip lines and substrate pads have the same strip pad structure as the vertical transmission interconnect structure and are connected, the width of the substrate pads is smaller than the width of the substrate microstrip lines, and the width of the substrate microstrip lines increases along the direction from one end of the substrate microstrip lines connected to the substrate pads to the other end.

[0016] In some implementations, the substrate microstrip line includes a first segment and a second segment connected to each other, the first segment being connected to the substrate pads, the width of the first segment increasing from the first segment to the second segment, and the width of the second segment being equal; and / or, the circuit board has a length of 6±0.05mm, a width of 5.3±0.05mm, and a thickness of 0.254±0.05mm.

[0017] The beneficial effects of the vertical transmission interconnect structure provided in this application are as follows: Compared with related technologies, in the vertical transmission interconnect structure of this application, the portion of the substrate microstrip line exposed outside the stacked body at the top of the stacked body constitutes the first transmission end, and the strip pad on the ground of the stacked body constitutes the second transmission end. The end of the substrate microstrip line away from the first transmission end is electrically connected to the strip pad through the first wall-mounting hole, so that the first transmission end and the second transmission end form a microwave signal transmission link that meets the characteristic impedance matching of 50Ω. At the same time, the grounding shield on the stacked body is electrically connected to the substrate pad of the circuit board through the second wall-mounting hole, which can provide a low impedance grounding path for multi-chip components. Thus, when the first transmission end or the second transmission end in the vertical transmission interconnect structure is electrically connected to the substrate microstrip line on the circuit board, when the microwave signal is transmitted on the transmission link of the vertical transmission interconnect structure, the microwave signal only undergoes one layer conversion. Firstly, the impedance matching of the vertical transmission interconnect structure is better achieved; secondly, by combining the impedance of the strip pad... The design effectively reduces insertion loss when high-frequency microwave signals are transmitted on the aforementioned transmission link, thus reducing the connection between the vertical transmission interconnect structure and the circuit board. Furthermore, the structure and parameters of the substrate microstrip line and the size of the first mounting hole in the vertical transmission interconnect structure can be rationally designed to meet different layout requirements. Thirdly, placing the first and second mounting holes on the side of the stacked structure facilitates processing and electrical connection with the circuit board, demonstrating strong practicality. Moreover, both the first and second mounting holes can be cylindrical, indirectly reducing the area occupied by the ceramic dielectric layer and contributing to the miniaturization of the stacked structure. Fourthly, the grounding shield on the stacked structure is electrically connected to the substrate pads on the circuit board through the second mounting hole. This not only provides a low-impedance grounding path for multi-chip components but also acts as a shield, effectively improving the stability and reliability of microwave signal transmission on the link. This achieves a balance between high-frequency signal transmission performance and stability, as well as the miniaturization of the vertical transmission interconnect structure. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a multi-chip assembly provided in an embodiment of this application; Figure 2 for Figure 1 Top view; Figure 3 A schematic diagram of the vertical transmission interconnect structure provided in the embodiments of this application from one view. Figure 4 for Figure 1 A schematic diagram of the circuit board structure; Figure 5 The ceramic dielectric layer of the substrate microstrip line is patterned for the embodiments of this application; Figure 6 for Figure 3 Side view of the vertical transmission interconnect structure in the middle; Figure 7 for Figure 3 A structural diagram of the vertical transmission interconnect structure from another perspective; Figure 8 for Figure 3 The bottom view in the middle; Figure 9 The image shows an electromagnetic simulation curve of the vertical transmission interconnect structure in the embodiments of this application.

[0020] Figure label: 100. Vertical transmission interconnect structure; 200, Circuit board; 210, Substrate pad; 220, Substrate microstrip line; 211, First segment; 212, Second segment; 230, Second ground pad; 10. Laminated body; 11. First wall-mounting hole; 12. Second wall-mounting hole; 20. Matrix microstrip line; 21. First microstrip segment; 22. Second microstrip segment; 23. Third microstrip segment; 30. Grounding shield; 31. Grounding electrode; 310. Clearance groove; 32. First grounding pad; 40. Strip pad. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] In the description of this application, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0023] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation", "connection" and "joining" should be interpreted broadly, for example, as fixed connection, detachable connection, or integral connection; those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0024] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more, unless otherwise explicitly specified.

[0025] With the rapid development and widespread application of modern communication and navigation systems, radar, satellites, and other technologies, the market has placed new demands on electronic devices, driving microwave circuits and systems towards smaller size, lighter weight, higher reliability, lower power consumption, and higher integration. Multi-chip modules (MCMs) assemble multiple integrated circuit chips and other chip components onto a high-density multilayer interconnect substrate, and are the mainstream implementation solution for microwave / millimeter-wave components.

[0026] With the continuous maturation of High Temperature Cofired Ceramics (HTCC) technology, the demand for high-frequency, high-density interconnects in electronic devices based on HTCC packaging products is increasing. When designing multi-chip, multi-layer, high-density circuits, the transfer of high-frequency signals from top to bottom pads requires multiple vertical and horizontal structural transitions on the multi-layer substrate. This results in a large structural footprint, hindering the miniaturization of multi-chip components. In other words, multi-chip components in related technologies cannot simultaneously achieve good high-frequency signal transmission performance and miniaturization.

[0027] To address the aforementioned issues, embodiments of this application provide a multi-chip component.

[0028] The aforementioned multi-chip module (MCM) assembles multiple integrated circuit chips and other chip components onto a high-density multilayer interconnect substrate, and is the mainstream implementation scheme for microwave / millimeter-wave components. To ensure low insertion loss after soldering the pads for transmitting high-frequency signals on the bottom of the square flat no-lead (QFN) package of the MCM onto the circuit board, impedance matching optimization design of these pads is also required.

[0029] refer to Figure 1 The multi-chip assembly includes a circuit board 200 and a vertical transmission interconnect structure 100.

[0030] refer to Figures 1 to 4 The vertical transmission interconnect structure 100 includes a stacked body 10, on which a grounding shield 30 is provided. The stacked body 10 includes multiple ceramic dielectric layers stacked together. Along the stacking direction of the ceramic dielectric layers, a substrate microstrip line 20 is provided on the top of the stacked body 10, and a portion of the structure of the substrate microstrip line 20 is exposed outside the stacked body 10 to form a first transmission end. A strip pad 40 is provided on the bottom surface of the stacked body 10 to form a second transmission end. A first wall-mounting hole 11 and a second wall-mounting hole 12 are provided on the side of the stacked body 10. The first wall-mounting hole 11 penetrates a portion of the stacked body 10 along the stacking direction of the ceramic dielectric layers. The end of the substrate microstrip line 20 away from the first transmission end is electrically connected to the strip pad 40 through the first wall-mounting hole 11 to form a microwave signal transmission link between the first transmission end and the second transmission end.

[0031] The aforementioned vertical transmission interconnect structure 100 is based on high-temperature cofired ceramics (HTCC) technology. The dielectric constant of the ceramic dielectric layer in this stack is 8.7, and the dielectric loss factor tanα ≤ 0.002.

[0032] The aforementioned wall mounting hole is a metallized mounting hole used for electrical connection with electrodes inside the ceramic dielectric layer and for external connection, such as electrical connection with circuit board 200.

[0033] In manufacturing the laminate 10, through holes are created by drilling, laser ablation, or other methods. Then, a metal layer (usually tungsten, molybdenum-manganese, or gold) is formed on the inner wall of the hole through thick film printing or thin film coating processes, thus metallizing it. The metallized hole wall greatly enhances the mechanical strength of the hole, enabling it to better withstand the tightening force and stress of the screw.

[0034] The structures of the first wall-mounting hole 11 and the second wall-mounting hole 12 may be the same or different.

[0035] refer to Figure 4 The circuit board 200 has a substrate microstrip line 220 and a substrate pad 210. The substrate pad 210 and the substrate microstrip line 220 are located on one side surface of the circuit board 200 and are connected. The substrate microstrip line 220 and the substrate pad 210 have the same structure as the strip pad 40 and are connected. One of the first transmission end and the second transmission end in the stack 10 is electrically connected to the substrate microstrip line 220 through the strip pad 40. The grounding shield 30 is electrically connected to the circuit board 200 through the second mounting hole 12. Specifically, the grounding shield 30 includes a first grounding pad 32 on the bottom surface of the stack 10, and a second grounding pad 230 is provided on the circuit board 200. The first grounding pad 32 is electrically connected to the second grounding pad 230 through the second mounting hole 12.

[0036] The circuit board 200 described above can be, but is not limited to, a substrate for RO4350. The strip pad 40 described above has the same structure as the substrate pad 210 on the circuit board 200, both being strip-shaped. Thus, the first ground pad 32 and the second ground pad 230 can be, but are not limited to, soldered together. When the first ground pad 32 and the second ground pad 230 are soldered together, they are equivalent to a single strip line. Typically, the orthographic projection of the first ground pad 32 in the height direction of the stack 10 lies within the orthographic projection of the second ground pad 230 in the height direction of the stack 10, ensuring a reliable connection between the two. Typically, the second ground pad 230 is spaced around the substrate microstrip line 220 and the substrate pad 210, separated by an insulating portion. The insulating portion is an open ring, and the substrate microstrip line 220 extends out of the second ground pad 230 through the opening.

[0037] The characteristic impedance of the substrate microstrip line 20 and the substrate microstrip line 220 may be the same, but is not limited to, 50Ω. In the embodiment, after the first ground pad 32 and the second ground pad 230 are soldered together, they are equivalent to a stripline with a characteristic impedance of 50Ω.

[0038] In the vertical transmission interconnect structure 100 of this application, the portion of the substrate microstrip line 20 exposed outside the stacked body 10 on the top of the stacked body 10 constitutes a first transmission end. A strip pad 40 disposed on the ground of the stacked body 10 constitutes a second transmission end. The end of the substrate microstrip line 20 away from the first transmission end is electrically connected to the strip pad 40 through a first wall-mounting hole 11, thereby forming a microwave signal transmission link between the first and second transmission ends. This transmission link satisfies a 50Ω impedance matching requirement. Simultaneously, a grounding shield 30 disposed on the stacked body 10 is connected to the electrical shield through a second wall-mounting hole 12. The substrate pads 210 of the circuit board 200 are electrically connected to provide a low-impedance grounding path for multi-chip components. Thus, when the first or second transmission terminal in the vertical transmission interconnect structure 100 is electrically connected to the substrate microstrip line 220 on the circuit board 200, the microwave signal undergoes only one layer conversion when transmitted along the transmission link of the vertical transmission interconnect structure 100. Firstly, this achieves better impedance matching of the vertical transmission interconnect structure 100; secondly, by rationally designing the impedance of the strip pads 40, high-frequency microwaves... When the signal is transmitted on the aforementioned transmission link, the insertion loss after the vertical transmission interconnect structure 100 is connected to the circuit board 200 is effectively reduced. Simultaneously, by rationally designing the structure and parameters of the substrate microstrip line 20 of the vertical transmission interconnect structure 100 and the size of the first wall-mounting hole 11, different layout requirements can be met. Thirdly, placing the first wall-mounting hole 11 and the second wall-mounting hole 12 on the side of the laminate not only facilitates processing and electrical connection with the circuit board 200, making it highly practical, but also allows both the first wall-mounting hole 11 and the second wall-mounting hole 12 to be... The cylindrical hole structure indirectly reduces the area occupied by the ceramic dielectric layer, which is beneficial to the miniaturization of the stack 10. Fourthly, the grounding shield 30 provided on the stack 10 is electrically connected to the substrate pad 210 on the circuit board 200 through the second wall mounting hole 12. In this way, it can not only provide a low impedance grounding path for multi-chip components, but also play a shielding role, effectively improving the stability and reliability of microwave signal transmission on the link, thereby achieving the goal of balancing high-frequency signal transmission performance and stability, as well as miniaturization of the vertical transmission interconnect structure 100.

[0039] It should be noted that the aforementioned laminate 10 may, but is not limited to, having a cubic structure. The following description uses an example of a cubic structure of laminate 10 comprising 10 ceramic dielectric layers.

[0040] refer to Figure 5In this embodiment, the substrate microstrip line 20 includes a first microstrip line segment 21, a second microstrip line segment 22, and a third microstrip line segment 23 connected in sequence. The third microstrip line segment 23 is electrically connected to the first wall mounting hole 11. The orthographic projection of the third microstrip line segment 23 on the ceramic dielectric layer is located within the orthographic projection of the strip pad 40 on the ceramic dielectric layer. The first microstrip line segment 21 is exposed outside the stack 10 as the first transmission end. The second microstrip line segment 22 and the third microstrip line segment 23 are embedded within the stack 10. The linewidth of the first microstrip line segment 21 is greater than the linewidth of the second microstrip line segment 22, and the linewidth of the second microstrip line segment 22 is greater than the linewidth of the third microstrip line segment 23.

[0041] The first microstrip segment 21, the second microstrip segment 22, and the third microstrip segment 23 mentioned above are an integral structure.

[0042] The first microstrip segment 21 and the third microstrip segment 23 are parallel, making the substrate microstrip line 20 zigzag-shaped. The first microstrip segment 21 and the third microstrip segment 23 may, but are not limited to, be parallel to the width direction of the laminate 10. During the design phase, the line width of the third segment needs to match the diameter of the first wall-mounting hole 11.

[0043] With the above configuration, the wider first microstrip line segment 21 is conducive to achieving reliable mechanical and electrical connections with other components. At the same time, since the third microstrip line segment 23 is connected to the first wall mounting hole 11, the line width decreases from the first microstrip line segment 21 to the third microstrip line segment 23. Thus, while ensuring a reliable mechanical and electrical connection between the substrate microstrip line 20 and the first wall mounting hole 11, it also achieves excellent high-frequency microwave signal transmission.

[0044] After multiple experiments, the linewidth of the first microstrip segment 21 was found to be 0.2±0.05mm, the linewidth of the second microstrip segment 22 was 0.13±0.05mm, and the linewidth of the third microstrip segment 23 was 0.1±0.05mm.

[0045] refer to Figure 6In this embodiment, the first wall-mounting hole 11 is a solid semi-cylindrical hole structure, and the second wall-mounting hole 12 is a hollow semi-cylindrical hole structure. The diameter of the first wall-mounting hole 11 is smaller than the diameter of the second wall-mounting hole 12. That is, the first wall-mounting hole 11 adopts a solid semi-cylindrical hole structure with a smaller diameter. In this way, while ensuring the reliability of the mechanical and electrical connection between the first wall-mounting hole 11 and the substrate microstrip line 20 and the strip pad 40, the diameter of the first wall-mounting hole 11 can be minimized as much as possible, thereby achieving high-frequency microwave signal transmission performance and better impedance matching. At the same time, the second wall-mounting hole 12 adopts a hollow semi-cylindrical hole structure. In this way, the contact area between the second wall-mounting hole 12 and the first ground pad 32 and the second ground pad 230 can be maximized, thereby improving the reliability of the mechanical and electrical connection between the second wall-mounting hole 12, the first ground pad 32, and the second ground pad 230, and also improving the shielding effect. This effectively improves the stability of high-frequency microwave signal transmission on the transmission link of the vertical transmission interconnect structure 100.

[0046] After multiple tests, the diameter of the first wall-mounting hole 11 is 0.2±0.05mm, and the diameter of the second wall-mounting hole 12 is 0.35±0.05mm; the height of the first wall-mounting hole 11 is 0.8±0.05mm, and the height of the second wall-mounting hole 12 is 0.3±0.05mm.

[0047] refer to Figure 6 In this embodiment, there are two second wall-mounting holes 12. Along the first direction, a second wall-mounting hole 12 is provided on each side of the first wall-mounting hole 11. The first direction is perpendicular to the stacking direction, and this first direction can be the length direction of the laminate 10 or the width direction of the laminate 10. In this embodiment, the first direction is the length direction of the laminate 10. This allows for the efficient use of the space along the length of the laminate 10 to rationally arrange the number and position of the second wall-mounting holes 12, achieving impedance matching.

[0048] Of course, the number of second wall-mounting holes 12 can also be three, four, etc., with multiple second wall-mounting holes 12 spaced apart on both sides of the first wall-mounting hole 11. This results in a better shielding effect. However, as the number of second wall-mounting holes 12 increases, the diameter of the second wall-mounting holes 12 can be appropriately reduced.

[0049] refer to Figure 3 , Figure 7 and Figure 8In this embodiment, the grounding shield 30 includes a multilayer grounding electrode 31 disposed inside the laminate 10, and a grounding pad disposed on the bottom surface of the laminate 10; along the direction from the bottom surface to the top surface of the laminate 10, a portion of the grounding electrodes 31 near the grounding pad are provided with clearance grooves 310, and a portion of the grounding electrodes 31 are electrically connected to the grounding pad through the second wall mounting hole 12; the orthographic projection of the grounding pad on the ceramic dielectric layer is located within the orthographic projection of the grounding electrode 31 on the ceramic dielectric layer.

[0050] The laminate 10 in this embodiment includes 10 ceramic dielectric layers. Along the direction from the bottom to the top surface of the laminate 10, 5 grounding electrodes 31 are provided with clearance grooves 310. The clearance grooves 310 on each grounding electrode 31 are positioned identically, and the orthogonal projection of the grounding pad on the ceramic dielectric layer lies within the orthogonal projection of the grounding electrode 31 on the ceramic dielectric layer. This arrangement ensures that the reference ground of the grounding shield 30 meets a preset height. Through multiple tests, the length of the laminate 10 is 3.45±0.05mm, the width is 1.6±0.05mm, the thickness is 1±0.05mm, the preset height is 0.5±0.05mm, and the height of the second wall-mounting hole 12 is 0.3±0.05mm. The clearance grooves 310 can be square, with a length and width of 1±0.05mm.

[0051] The squares mentioned above include rectangles and squares.

[0052] The circuit pattern material on the ceramic dielectric layer of the aforementioned vertical transmission interconnect structure 100 may be, but is not limited to, tungsten. For example, the ground electrode 31 is made of tungsten. The circuit pattern has a two-layer structure, wherein the inner tungsten layer is 10 μm thick and the outer tungsten layer is 15 μm thick.

[0053] It should be noted that, in addition to including 5 layers, the grounding electrode 31 can also include 3, 4 or 6 layers depending on actual needs, and no specific limitation is made here.

[0054] refer to Figure 4 In this embodiment, the width of the substrate pad 210 is smaller than the width of the substrate microstrip line 220, and the width of the substrate microstrip line 220 increases gradually from one end to the other along the direction from the substrate pad 210 to the other end. This configuration can well satisfy the 50Ω characteristic impedance matching.

[0055] refer to Figure 4 In this embodiment, the substrate microstrip line 220 includes a first segment 211 and a second segment 212 connected to each other. The first segment 211 is connected to the substrate pad 210. From the first segment 211 to the second segment 212, the width of the first segment 211 increases, and the width of the second segment 212 is equal.

[0056] The first segment 211 and the second segment 212 mentioned above are an integral structure. In this way, the linewidth of the first segment 211 gradually changes, which reduces the impedance abrupt change of the substrate microstrip line 220 and indirectly optimizes the impedance matching.

[0057] By designing the aforementioned substrate microstrip line 220 into a shape including a first segment 211 with a gradually changing linewidth, signal transmission instability caused by abrupt linewidth changes at the connection between the substrate microstrip line 220 and the substrate pad 210 is avoided. After multiple experiments, the circuit board 200 was found to have a length of 6±0.05mm, a width of 5.3±0.05mm, and a thickness of 0.254±0.05mm. The linewidth of the substrate pad 210 was 0.15mm, the linewidth of the second segment 212 was 0.52mm, and the linewidth of the first segment 211 gradually increased from greater than or equal to 0.15mm to less than or equal to 0.52mm. The length of the first segment 211 can be, but is not limited to, 1mm.

[0058] The circuit patterns on the circuit board 200, such as the substrate microstrip line 220 and the substrate pad 210, are made of copper, and the copper layer thickness is 35μm.

[0059] Through the above design, the substrate microstrip line 220 can meet the 50Ω characteristic impedance matching requirement.

[0060] It should be noted that when the vertical transmission interconnect structure 100 remains unchanged, better impedance matching can also be achieved by simply changing the length, linewidth and other dimensions of the substrate microstrip line 220.

[0061] The vertical transmission interconnect structure 100 provided in this application embodiment can be fabricated using HTCC technology. A cavity is cut out at the corresponding position of the ceramic dielectric layer, and layers are stacked from bottom to top with metal patterns / hole filling printed on each layer, followed by sintering. After electroplating / cleaning (if necessary) of the circuit board 200, chips are sequentially mounted using surface mount technology, gold wire bonding is used to create gold wires, etc., to complete the assembly. The vertical transmission interconnect structure 100 is then soldered onto the circuit board 200 using surface mount technology to form a multi-chip assembly.

[0062] The vertical transmission interconnect structure 100 provided in this application embodiment, after electromagnetic simulation, has the following simulation curve: Figure 9 As shown, the vertical transmission interconnect structure 100 exhibits excellent transmission performance at DC-20GHz, with an insertion loss of less than 1.18dB and a return loss of more than 14.27dB.

[0063] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A vertical transmission interconnect structure for a multi-chip assembly, characterized in that, The vertical transmission interconnect structure (100) includes: A stacked body (10) is provided with a grounding shield (30). The stacked body (10) includes multiple ceramic dielectric layers stacked together. Along the stacking direction of the ceramic dielectric layers, a substrate microstrip line (20) is provided on the top of the stacked body (10). A portion of the structure of the substrate microstrip line (20) is exposed outside the stacked body (10) to form a first transmission end. A strip pad (40) is provided on the bottom surface of the stacked body (10) to form a second transmission end. A first wall mounting hole (11) and a second wall mounting hole (12) are provided on the side of the stacked body (10). The first wall mounting hole (11) penetrates part of the stacked body (10) along the stacking direction of the ceramic dielectric layers. The end of the substrate microstrip line (20) away from the first transmission end is electrically connected to the strip pad (40) through the first wall mounting hole (11) to form a microwave signal transmission link between the first transmission end and the second transmission end. The multi-chip assembly includes a circuit board (200), on which a substrate microstrip line (220) and a substrate pad (210) are provided; one of the first transmission end and the second transmission end in the stack (10) is electrically connected to the substrate microstrip line (220) through the strip pad (40), and the ground shield (30) is electrically connected to the circuit board (200) through the second wall mounting hole (12).

2. The vertical transmission interconnection structure according to claim 1, characterized in that, The substrate microstrip line (20) includes a first microstrip line segment (21), a second microstrip line segment (22) and a third microstrip line segment (23) connected in sequence. The third microstrip line segment (23) is electrically connected to the first wall mounting hole (11). The orthographic projection of the third microstrip line segment (23) on the ceramic dielectric layer is located within the orthographic projection of the strip pad (40) on the ceramic dielectric layer. The first microstrip segment (21) is the first transmission end, the second microstrip segment (22) and the third microstrip segment (23) are embedded in the stack (10), the line width of the first microstrip segment (21) is greater than the line width of the second microstrip segment (22), and the line width of the second microstrip segment (22) is greater than the line width of the third microstrip segment (23).

3. The vertical transmission interconnection structure according to claim 2, characterized in that, The linewidth of the first microstrip segment (21) is 0.2±0.05mm, the linewidth of the second microstrip segment (22) is 0.13±0.05mm, and the linewidth of the second microstrip segment (22) is 0.1±0.05mm. And / or, the first microstrip segment (21) is parallel to the third microstrip segment (23).

4. The vertical transmission interconnection structure according to claim 1, characterized in that, The first wall-mounting hole (11) is a solid semi-cylindrical hole structure, and the second wall-mounting hole (12) is a hollow semi-cylindrical hole structure. The diameter of the first wall-mounting hole (11) is smaller than the diameter of the second wall-mounting hole (12).

5. The vertical transmission interconnect structure according to claim 4, characterized in that, The diameter of the first wall-mounting hole (11) is 0.2±0.05mm, and the diameter of the second wall-mounting hole (12) is 0.35±0.05mm; the height of the first wall-mounting hole (11) is 0.8±0.05mm, and the height of the second wall-mounting hole (12) is 0.3±0.05mm.

6. The vertical transmission interconnect structure according to any one of claims 1-5, characterized in that, The grounding shield (30) includes a multilayer grounding electrode (31) disposed inside the stack (10) and a first grounding pad (32) disposed on the bottom surface of the stack (10). Along the direction from the bottom surface to the top surface of the stack (10), a portion of the grounding electrodes (31) near the first grounding pad (32) are provided with clearance grooves (310), and a portion of the grounding electrodes (31) are electrically connected to the first grounding pad (32) through the second wall mounting hole (12); the orthographic projection of the first grounding pad (32) on the ceramic dielectric layer is located within the orthographic projection of the grounding electrode (31) on the ceramic dielectric layer.

7. The vertical transmission interconnect structure according to claim 6, characterized in that, The clearance groove (310) is square, and the length of the clearance groove (310) is 1±0.05mm and the width is 1±0.05mm; along the stacking direction, the height between the reference ground of the grounding shield (30) and the first grounding pad (32) is 0.5±0.05mm; And / or, the height of the second wall-mounting hole (12) is 0.3±0.05mm.

8. The vertical transmission interconnect structure according to any one of claims 1-5, characterized in that, The stacked body (10) has a cubic structure, with a length of 3.45±0.05mm, a width of 1.6±0.05mm, and a thickness of 1±0.05mm.

9. A multi-chip component, characterized in that, The circuit includes a vertical transmission interconnect structure (100) and a circuit board (200) as described in any one of claims 1-8. The vertical transmission interconnect structure (100) is disposed on the circuit board (200). The circuit board (200) has a substrate pad (210) and a substrate microstrip line (220). The substrate pad (210) and the substrate microstrip line (220) are located on one side surface of the circuit board (200) and connected. The substrate microstrip line (220) and the substrate pad (210) have the same structure as the strip pad (40) of the vertical transmission interconnect structure (100) and are connected. The width of the substrate pad (210) is smaller than the width of the substrate microstrip line (220). The width of the substrate microstrip line (220) increases along the direction from one end of the substrate microstrip line (220) connected to the substrate pad (210) to the other end.

10. The multi-chip component according to claim 9, characterized in that, The substrate microstrip line (220) includes a first segment (211) and a second segment (212) connected to each other. The first segment (211) is connected to the substrate pad (210). From the first segment (211) to the second segment (212), the width of the first segment (211) increases, and the width of the second segment (212) is equal. And / or, the circuit board (200) has a length of 6±0.05mm, a width of 5.3±0.05mm, and a thickness of 0.254±0.05mm.

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